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Mon, 08 Sep 2025 05:10:42 -0700 (PDT) From: James Clark Date: Mon, 08 Sep 2025 13:10:20 +0100 Subject: [PATCH 3/4] perf arm-spe: Display --itrace period warnings for all sample types Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250908-james-perf-spe-period-v1-3-7ccd805af461@linaro.org> References: <20250908-james-perf-spe-period-v1-0-7ccd805af461@linaro.org> In-Reply-To: <20250908-james-perf-spe-period-v1-0-7ccd805af461@linaro.org> To: John Garry , Will Deacon , Mike Leach , Leo Yan , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , George Wort , Graham Woodward , Ben Gainey , Michael Williams Cc: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, James Clark X-Mailer: b4 0.14.0 Currently we only display the warning when the instructions group is requested. Instructions are on by default, and the period applies to all sample types anyway so always check the options and show the warning. Reword the messages to be more explicit about which flags the warnings apply to. Signed-off-by: James Clark --- tools/perf/util/arm-spe.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c index 4c81518a033a..228ed52e653d 100644 --- a/tools/perf/util/arm-spe.c +++ b/tools/perf/util/arm-spe.c @@ -1742,14 +1742,6 @@ arm_spe_synth_events(struct arm_spe *spe, struct per= f_session *session) } =20 if (spe->synth_opts.instructions) { - if (spe->synth_opts.period_type !=3D PERF_ITRACE_PERIOD_INSTRUCTIONS) { - pr_warning("Only instruction-based sampling period is currently support= ed by Arm SPE.\n"); - goto synth_instructions_out; - } - if (spe->synth_opts.period > 1) - pr_warning("Arm SPE has a hardware-based sample period.\n" - "Additional instruction events will be discarded by --itrace\n"); - spe->sample_instructions =3D true; attr.config =3D PERF_COUNT_HW_INSTRUCTIONS; =20 @@ -1759,7 +1751,6 @@ arm_spe_synth_events(struct arm_spe *spe, struct perf= _session *session) spe->instructions_id =3D id; arm_spe_set_event_name(evlist, id, "instructions"); } -synth_instructions_out: =20 return 0; } @@ -1877,6 +1868,15 @@ int arm_spe_process_auxtrace_info(union perf_event *= event, spe->synth_opts.period =3D 1; } =20 + if (spe->synth_opts.period_type !=3D PERF_ITRACE_PERIOD_INSTRUCTIONS) { + ui__error("You must only use i (instructions) --itrace period with Arm S= PE. e.g --itrace=3Di1i\n"); + err =3D -EINVAL; + goto err_free_queues; + } + if (spe->synth_opts.period > 1) + ui__warning("Arm SPE has a hardware-based sampling period.\n\n" + "--itrace periods > 1i downsample by an interval of n SPE samples r= ather than n instructions.\n"); + err =3D arm_spe_synth_events(spe, session); if (err) goto err_free_queues; --=20 2.34.1