From nobody Tue Sep 9 21:32:26 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0B4D86348; Sun, 7 Sep 2025 22:04:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757282676; cv=none; b=BF74CNCJVeBD1yxO9fRtoTW68KM9GFv8uB1ERPLV3KDOU1zNGISCfrCFiqXmB7hv/yFtiMwprVNIfIYIjTZK9T4z85sNjDtW1HFlXRxJPRvsv+U74vQsBbbuaxUJhaXvP+LiDPooMEqgO1gs8rMSaVNLjP76FO69C2kIvKr3w9M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757282676; c=relaxed/simple; bh=ZXQ8b3UYZ5gDa2IpxH0c0Q+2FeQggarRv5Fbkn3KLiQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kwus4DzaB0EkBXCvtWfRZg0PcMVCQf8rFJ/HmsbLf1GVwS+8rwQ83g1TqF+hjzUsS5NDiHk1UB/k40opYfJPfZsLiFf4hY/r5ovzyVNEZuOth+9lNFWIuD+8LDWDfQ9U/grbtgjforOJumGg0MJVygaMJ5Ul6wRmp+LSFJbyoPE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OBMiQsNd; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OBMiQsNd" Received: by smtp.kernel.org (Postfix) with ESMTPS id 72DFCC4CEF0; Sun, 7 Sep 2025 22:04:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757282675; bh=ZXQ8b3UYZ5gDa2IpxH0c0Q+2FeQggarRv5Fbkn3KLiQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=OBMiQsNdBkXZksJcMz24lOmQeSsoOhjRVPIDuguFhXW5If+vThFgYG2pJmqvjAIXf woyDx54rAjsTnx/tUI/cAiU4dwHYuQVZgYDJWHyMqBmEzKU/eXqCkxJzJqe/zLoX8h ebQwzxG/K1wIblOcCGEKtTxLctEXpxsL0ytVIB3xWj68rHAWxEYq7c3unsLsnqc58g oiAtutXoN2VkSP1/yYubb+PuAzIdNU8J89cvkL537G+ZeWKipT9UsUBfDIAsJqFZwd HouPb7nsVxldaL3xWEsMYo/jflRqSuQzarWzR2UWo7wphHSTPqd+AMQ5igLK1aeb4j Alr4qzxd5d4rA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D8C7CA1017; Sun, 7 Sep 2025 22:04:35 +0000 (UTC) From: =?utf-8?q?Andr=C3=A9_Apitzsch_via_B4_Relay?= Date: Mon, 08 Sep 2025 00:04:15 +0200 Subject: [PATCH 1/4] media: dt-bindings: Add qcom,msm8939-camss Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250908-camss-8x39-vbif-v1-1-f198c9fd0d4d@apitzsch.eu> References: <20250908-camss-8x39-vbif-v1-0-f198c9fd0d4d@apitzsch.eu> In-Reply-To: <20250908-camss-8x39-vbif-v1-0-f198c9fd0d4d@apitzsch.eu> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vincent Knecht , =?utf-8?q?Andr=C3=A9_Apitzsch?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757282673; l=7886; i=git@apitzsch.eu; s=20240325; h=from:subject:message-id; bh=TYSy8KwuvHn+Rw83n3uwF1gUxeaKj3TsSqMiVbwz8ys=; b=OWAn7vFsJNffQTJKu43ixIM2xd2cc6cIf+BOMXnhZXbel/u3jbDk9xsCRWk79AvTtXZeK9HxJ JraXD9t0cm9B14Hf+2G7YNEb2AORUX2USRB/34NULQvoEVl4VJSdESJ X-Developer-Key: i=git@apitzsch.eu; a=ed25519; pk=wxovcZRfvNYBMcTw4QFFtNEP4qv39gnBfnfyImXZxiU= X-Endpoint-Received: by B4 Relay for git@apitzsch.eu/20240325 with auth_id=142 X-Original-From: =?utf-8?q?Andr=C3=A9_Apitzsch?= Reply-To: git@apitzsch.eu From: Vincent Knecht Add bindings for qcom,msm8939-camss in order to support the camera subsystem for MSM8939. Signed-off-by: Vincent Knecht [Andr=C3=A9: Make order of items the same as in 8916] Signed-off-by: Andr=C3=A9 Apitzsch Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/qcom,msm8939-camss.yaml | 254 +++++++++++++++++= ++++ 1 file changed, 254 insertions(+) diff --git a/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yam= l b/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml new file mode 100644 index 0000000000000000000000000000000000000000..77b389d76a437d3ac4650eb0821= ca00120604b8c --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml @@ -0,0 +1,254 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,msm8939-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm MSM8939 Camera Subsystem (CAMSS) + +maintainers: + - Vincent Knecht + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms + +properties: + compatible: + const: qcom,msm8939-camss + + reg: + maxItems: 11 + + reg-names: + items: + - const: csiphy0 + - const: csiphy0_clk_mux + - const: csiphy1 + - const: csiphy1_clk_mux + - const: csid0 + - const: csid1 + - const: ispif + - const: csi_clk_mux + - const: vfe0 + - const: csid2 + - const: vfe0_vbif + + clocks: + maxItems: 24 + + clock-names: + items: + - const: top_ahb + - const: ispif_ahb + - const: csiphy0_timer + - const: csiphy1_timer + - const: csi0_ahb + - const: csi0 + - const: csi0_phy + - const: csi0_pix + - const: csi0_rdi + - const: csi1_ahb + - const: csi1 + - const: csi1_phy + - const: csi1_pix + - const: csi1_rdi + - const: ahb + - const: vfe0 + - const: csi_vfe0 + - const: vfe_ahb + - const: vfe_axi + - const: csi2_ahb + - const: csi2 + - const: csi2_phy + - const: csi2_pix + - const: csi2_rdi + + interrupts: + maxItems: 7 + + interrupt-names: + items: + - const: csiphy0 + - const: csiphy1 + - const: csid0 + - const: csid1 + - const: ispif + - const: vfe0 + - const: csid2 + + iommus: + maxItems: 1 + + power-domains: + items: + - description: VFE GDSC - Video Front End, Global Distributed Switch + Controller. + + vdda-supply: + description: + Definition of the regulator used as 1.2V analog power supply. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + patternProperties: + "^port@[0-1]$": + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + bus-type: + enum: + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + + required: + - data-lanes + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - interrupt-names + - iommus + - power-domains + - vdda-supply + - ports + +additionalProperties: false + +examples: + - | + #include + #include + + isp@1b0ac00 { + compatible =3D "qcom,msm8939-camss"; + + reg =3D <0x01b0ac00 0x200>, + <0x01b00030 0x4>, + <0x01b0b000 0x200>, + <0x01b00038 0x4>, + <0x01b08000 0x100>, + <0x01b08400 0x100>, + <0x01b0a000 0x500>, + <0x01b00020 0x10>, + <0x01b10000 0x1000>, + <0x01b08800 0x100>, + <0x01b40000 0x200>; + + reg-names =3D "csiphy0", + "csiphy0_clk_mux", + "csiphy1", + "csiphy1_clk_mux", + "csid0", + "csid1", + "ispif", + "csi_clk_mux", + "vfe0", + "csid2", + "vfe0_vbif"; + + clocks =3D <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CSI0_AHB_CLK>, + <&gcc GCC_CAMSS_CSI0_CLK>, + <&gcc GCC_CAMSS_CSI0PHY_CLK>, + <&gcc GCC_CAMSS_CSI0PIX_CLK>, + <&gcc GCC_CAMSS_CSI0RDI_CLK>, + <&gcc GCC_CAMSS_CSI1_AHB_CLK>, + <&gcc GCC_CAMSS_CSI1_CLK>, + <&gcc GCC_CAMSS_CSI1PHY_CLK>, + <&gcc GCC_CAMSS_CSI1PIX_CLK>, + <&gcc GCC_CAMSS_CSI1RDI_CLK>, + <&gcc GCC_CAMSS_AHB_CLK>, + <&gcc GCC_CAMSS_VFE0_CLK>, + <&gcc GCC_CAMSS_CSI_VFE0_CLK>, + <&gcc GCC_CAMSS_VFE_AHB_CLK>, + <&gcc GCC_CAMSS_VFE_AXI_CLK>, + <&gcc GCC_CAMSS_CSI2_AHB_CLK>, + <&gcc GCC_CAMSS_CSI2_CLK>, + <&gcc GCC_CAMSS_CSI2PHY_CLK>, + <&gcc GCC_CAMSS_CSI2PIX_CLK>, + <&gcc GCC_CAMSS_CSI2RDI_CLK>; + + clock-names =3D "top_ahb", + "ispif_ahb", + "csiphy0_timer", + "csiphy1_timer", + "csi0_ahb", + "csi0", + "csi0_phy", + "csi0_pix", + "csi0_rdi", + "csi1_ahb", + "csi1", + "csi1_phy", + "csi1_pix", + "csi1_rdi", + "ahb", + "vfe0", + "csi_vfe0", + "vfe_ahb", + "vfe_axi", + "csi2_ahb", + "csi2", + "csi2_phy", + "csi2_pix", + "csi2_rdi"; + + interrupts =3D , + , + , + , + , + , + ; + + interrupt-names =3D "csiphy0", + "csiphy1", + "csid0", + "csid1", + "ispif", + "vfe0", + "csid2"; + + iommus =3D <&apps_iommu 3>; + + power-domains =3D <&gcc VFE_GDSC>; + + vdda-supply =3D <®_1v2>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@1 { + reg =3D <1>; + + csiphy1_ep: endpoint { + data-lanes =3D <0 2>; + remote-endpoint =3D <&sensor_ep>; + }; + }; + }; + }; --=20 2.51.0