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a=openpgp; fpr=4B5278785C97ACF79C3C688301CA08B7A6C50824 To support implementations with different event numbers for cycles or instruction events, event attr groups needs to be per-implementation. Signed-off-by: Nick Chan --- drivers/perf/apple_m1_cpu_pmu.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/perf/apple_m1_cpu_pmu.c b/drivers/perf/apple_m1_cpu_pm= u.c index 303c0e62432281e899a33fc197365c70078d6ac1..d0362a1813788776f4210523efe= 33a3018cfef2a 100644 --- a/drivers/perf/apple_m1_cpu_pmu.c +++ b/drivers/perf/apple_m1_cpu_pmu.c @@ -668,7 +668,6 @@ static int apple_pmu_init(struct arm_pmu *cpu_pmu, u32 = counters) } =20 bitmap_set(cpu_pmu->cntr_mask, 0, counters); - cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] =3D &m1_pmu_events_attr_gr= oup; cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_FORMATS] =3D &m1_pmu_format_attr_g= roup; return 0; } @@ -681,6 +680,7 @@ static int m1_pmu_ice_init(struct arm_pmu *cpu_pmu) cpu_pmu->map_event =3D m1_pmu_map_event; cpu_pmu->reset =3D m1_pmu_reset; cpu_pmu->start =3D m1_pmu_start; + cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] =3D &m1_pmu_events_attr_gr= oup; return apple_pmu_init(cpu_pmu, M1_PMU_NR_COUNTERS); } =20 @@ -691,6 +691,7 @@ static int m1_pmu_fire_init(struct arm_pmu *cpu_pmu) cpu_pmu->map_event =3D m1_pmu_map_event; cpu_pmu->reset =3D m1_pmu_reset; cpu_pmu->start =3D m1_pmu_start; + cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] =3D &m1_pmu_events_attr_gr= oup; return apple_pmu_init(cpu_pmu, M1_PMU_NR_COUNTERS); } =20 @@ -701,6 +702,7 @@ static int m2_pmu_avalanche_init(struct arm_pmu *cpu_pm= u) cpu_pmu->map_event =3D m2_pmu_map_event; cpu_pmu->reset =3D m1_pmu_reset; cpu_pmu->start =3D m1_pmu_start; + cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] =3D &m1_pmu_events_attr_gr= oup; return apple_pmu_init(cpu_pmu, M1_PMU_NR_COUNTERS); } =20 @@ -711,6 +713,7 @@ static int m2_pmu_blizzard_init(struct arm_pmu *cpu_pmu) cpu_pmu->map_event =3D m2_pmu_map_event; cpu_pmu->reset =3D m1_pmu_reset; cpu_pmu->start =3D m1_pmu_start; + cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] =3D &m1_pmu_events_attr_gr= oup; return apple_pmu_init(cpu_pmu, M1_PMU_NR_COUNTERS); } =20 --=20 2.51.0