From nobody Tue Sep 9 16:23:33 2025 Received: from mx4.wp.pl (mx4.wp.pl [212.77.101.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 27A92261B98 for ; Sun, 7 Sep 2025 11:24:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=212.77.101.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757244273; cv=none; b=oSPw8TfUOUK9TLtaMFcnaRLGe0N/5atu83Ly7aN5WPVn9cNIiTNuzgX0JKw422FTq1f1xfTd9DwzsFPigBotfbT4uzLVT9vjJ7d5WUtUE1WXi52mZcbBq3blJo6C2WhAdbzYxRRhpUuYJq4imR/nxZHxfpZPS+8smkomE55gtr8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757244273; c=relaxed/simple; bh=m+SK6RZu81AvceUb2EhrYY1h+etFykloM9qWjtaZIcs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dlmCQfdr9WO7j5mAAcRnIBLtYnVtnMlzMJZVgGdcIa+QLe2xVtVu/0cXIE+CF24KkJirZn7N8vqPyLaXnb1UeCD+66GPHwmH5t0/QGcJ0NBo/ea72IQAzWJv5IpcPvCX9RUwRsKNOybYZy+yM5vkmCr/MOggrB5L5rHI/PTzjXs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=wp.pl; spf=pass smtp.mailfrom=wp.pl; dkim=pass (2048-bit key) header.d=wp.pl header.i=@wp.pl header.b=bzxGOcGy; arc=none smtp.client-ip=212.77.101.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=wp.pl Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wp.pl Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wp.pl header.i=@wp.pl header.b="bzxGOcGy" Received: (wp-smtpd smtp.wp.pl 25405 invoked from network); 7 Sep 2025 13:17:46 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=wp.pl; s=20241105; t=1757243866; bh=1Czx2eU4pmBOj1uB61N886Er/ocYFYwRqZXYBAxfJrQ=; h=From:To:Cc:Subject; b=bzxGOcGy7Z/+wTbNHxVaRjRAuZv320kdengLw5JnETPXEnquJQdv79jZg4L55V2pK fZLUmh9igePuvD4NkArGachhvybjIDsSx4u3wT/O4nCHTCnZjPAkZycgyvrDQDindB b21PUqttlIvder7aiDlNurfaFV2Ht3ovEFOxcdCcXoe0aCDyTLaWBMuczgrgE5YvqV XEciil14KBWp19oZk7pJSLqT+99n3Mv0JgQS3GpUylu0/CSSBxUDZnSzOvBPy0GQKx 4EkOew2xYnTnyn8T5d+rSPw4SjWQrgRvNP52yClBUJmUUyiz+tYT6KBIRpG3YTjWIv RunVfsYoIpzjA== Received: from 83.24.123.254.ipv4.supernova.orange.pl (HELO laptop-olek.lan) (olek2@wp.pl@[83.24.123.254]) (envelope-sender ) by smtp.wp.pl (WP-SMTPD) with ECDHE-RSA-AES256-GCM-SHA384 encrypted SMTP for ; 7 Sep 2025 13:17:46 +0200 From: Aleksander Jan Bajkowski To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Cc: Aleksander Jan Bajkowski Subject: [PATCH v5 1/1] arm64: dts: mediatek: add thermal sensor support on mt7981 Date: Sun, 7 Sep 2025 13:15:09 +0200 Message-ID: <20250907111742.23195-2-olek2@wp.pl> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20250907111742.23195-1-olek2@wp.pl> References: <20250907111742.23195-1-olek2@wp.pl> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-WP-DKIM-Status: good (id: wp.pl) X-WP-MailID: 24360e36277411bda771a55fa12e8a08 X-WP-AV: skaner antywirusowy Poczty Wirtualnej Polski X-WP-SPAM: NO 0000000 [4XOB] Content-Type: text/plain; charset="utf-8" The temperature sensor in the MT7981 is same as in the MT7986. Signed-off-by: Aleksander Jan Bajkowski Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt7981b.dtsi | 31 ++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi b/arch/arm64/boot/dt= s/mediatek/mt7981b.dtsi index 5cbea9cd411f..277c11247c13 100644 --- a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi @@ -76,7 +76,7 @@ watchdog: watchdog@1001c000 { #reset-cells =3D <1>; }; =20 - clock-controller@1001e000 { + apmixedsys: clock-controller@1001e000 { compatible =3D "mediatek,mt7981-apmixedsys"; reg =3D <0 0x1001e000 0 0x1000>; #clock-cells =3D <1>; @@ -184,6 +184,31 @@ spi@1100b000 { status =3D "disabled"; }; =20 + thermal@1100c800 { + compatible =3D "mediatek,mt7981-thermal", + "mediatek,mt7986-thermal"; + reg =3D <0 0x1100c800 0 0x800>; + interrupts =3D ; + clocks =3D <&infracfg CLK_INFRA_THERM_CK>, + <&infracfg CLK_INFRA_ADC_26M_CK>; + clock-names =3D "therm", "auxadc"; + nvmem-cells =3D <&thermal_calibration>; + nvmem-cell-names =3D "calibration-data"; + #thermal-sensor-cells =3D <1>; + mediatek,auxadc =3D <&auxadc>; + mediatek,apmixedsys =3D <&apmixedsys>; + }; + + auxadc: adc@1100d000 { + compatible =3D "mediatek,mt7981-auxadc", + "mediatek,mt7986-auxadc"; + reg =3D <0 0x1100d000 0 0x1000>; + clocks =3D <&infracfg CLK_INFRA_ADC_26M_CK>; + clock-names =3D "main"; + #io-channel-cells =3D <1>; + status =3D "disabled"; + }; + pio: pinctrl@11d00000 { compatible =3D "mediatek,mt7981-pinctrl"; reg =3D <0 0x11d00000 0 0x1000>, @@ -211,6 +236,10 @@ efuse@11f20000 { reg =3D <0 0x11f20000 0 0x1000>; #address-cells =3D <1>; #size-cells =3D <1>; + + thermal_calibration: thermal-calib@274 { + reg =3D <0x274 0xc>; + }; }; =20 clock-controller@15000000 { --=20 2.47.3