From nobody Tue Sep 9 21:30:26 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB80A27057C; Sat, 6 Sep 2025 04:13:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757132024; cv=none; b=a/GhPlIMUEnilacIBf0NpVTe7xmDGHQLMYWbRHZAf6/vrTMIHxmIyjJrd17BxE192lriFbCtNGS2uXbsldGFnqmA+tuMjMFdanhJE0tA60B7lcCSmSPYIfp1u+brHyYFbJL8qYY5EXrG1TgtMD9c2wllkKPoM37fifKofWSAa38= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757132024; c=relaxed/simple; bh=KwQ33/Me6CtoPqF903pwWNvdntE/FNahw7BHgwIWeoE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=NaQ5AD8tkBJBAVC5Yd6znhJUGGPx1c+t7LNLtg0bYFW0/kl30NZ157LibbXTk7ckqgmtJY10CFyGon5QJSFicQXX4J04yCAcmALuG8xCrGKbQwSM9QJvqq/1argGliZ7snqz/IcxB+zUNmgHCxtmUpElpwYpK3q3XeXVa3aUgso= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NXfuaFnG; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NXfuaFnG" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5B92FC4CEF9; Sat, 6 Sep 2025 04:13:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757132024; bh=KwQ33/Me6CtoPqF903pwWNvdntE/FNahw7BHgwIWeoE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NXfuaFnGH4VZDCWcXHddtfnJp4yQD3T3SAbvOEczeEuvfFcbi5xLco1Yax1zkJKDY nnE2nMb7HGtfVV+VVDvmF8/2WKe0yZxmYCozVUg2TSZYmmQIlsbU8fmYPUJxieLCfZ InAQDS7FmYnd4u9AAXR2AuJxxPypsHMwr1KW7gRPecQIX3Ip7xWoxyrTz4b9nZkQA3 zeoTqSves77CJwPfUqrP86azQP+/j5MkVPAefvu1wtAg9VTava5J4JHXW0xeENWmjb bbIcfSN6NY/Jqs6ygGaNLchYKcS8qqOlPbqzfKyn0xMfQLap7DAGDVEDFD6J4XIwJD m87JsDBoBYfVg== Received: by wens.tw (Postfix, from userid 1000) id 0E7ED5FF9B; Sat, 06 Sep 2025 12:13:39 +0800 (CST) From: Chen-Yu Tsai To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Andre Przywara , Jernej Skrabec Subject: [PATCH net-next v3 09/10] arm64: dts: allwinner: t527: avaota-a1: enable second Ethernet port Date: Sat, 6 Sep 2025 12:13:32 +0800 Message-Id: <20250906041333.642483-10-wens@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250906041333.642483-1-wens@kernel.org> References: <20250906041333.642483-1-wens@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Chen-Yu Tsai On the Avaota A1 board, the second Ethernet controller, aka the GMAC200, is connected to a second external RTL8211F-CG PHY. The PHY uses an external 25MHz crystal, and has the SoC's PJ16 pin connected to its reset pin. Enable the second Ethernet port. Also fix up the label for the existing external PHY connected to the first Ethernet port. Acked-by: Jernej Skrabec Signed-off-by: Chen-Yu Tsai --- Changes since v1: - Switch to generic (tx|rx)-internal-delay-ps properties --- .../dts/allwinner/sun55i-t527-avaota-a1.dts | 26 +++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts b/arch= /arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts index e7713678208d..f540965ffaa4 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts @@ -13,6 +13,7 @@ / { =20 aliases { ethernet0 =3D &gmac0; + ethernet1 =3D &gmac1; serial0 =3D &uart0; }; =20 @@ -67,7 +68,7 @@ &ehci1 { =20 &gmac0 { phy-mode =3D "rgmii-id"; - phy-handle =3D <&ext_rgmii_phy>; + phy-handle =3D <&ext_rgmii0_phy>; phy-supply =3D <®_dcdc4>; =20 allwinner,tx-delay-ps =3D <100>; @@ -76,13 +77,24 @@ &gmac0 { status =3D "okay"; }; =20 +&gmac1 { + phy-mode =3D "rgmii-id"; + phy-handle =3D <&ext_rgmii1_phy>; + phy-supply =3D <®_dcdc4>; + + tx-internal-delay-ps =3D <100>; + rx-internal-delay-ps =3D <100>; + + status =3D "okay"; +}; + &gpu { mali-supply =3D <®_dcdc2>; status =3D "okay"; }; =20 &mdio0 { - ext_rgmii_phy: ethernet-phy@1 { + ext_rgmii0_phy: ethernet-phy@1 { compatible =3D "ethernet-phy-ieee802.3-c22"; reg =3D <1>; reset-gpios =3D <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */ @@ -91,6 +103,16 @@ ext_rgmii_phy: ethernet-phy@1 { }; }; =20 +&mdio1 { + ext_rgmii1_phy: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <1>; + reset-gpios =3D <&pio 9 16 GPIO_ACTIVE_LOW>; /* PJ16 */ + reset-assert-us =3D <10000>; + reset-deassert-us =3D <150000>; + }; +}; + &mmc0 { vmmc-supply =3D <®_cldo3>; cd-gpios =3D <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */ --=20 2.39.5