From nobody Tue Sep 9 16:20:06 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA587286439; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; cv=none; b=JVKdi43sBFRjU/86/2ZIIdvQiUhHdbaL81JfZIO8qSpJthBxLmT9d8FWdg2a2Biqf1SIXdMC018qbX6aO+FyNny51KQezXILMs8gXwH1LUrVPj14mJkAjl8TRpR1k0lte46ANqxDzl4csu90fmG+7QU+ijN4EudavCI94wy2jBY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; c=relaxed/simple; bh=8i2BWgCaaCWJIvg/06T6RDvE8Cwt2BXpXDMpawGm74k=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RG/oErzJaoijg1zaMTBC4GJcAcsVcURksO2jpRnspnKuZzw0Oq3X37UMBSMsOYWqsmTIXp36mNRMCVYmK3/uX/RWvWu4RnXMuKmez1FERtpuLYz+ypyntPu+fYlHSG9dIR6/T95W/9YrqIpF4DXg689wO76FXk/6WwiK2G5MCak= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kuCj0CVc; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kuCj0CVc" Received: by smtp.kernel.org (Postfix) with ESMTPS id 77679C4CEF8; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757189855; bh=8i2BWgCaaCWJIvg/06T6RDvE8Cwt2BXpXDMpawGm74k=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=kuCj0CVcLlREf/E0zXX4GQfTIXUdUnnvMNpyQs2T3QW4inVvs1pc5R21wKuGy8gBB 1m8CsxgJvLT20MYS4dL3at5s+HVdTogIfM9TrL4qjLIlCSb9dz6WGuooQhxTHVF0Wl KBMiW5+x3FidV1ySVBDAS+55aIIcBktmLKz6WhGtNrUoTfgEUnLnTqN2YTmMmQb0lP fhgo1Ff3jw44Ca+t180OK/bRoXeezvZ5gyVVgokuK/5kiJtZzhehCQvd5iYh352dQs B2htRZ1kkGQbXcHyfsn45/7ERFXks1N88EGF5yVbXelvQFTGrtlnATNjEKUp5GhWeo 5O090LlZS88bw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F23FCA1012; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) From: Aaron Kling via B4 Relay Date: Sat, 06 Sep 2025 15:16:51 -0500 Subject: [PATCH v3 1/9] dt-bindings: devfreq: tegra30-actmon: Add Tegra124 fallback for Tegra210 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250906-t210-actmon-v3-1-1403365d571e@gmail.com> References: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> In-Reply-To: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Thierry Reding , Jonathan Hunter , Krzysztof Kozlowski , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Dmitry Osipenko Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, Aaron Kling , Chanwoo Choi , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757189854; l=1317; i=webgeek1234@gmail.com; s=20250217; h=from:subject:message-id; bh=Yja3M+BrtWErPH3UuVdCmx3ZLaQHPY9CfAi2XYCgd9s=; b=u/t7WCZ0BXsJqSC+o9rUlL3KPvNTjQf5d95jBEEs6hC/qt0eqRUKa3YdEv1sUE1njITK7Prv1 ycbcosSFFxZDoS70d2+d0s6vqCB05MUdlUwZ1qZ9mH8wyuxr4L5OBLH X-Developer-Key: i=webgeek1234@gmail.com; a=ed25519; pk=TQwd6q26txw7bkK7B8qtI/kcAohZc7bHHGSD7domdrU= X-Endpoint-Received: by B4 Relay for webgeek1234@gmail.com/20250217 with auth_id=342 X-Original-From: Aaron Kling Reply-To: webgeek1234@gmail.com From: Aaron Kling The Tegra210 actmon is compatible with the existing Tegra124 driver. Describe the compatibles as such. Acked-by: Chanwoo Choi Reviewed-by: Krzysztof Kozlowski Signed-off-by: Aaron Kling --- .../devicetree/bindings/devfreq/nvidia,tegra30-actmon.yaml | 13 ++++++++-= ---- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/devfreq/nvidia,tegra30-actmo= n.yaml b/Documentation/devicetree/bindings/devfreq/nvidia,tegra30-actmon.ya= ml index e3379d1067283e36d1bee303187c0205b410f610..ea1dc86bc31f635f91a0e36f908= f5c0c4f9a804c 100644 --- a/Documentation/devicetree/bindings/devfreq/nvidia,tegra30-actmon.yaml +++ b/Documentation/devicetree/bindings/devfreq/nvidia,tegra30-actmon.yaml @@ -19,11 +19,14 @@ description: | =20 properties: compatible: - enum: - - nvidia,tegra30-actmon - - nvidia,tegra114-actmon - - nvidia,tegra124-actmon - - nvidia,tegra210-actmon + oneOf: + - enum: + - nvidia,tegra30-actmon + - nvidia,tegra114-actmon + - nvidia,tegra124-actmon + - items: + - const: nvidia,tegra210-actmon + - const: nvidia,tegra124-actmon =20 reg: maxItems: 1 --=20 2.50.1 From nobody Tue Sep 9 16:20:06 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D8EFE28468C; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; cv=none; b=JDWCPHmY4VJt13Mex8/VzDAZNS29MzfiEn/d8UtfRvCapZggcVGK1ziizFtldzinz6gG1xPePIOgvrxPkUiWK0vZWgDcLJ0yRLumh5avUjDdsIeQMqYZ5RYLuoudkjz1F+BotXepsXTP6Y5bRNihS5/wt9//n03QPqt6ceywwVU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; c=relaxed/simple; bh=RH2DS5U3ZIYWTXSob6kMDF+ndcbMhkNkeprzmxlsBGA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=s3nBunnK7unDuCFadQN4YOFIyKljufVSUQjbawPhXKFFpF+lD4zR4djH5XkZjfvEanftPyXGOm0n8i2/+T/C/dE+R12boPfr0QhhNHNw448chBy1RNVtz0ZXnSxfvgghTv9nWxi+1m68R2uu8gBTdHZoTYv8YOHPy90KB4b3i0I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=oLnRBI/Q; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oLnRBI/Q" Received: by smtp.kernel.org (Postfix) with ESMTPS id 84217C4AF09; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757189855; bh=RH2DS5U3ZIYWTXSob6kMDF+ndcbMhkNkeprzmxlsBGA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=oLnRBI/QPrTgvxR+FkkxmXmfrDxTWqfZIBsXbUyIBnKmDEazH7m5H1hxlLkYz9Dfv P0KFLNVFvsxCQx7QpLWOzpBp6HXE3ciRwQyDaLvmNkWwCZSonh1k6AHIUmRXgDdZ/P vHMNVyjRgG/Klg9DR1g/7Mdsn4DKoEg89IEiAdobMN0Y9NbBE3gwYZj9i22WrE7FES kV36uZrD9CzJPuHQLvhdzkjoJb7uJwZkk7mrH5aAl5e1xmhd0XdNIP/IcSExBeOki2 WDkcTaFM82bPBM0AaokwDy+nnBTIQJ4iuoBENLJTzI1F1t+EPPluGI8i0xl78rcmxK maZmF2V5hWkKA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F0FBCA101F; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) From: Aaron Kling via B4 Relay Date: Sat, 06 Sep 2025 15:16:52 -0500 Subject: [PATCH v3 2/9] dt-bindings: memory: tegra210: emc: Document OPP table and interconnect Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250906-t210-actmon-v3-2-1403365d571e@gmail.com> References: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> In-Reply-To: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Thierry Reding , Jonathan Hunter , Krzysztof Kozlowski , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Dmitry Osipenko Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, Aaron Kling X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757189854; l=1483; i=webgeek1234@gmail.com; s=20250217; h=from:subject:message-id; bh=Db/RIle5/AqORG8wYHRgMmE0c+WgodTWsv0fav4CnnQ=; b=0BZh+ZvuQY/xP39Pqj0cEHRlDNsV+M8A9tUSMuq+PTdVrvd9lw7YYRl/R2rHaze3mvR1RGFcm LftN6NFg34HCcVoEXi3Pkljrn8kCvrD3jEhRuqwoa2KURA86mjwo46c X-Developer-Key: i=webgeek1234@gmail.com; a=ed25519; pk=TQwd6q26txw7bkK7B8qtI/kcAohZc7bHHGSD7domdrU= X-Endpoint-Received: by B4 Relay for webgeek1234@gmail.com/20250217 with auth_id=342 X-Original-From: Aaron Kling Reply-To: webgeek1234@gmail.com From: Aaron Kling These are needed for dynamic frequency scaling of the EMC controller. Signed-off-by: Aaron Kling --- .../bindings/memory-controllers/nvidia,tegra210-emc.yaml | 11 +++++++= ++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,te= gra210-emc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvid= ia,tegra210-emc.yaml index bc8477e7ab193b7880bb681037985f3fccebf02f..4e4fb4acd7f9d376379a19b5f8e= 0256baaed5697 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-= emc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-= emc.yaml @@ -33,6 +33,9 @@ properties: items: - description: EMC general interrupt =20 + "#interconnect-cells": + const: 0 + memory-region: maxItems: 1 description: @@ -44,6 +47,11 @@ properties: description: phandle of the memory controller node =20 + operating-points-v2: + description: + Should contain freqs and voltages and opp-supported-hw property, whi= ch + is a bitfield indicating SoC speedo ID mask. + required: - compatible - reg @@ -79,4 +87,7 @@ examples: interrupts =3D ; memory-region =3D <&emc_table>; nvidia,memory-controller =3D <&mc>; + operating-points-v2 =3D <&dvfs_opp_table>; + + #interconnect-cells =3D <0>; }; --=20 2.50.1 From nobody Tue Sep 9 16:20:06 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E93F71F0E50; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; cv=none; b=seRjS5UHdN0SDvfUFelvLE0K728tTDIsvblfOIfIsrEOTXTiHVhIbDyP6Jjao1F3Ngh5tRZIKHZemJOcBIpkRVpHrz5P22W0nZAZHb6uhAu4MkxaIoJ/NizgJdRYR/VopLsNGG4NUQOy3tVveukdBoRGfAjdPGGkVdc6BXzfHp4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; c=relaxed/simple; bh=fPjs/XG/sJ2XmfKguWHPxGXL7nxrYvrB/znH0ZVkJL4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Lr1VGyvt85THAJI2Bqmp7FIHj6j2U4dUQxoBAxm+COytyYKJ/W/aUsLaDZQXdZtE2M01gsIGOeSM2N31z/xlj+D/2r63I+DaqVg0+6BggDaQIw+UJE9P3mRwkCYWJ2muSZ4bUHSHFhLSvjd5EsFbv/GUbg+WtUcW9saNdaZvrck= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fSXlFJXv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fSXlFJXv" Received: by smtp.kernel.org (Postfix) with ESMTPS id 907D7C4CEFD; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757189855; bh=fPjs/XG/sJ2XmfKguWHPxGXL7nxrYvrB/znH0ZVkJL4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=fSXlFJXvdTxDjiaCVKYVFuiCZJiQlT/GI9dartYMJQ54PZkzIYZMyK+Od0h+ovY5l Q7qv0BhdJATs4Iup/A5+1IwlI7JOs7ytCwYBjrlGVpQssy7sM4aCtArplg0h129ZLQ JukrdiQRAbCHZ34SUwxUgxz6i2NA3D3FgxMMpSNZhLcbVRoB89nLGSVDU5kZTDuJV2 Ep+urTZBqH4qsQdZDD62SNbbFcdKUefUtMBpW6aT7F5h8TjQ7qZV+3LhN5szChjesF pkygmZKgYKQbhP+DnzzWiD9rP7zX/Eqv6kwYQo5VfO6+Hphi4/+TGsdqoSr/M6u22M w5/0FciVEdUkA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E994CA1002; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) From: Aaron Kling via B4 Relay Date: Sat, 06 Sep 2025 15:16:53 -0500 Subject: [PATCH v3 3/9] dt-bindings: memory: tegra210: Add memory client IDs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250906-t210-actmon-v3-3-1403365d571e@gmail.com> References: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> In-Reply-To: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Thierry Reding , Jonathan Hunter , Krzysztof Kozlowski , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Dmitry Osipenko Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, Aaron Kling X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757189854; l=3162; i=webgeek1234@gmail.com; s=20250217; h=from:subject:message-id; bh=diJJeMdgP073EZ/ZsibqT6kTrEivDt/XgCP+oRB8GuY=; b=5NhiBrfv8x3jKspeMBmIqwZcoBUAoTn+4QYvuhcesLc0PW1SQIIMDfhvUD4vhq96Ljaagv6hy 0GH5/lyBUCoDEEh/iRG7aNcpPSe0mSHIz58ME8z/ulRVuwzbUoLT4sB X-Developer-Key: i=webgeek1234@gmail.com; a=ed25519; pk=TQwd6q26txw7bkK7B8qtI/kcAohZc7bHHGSD7domdrU= X-Endpoint-Received: by B4 Relay for webgeek1234@gmail.com/20250217 with auth_id=342 X-Original-From: Aaron Kling Reply-To: webgeek1234@gmail.com From: Aaron Kling Each memory client has unique hardware ID, add these IDs. Signed-off-by: Aaron Kling --- include/dt-bindings/memory/tegra210-mc.h | 74 ++++++++++++++++++++++++++++= ++++ 1 file changed, 74 insertions(+) diff --git a/include/dt-bindings/memory/tegra210-mc.h b/include/dt-bindings= /memory/tegra210-mc.h index 5e082547f1794cba1f72872782e04d8747863b6d..881bf78aa8b2636bb71954968b0= 251145d72fecd 100644 --- a/include/dt-bindings/memory/tegra210-mc.h +++ b/include/dt-bindings/memory/tegra210-mc.h @@ -75,4 +75,78 @@ #define TEGRA210_MC_RESET_ETR 28 #define TEGRA210_MC_RESET_TSECB 29 =20 +#define TEGRA210_MC_PTCR 0 +#define TEGRA210_MC_DISPLAY0A 1 +#define TEGRA210_MC_DISPLAY0AB 2 +#define TEGRA210_MC_DISPLAY0B 3 +#define TEGRA210_MC_DISPLAY0BB 4 +#define TEGRA210_MC_DISPLAY0C 5 +#define TEGRA210_MC_DISPLAY0CB 6 +#define TEGRA210_MC_AFIR 14 +#define TEGRA210_MC_AVPCARM7R 15 +#define TEGRA210_MC_DISPLAYHC 16 +#define TEGRA210_MC_DISPLAYHCB 17 +#define TEGRA210_MC_HDAR 21 +#define TEGRA210_MC_HOST1XDMAR 22 +#define TEGRA210_MC_HOST1XR 23 +#define TEGRA210_MC_NVENCSRD 28 +#define TEGRA210_MC_PPCSAHBDMAR 29 +#define TEGRA210_MC_PPCSAHBSLVR 30 +#define TEGRA210_MC_SATAR 31 +#define TEGRA210_MC_MPCORER 39 +#define TEGRA210_MC_NVENCSWR 43 +#define TEGRA210_MC_AFIW 49 +#define TEGRA210_MC_AVPCARM7W 50 +#define TEGRA210_MC_HDAW 53 +#define TEGRA210_MC_HOST1XW 54 +#define TEGRA210_MC_MPCOREW 57 +#define TEGRA210_MC_PPCSAHBDMAW 59 +#define TEGRA210_MC_PPCSAHBSLVW 60 +#define TEGRA210_MC_SATAW 61 +#define TEGRA210_MC_ISPRA 68 +#define TEGRA210_MC_ISPWA 70 +#define TEGRA210_MC_ISPWB 71 +#define TEGRA210_MC_XUSB_HOSTR 74 +#define TEGRA210_MC_XUSB_HOSTW 75 +#define TEGRA210_MC_XUSB_DEVR 76 +#define TEGRA210_MC_XUSB_DEVW 77 +#define TEGRA210_MC_ISPRAB 78 +#define TEGRA210_MC_ISPWAB 80 +#define TEGRA210_MC_ISPWBB 81 +#define TEGRA210_MC_TSECSRD 84 +#define TEGRA210_MC_TSECSWR 85 +#define TEGRA210_MC_A9AVPSCR 86 +#define TEGRA210_MC_A9AVPSCW 87 +#define TEGRA210_MC_GPUSRD 88 +#define TEGRA210_MC_GPUSWR 89 +#define TEGRA210_MC_DISPLAYT 90 +#define TEGRA210_MC_SDMMCRA 96 +#define TEGRA210_MC_SDMMCRAA 97 +#define TEGRA210_MC_SDMMCR 98 +#define TEGRA210_MC_SDMMCRAB 99 +#define TEGRA210_MC_SDMMCWA 100 +#define TEGRA210_MC_SDMMCWAA 101 +#define TEGRA210_MC_SDMMCW 102 +#define TEGRA210_MC_SDMMCWAB 103 +#define TEGRA210_MC_VICSRD 108 +#define TEGRA210_MC_VICSWR 109 +#define TEGRA210_MC_VIW 114 +#define TEGRA210_MC_DISPLAYD 115 +#define TEGRA210_MC_NVDECSRD 120 +#define TEGRA210_MC_NVDECSWR 121 +#define TEGRA210_MC_APER 122 +#define TEGRA210_MC_APEW 123 +#define TEGRA210_MC_NVJPGRD 126 +#define TEGRA210_MC_NVJPGWR 127 +#define TEGRA210_MC_SESRD 128 +#define TEGRA210_MC_SESWR 129 +#define TEGRA210_MC_AXIAPR 130 +#define TEGRA210_MC_AXIAPW 131 +#define TEGRA210_MC_ETRR 132 +#define TEGRA210_MC_ETRW 133 +#define TEGRA210_MC_TSECSRDB 134 +#define TEGRA210_MC_TSECSWRB 135 +#define TEGRA210_MC_GPUSRD2 136 +#define TEGRA210_MC_GPUSWR2 137 + #endif --=20 2.50.1 From nobody Tue Sep 9 16:20:06 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 09244266576; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; cv=none; b=jPVoZvaho4rzG3zRgqtBaPP6mg9aieSwIVY00aP90tQuWllQyuZooTtHO3EGAQYV7+gC73vgeu2Lz1tNokYeTFy909pfC8k77H96q1fmkrszN81gb7sCzNp95c6QMoJfCOJUWQkRFMHFWYTzFCIyqBfsOEX7HQU/sDniMCk4x10= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; c=relaxed/simple; bh=FpgByhDo1ElVxWctkCxf/pv7ZHfE8pLcyZUkl49aghM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=bb8noLqWPOcnUrhgOWLERU4H4dFE3cI2SpfXxcb6MNwP8WKMThWjwunLHs1Nlsrn8PfcobTX1jm63QYJj9EHcWDV9yvkXQmsVSl/T7PDLM6bvvZfyuxfQYnIboUqoqhwIsM5UlJksRr+//I09QpJtJ4hsbqeyIv9SHEJmri+Fz8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KbK8wZ5X; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KbK8wZ5X" Received: by smtp.kernel.org (Postfix) with ESMTPS id 9BA63C4CEFE; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757189855; bh=FpgByhDo1ElVxWctkCxf/pv7ZHfE8pLcyZUkl49aghM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=KbK8wZ5XxP16RKLB+fV7v0fqiJPkHmZyl4dNEe5BVsqoXjaxLPW/wAVAfxI5k2zF0 PZ80S7CFo2bnmnVy7d1Af9imwsk4A/CTpQoAy4urMTf7I8OGcGZTHuycYI6b4w4FUC ieXQ4KA2NSjLWW1PuYdtHPeFDaYKztPtikRnZpBBEcl/HJ3CTP3HiQDGUCmQFRUI5S eF5AA5qqCLhY/N7Lht5EGDbHSV23rYw6RN0Y++ggjvDMEKOqyzaUzNp6AdCHyquVdB x5DWhqt5jNzUjmtQ+vCOJ17Q3fE7VNMt6WkoJRugYC/0S18IPVfHItMquhy9rcX8UO N9NXhJIngfgkg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F7AACAC583; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) From: Aaron Kling via B4 Relay Date: Sat, 06 Sep 2025 15:16:54 -0500 Subject: [PATCH v3 4/9] memory: tegra210: Use bindings for client ids Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250906-t210-actmon-v3-4-1403365d571e@gmail.com> References: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> In-Reply-To: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Thierry Reding , Jonathan Hunter , Krzysztof Kozlowski , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Dmitry Osipenko Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, Aaron Kling X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757189854; l=16920; i=webgeek1234@gmail.com; s=20250217; h=from:subject:message-id; bh=2IcSf/NhCCEjxrtbD+6oo7SjDtSOsCHRaWNhLVL0G2o=; b=LO1mtEfYk9luEHIGMJy5iFXthYK+4w/2Qfe7Gp60uFtxBSElqSuLryVOwCDIAiVEJRX7f+LPU +y1ux4EpJ/mBfDdUvWLAC6YlmFVTe8LfSsjzr/kvFMxlAe61flR7g/U X-Developer-Key: i=webgeek1234@gmail.com; a=ed25519; pk=TQwd6q26txw7bkK7B8qtI/kcAohZc7bHHGSD7domdrU= X-Endpoint-Received: by B4 Relay for webgeek1234@gmail.com/20250217 with auth_id=342 X-Original-From: Aaron Kling Reply-To: webgeek1234@gmail.com From: Aaron Kling Since the related binding is being added, use that for the client ids instead of hardcoded magic numbers. Signed-off-by: Aaron Kling --- drivers/memory/tegra/tegra210.c | 146 ++++++++++++++++++++----------------= ---- 1 file changed, 73 insertions(+), 73 deletions(-) diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra21= 0.c index 8ab6498dbe7d2f410d4eb262926c18b77edb0b3d..cfa61dd885577a8fbd79c396a13= 16101197ca1f2 100644 --- a/drivers/memory/tegra/tegra210.c +++ b/drivers/memory/tegra/tegra210.c @@ -9,11 +9,11 @@ =20 static const struct tegra_mc_client tegra210_mc_clients[] =3D { { - .id =3D 0x00, + .id =3D TEGRA210_MC_PTCR, .name =3D "ptcr", .swgroup =3D TEGRA_SWGROUP_PTC, }, { - .id =3D 0x01, + .id =3D TEGRA210_MC_DISPLAY0A, .name =3D "display0a", .swgroup =3D TEGRA_SWGROUP_DC, .regs =3D { @@ -29,7 +29,7 @@ static const struct tegra_mc_client tegra210_mc_clients[]= =3D { }, }, }, { - .id =3D 0x02, + .id =3D TEGRA210_MC_DISPLAY0AB, .name =3D "display0ab", .swgroup =3D TEGRA_SWGROUP_DCB, .regs =3D { @@ -45,7 +45,7 @@ static const struct tegra_mc_client tegra210_mc_clients[]= =3D { }, }, }, { - .id =3D 0x03, + .id =3D TEGRA210_MC_DISPLAY0B, .name =3D "display0b", .swgroup =3D TEGRA_SWGROUP_DC, .regs =3D { @@ -61,7 +61,7 @@ static const struct tegra_mc_client tegra210_mc_clients[]= =3D { }, }, }, { - .id =3D 0x04, + .id =3D TEGRA210_MC_DISPLAY0BB, .name =3D "display0bb", .swgroup =3D TEGRA_SWGROUP_DCB, .regs =3D { @@ -77,7 +77,7 @@ static const struct tegra_mc_client tegra210_mc_clients[]= =3D { }, }, }, { - .id =3D 0x05, + .id =3D TEGRA210_MC_DISPLAY0C, .name =3D "display0c", .swgroup =3D TEGRA_SWGROUP_DC, .regs =3D { @@ -93,7 +93,7 @@ static const struct tegra_mc_client tegra210_mc_clients[]= =3D { }, }, }, { - .id =3D 0x06, + .id =3D TEGRA210_MC_DISPLAY0CB, .name =3D "display0cb", .swgroup =3D TEGRA_SWGROUP_DCB, .regs =3D { @@ -109,7 +109,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x0e, + .id =3D TEGRA210_MC_AFIR, .name =3D "afir", .swgroup =3D TEGRA_SWGROUP_AFI, .regs =3D { @@ -125,7 +125,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x0f, + .id =3D TEGRA210_MC_AVPCARM7R, .name =3D "avpcarm7r", .swgroup =3D TEGRA_SWGROUP_AVPC, .regs =3D { @@ -141,7 +141,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x10, + .id =3D TEGRA210_MC_DISPLAYHC, .name =3D "displayhc", .swgroup =3D TEGRA_SWGROUP_DC, .regs =3D { @@ -157,7 +157,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x11, + .id =3D TEGRA210_MC_DISPLAYHCB, .name =3D "displayhcb", .swgroup =3D TEGRA_SWGROUP_DCB, .regs =3D { @@ -173,7 +173,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x15, + .id =3D TEGRA210_MC_HDAR, .name =3D "hdar", .swgroup =3D TEGRA_SWGROUP_HDA, .regs =3D { @@ -189,7 +189,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x16, + .id =3D TEGRA210_MC_HOST1XDMAR, .name =3D "host1xdmar", .swgroup =3D TEGRA_SWGROUP_HC, .regs =3D { @@ -205,7 +205,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x17, + .id =3D TEGRA210_MC_HOST1XR, .name =3D "host1xr", .swgroup =3D TEGRA_SWGROUP_HC, .regs =3D { @@ -221,7 +221,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x1c, + .id =3D TEGRA210_MC_NVENCSRD, .name =3D "nvencsrd", .swgroup =3D TEGRA_SWGROUP_NVENC, .regs =3D { @@ -237,7 +237,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x1d, + .id =3D TEGRA210_MC_PPCSAHBDMAR, .name =3D "ppcsahbdmar", .swgroup =3D TEGRA_SWGROUP_PPCS, .regs =3D { @@ -253,7 +253,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x1e, + .id =3D TEGRA210_MC_PPCSAHBSLVR, .name =3D "ppcsahbslvr", .swgroup =3D TEGRA_SWGROUP_PPCS, .regs =3D { @@ -269,7 +269,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x1f, + .id =3D TEGRA210_MC_SATAR, .name =3D "satar", .swgroup =3D TEGRA_SWGROUP_SATA, .regs =3D { @@ -285,7 +285,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x27, + .id =3D TEGRA210_MC_MPCORER, .name =3D "mpcorer", .swgroup =3D TEGRA_SWGROUP_MPCORE, .regs =3D { @@ -297,7 +297,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x2b, + .id =3D TEGRA210_MC_NVENCSWR, .name =3D "nvencswr", .swgroup =3D TEGRA_SWGROUP_NVENC, .regs =3D { @@ -313,7 +313,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x31, + .id =3D TEGRA210_MC_AFIW, .name =3D "afiw", .swgroup =3D TEGRA_SWGROUP_AFI, .regs =3D { @@ -329,7 +329,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x32, + .id =3D TEGRA210_MC_AVPCARM7W, .name =3D "avpcarm7w", .swgroup =3D TEGRA_SWGROUP_AVPC, .regs =3D { @@ -345,7 +345,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x35, + .id =3D TEGRA210_MC_HDAW, .name =3D "hdaw", .swgroup =3D TEGRA_SWGROUP_HDA, .regs =3D { @@ -361,7 +361,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x36, + .id =3D TEGRA210_MC_HOST1XW, .name =3D "host1xw", .swgroup =3D TEGRA_SWGROUP_HC, .regs =3D { @@ -377,7 +377,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x39, + .id =3D TEGRA210_MC_MPCOREW, .name =3D "mpcorew", .swgroup =3D TEGRA_SWGROUP_MPCORE, .regs =3D { @@ -389,7 +389,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x3b, + .id =3D TEGRA210_MC_PPCSAHBDMAW, .name =3D "ppcsahbdmaw", .swgroup =3D TEGRA_SWGROUP_PPCS, .regs =3D { @@ -405,7 +405,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x3c, + .id =3D TEGRA210_MC_PPCSAHBSLVW, .name =3D "ppcsahbslvw", .swgroup =3D TEGRA_SWGROUP_PPCS, .regs =3D { @@ -421,7 +421,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x3d, + .id =3D TEGRA210_MC_SATAW, .name =3D "sataw", .swgroup =3D TEGRA_SWGROUP_SATA, .regs =3D { @@ -437,7 +437,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x44, + .id =3D TEGRA210_MC_ISPRA, .name =3D "ispra", .swgroup =3D TEGRA_SWGROUP_ISP2, .regs =3D { @@ -453,7 +453,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x46, + .id =3D TEGRA210_MC_ISPWA, .name =3D "ispwa", .swgroup =3D TEGRA_SWGROUP_ISP2, .regs =3D { @@ -469,7 +469,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x47, + .id =3D TEGRA210_MC_ISPWB, .name =3D "ispwb", .swgroup =3D TEGRA_SWGROUP_ISP2, .regs =3D { @@ -485,7 +485,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x4a, + .id =3D TEGRA210_MC_XUSB_HOSTR, .name =3D "xusb_hostr", .swgroup =3D TEGRA_SWGROUP_XUSB_HOST, .regs =3D { @@ -501,7 +501,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x4b, + .id =3D TEGRA210_MC_XUSB_HOSTW, .name =3D "xusb_hostw", .swgroup =3D TEGRA_SWGROUP_XUSB_HOST, .regs =3D { @@ -517,7 +517,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x4c, + .id =3D TEGRA210_MC_XUSB_DEVR, .name =3D "xusb_devr", .swgroup =3D TEGRA_SWGROUP_XUSB_DEV, .regs =3D { @@ -533,7 +533,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x4d, + .id =3D TEGRA210_MC_XUSB_DEVW, .name =3D "xusb_devw", .swgroup =3D TEGRA_SWGROUP_XUSB_DEV, .regs =3D { @@ -549,7 +549,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x4e, + .id =3D TEGRA210_MC_ISPRAB, .name =3D "isprab", .swgroup =3D TEGRA_SWGROUP_ISP2B, .regs =3D { @@ -565,7 +565,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x50, + .id =3D TEGRA210_MC_ISPWAB, .name =3D "ispwab", .swgroup =3D TEGRA_SWGROUP_ISP2B, .regs =3D { @@ -581,7 +581,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x51, + .id =3D TEGRA210_MC_ISPWBB, .name =3D "ispwbb", .swgroup =3D TEGRA_SWGROUP_ISP2B, .regs =3D { @@ -597,7 +597,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x54, + .id =3D TEGRA210_MC_TSECSRD, .name =3D "tsecsrd", .swgroup =3D TEGRA_SWGROUP_TSEC, .regs =3D { @@ -613,7 +613,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x55, + .id =3D TEGRA210_MC_TSECSWR, .name =3D "tsecswr", .swgroup =3D TEGRA_SWGROUP_TSEC, .regs =3D { @@ -629,7 +629,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x56, + .id =3D TEGRA210_MC_A9AVPSCR, .name =3D "a9avpscr", .swgroup =3D TEGRA_SWGROUP_A9AVP, .regs =3D { @@ -645,7 +645,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x57, + .id =3D TEGRA210_MC_A9AVPSCW, .name =3D "a9avpscw", .swgroup =3D TEGRA_SWGROUP_A9AVP, .regs =3D { @@ -661,7 +661,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x58, + .id =3D TEGRA210_MC_GPUSRD, .name =3D "gpusrd", .swgroup =3D TEGRA_SWGROUP_GPU, .regs =3D { @@ -678,7 +678,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x59, + .id =3D TEGRA210_MC_GPUSWR, .name =3D "gpuswr", .swgroup =3D TEGRA_SWGROUP_GPU, .regs =3D { @@ -695,7 +695,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x5a, + .id =3D TEGRA210_MC_DISPLAYT, .name =3D "displayt", .swgroup =3D TEGRA_SWGROUP_DC, .regs =3D { @@ -711,7 +711,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x60, + .id =3D TEGRA210_MC_SDMMCRA, .name =3D "sdmmcra", .swgroup =3D TEGRA_SWGROUP_SDMMC1A, .regs =3D { @@ -727,7 +727,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x61, + .id =3D TEGRA210_MC_SDMMCRAA, .name =3D "sdmmcraa", .swgroup =3D TEGRA_SWGROUP_SDMMC2A, .regs =3D { @@ -743,7 +743,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x62, + .id =3D TEGRA210_MC_SDMMCR, .name =3D "sdmmcr", .swgroup =3D TEGRA_SWGROUP_SDMMC3A, .regs =3D { @@ -759,7 +759,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x63, + .id =3D TEGRA210_MC_SDMMCRAB, .swgroup =3D TEGRA_SWGROUP_SDMMC4A, .name =3D "sdmmcrab", .regs =3D { @@ -775,7 +775,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x64, + .id =3D TEGRA210_MC_SDMMCWA, .name =3D "sdmmcwa", .swgroup =3D TEGRA_SWGROUP_SDMMC1A, .regs =3D { @@ -791,7 +791,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x65, + .id =3D TEGRA210_MC_SDMMCWAA, .name =3D "sdmmcwaa", .swgroup =3D TEGRA_SWGROUP_SDMMC2A, .regs =3D { @@ -807,7 +807,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x66, + .id =3D TEGRA210_MC_SDMMCW, .name =3D "sdmmcw", .swgroup =3D TEGRA_SWGROUP_SDMMC3A, .regs =3D { @@ -823,7 +823,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x67, + .id =3D TEGRA210_MC_SDMMCWAB, .name =3D "sdmmcwab", .swgroup =3D TEGRA_SWGROUP_SDMMC4A, .regs =3D { @@ -839,7 +839,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x6c, + .id =3D TEGRA210_MC_VICSRD, .name =3D "vicsrd", .swgroup =3D TEGRA_SWGROUP_VIC, .regs =3D { @@ -855,7 +855,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x6d, + .id =3D TEGRA210_MC_VICSWR, .name =3D "vicswr", .swgroup =3D TEGRA_SWGROUP_VIC, .regs =3D { @@ -871,7 +871,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x72, + .id =3D TEGRA210_MC_VIW, .name =3D "viw", .swgroup =3D TEGRA_SWGROUP_VI, .regs =3D { @@ -887,7 +887,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x73, + .id =3D TEGRA210_MC_DISPLAYD, .name =3D "displayd", .swgroup =3D TEGRA_SWGROUP_DC, .regs =3D { @@ -903,7 +903,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x78, + .id =3D TEGRA210_MC_NVDECSRD, .name =3D "nvdecsrd", .swgroup =3D TEGRA_SWGROUP_NVDEC, .regs =3D { @@ -919,7 +919,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x79, + .id =3D TEGRA210_MC_NVDECSWR, .name =3D "nvdecswr", .swgroup =3D TEGRA_SWGROUP_NVDEC, .regs =3D { @@ -935,7 +935,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x7a, + .id =3D TEGRA210_MC_APER, .name =3D "aper", .swgroup =3D TEGRA_SWGROUP_APE, .regs =3D { @@ -951,7 +951,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x7b, + .id =3D TEGRA210_MC_APEW, .name =3D "apew", .swgroup =3D TEGRA_SWGROUP_APE, .regs =3D { @@ -967,7 +967,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x7e, + .id =3D TEGRA210_MC_NVJPGRD, .name =3D "nvjpgsrd", .swgroup =3D TEGRA_SWGROUP_NVJPG, .regs =3D { @@ -983,7 +983,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x7f, + .id =3D TEGRA210_MC_NVJPGWR, .name =3D "nvjpgswr", .swgroup =3D TEGRA_SWGROUP_NVJPG, .regs =3D { @@ -999,7 +999,7 @@ static const struct tegra_mc_client tegra210_mc_clients= [] =3D { }, }, }, { - .id =3D 0x80, + .id =3D TEGRA210_MC_SESRD, .name =3D "sesrd", .swgroup =3D TEGRA_SWGROUP_SE, .regs =3D { @@ -1015,7 +1015,7 @@ static const struct tegra_mc_client tegra210_mc_clien= ts[] =3D { }, }, }, { - .id =3D 0x81, + .id =3D TEGRA210_MC_SESRD, .name =3D "seswr", .swgroup =3D TEGRA_SWGROUP_SE, .regs =3D { @@ -1031,7 +1031,7 @@ static const struct tegra_mc_client tegra210_mc_clien= ts[] =3D { }, }, }, { - .id =3D 0x82, + .id =3D TEGRA210_MC_AXIAPR, .name =3D "axiapr", .swgroup =3D TEGRA_SWGROUP_AXIAP, .regs =3D { @@ -1047,7 +1047,7 @@ static const struct tegra_mc_client tegra210_mc_clien= ts[] =3D { }, }, }, { - .id =3D 0x83, + .id =3D TEGRA210_MC_AXIAPW, .name =3D "axiapw", .swgroup =3D TEGRA_SWGROUP_AXIAP, .regs =3D { @@ -1063,7 +1063,7 @@ static const struct tegra_mc_client tegra210_mc_clien= ts[] =3D { }, }, }, { - .id =3D 0x84, + .id =3D TEGRA210_MC_ETRR, .name =3D "etrr", .swgroup =3D TEGRA_SWGROUP_ETR, .regs =3D { @@ -1079,7 +1079,7 @@ static const struct tegra_mc_client tegra210_mc_clien= ts[] =3D { }, }, }, { - .id =3D 0x85, + .id =3D TEGRA210_MC_ETRR, .name =3D "etrw", .swgroup =3D TEGRA_SWGROUP_ETR, .regs =3D { @@ -1095,7 +1095,7 @@ static const struct tegra_mc_client tegra210_mc_clien= ts[] =3D { }, }, }, { - .id =3D 0x86, + .id =3D TEGRA210_MC_TSECSRDB, .name =3D "tsecsrdb", .swgroup =3D TEGRA_SWGROUP_TSECB, .regs =3D { @@ -1111,7 +1111,7 @@ static const struct tegra_mc_client tegra210_mc_clien= ts[] =3D { }, }, }, { - .id =3D 0x87, + .id =3D TEGRA210_MC_TSECSWRB, .name =3D "tsecswrb", .swgroup =3D TEGRA_SWGROUP_TSECB, .regs =3D { @@ -1127,7 +1127,7 @@ static const struct tegra_mc_client tegra210_mc_clien= ts[] =3D { }, }, }, { - .id =3D 0x88, + .id =3D TEGRA210_MC_GPUSRD2, .name =3D "gpusrd2", .swgroup =3D TEGRA_SWGROUP_GPU, .regs =3D { @@ -1144,7 +1144,7 @@ static const struct tegra_mc_client tegra210_mc_clien= ts[] =3D { }, }, }, { - .id =3D 0x89, + .id =3D TEGRA210_MC_GPUSWR2, .name =3D "gpuswr2", .swgroup =3D TEGRA_SWGROUP_GPU, .regs =3D { --=20 2.50.1 From nobody Tue Sep 9 16:20:06 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 419EB29CB32; Sat, 6 Sep 2025 20:17:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; cv=none; b=XkxdMFaIONpwYRybJ9Yf4Xr9NpXMwTFSRQsxJdFnooZfTnj2Ymkjvb7w3JS6BBmY1Q1RjKRw5WjXCW4Hm6x9Vwr6Cld5trHOxScZIxF859nk9H3hE8VPop6NAzf3xOJHD5tYWC+CGn8iY0pyTlBOoIfl+FCe8augxqqh6Zk/4/0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; c=relaxed/simple; bh=J0Hl5jXSkgUDOuUrz4cdXPv31p4OJPbVVWkHvszXf+0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=L68aEvuVnGAX0q8UTFsqaF4atAz/spg48im1y19OymsMrFXfzSWmVve88yTnfjGKZ5THNj+lmdvZYDbFhcptznamxNiJYXU9ZUMVVSroq2kMmop7EPCF0vYb8Q52oAP/G42XZruBKjJ3RufcBq2i+FK6ndHHX0cn5QESiQ6wrTg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=f2sbplfJ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="f2sbplfJ" Received: by smtp.kernel.org (Postfix) with ESMTPS id A9914C116B1; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757189855; bh=J0Hl5jXSkgUDOuUrz4cdXPv31p4OJPbVVWkHvszXf+0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=f2sbplfJXzSlgKCh5bTwUmw2JWeL79KA5TuFMoZsFMcaAgQcoV7KLpW+XZmRRouG4 JzjqOWbKoh88VaCUlianfXLz4WYEGvpXydursgH3C6iCsGbvIt6WyIITX/i6M7cDQG ca4UI/t3iyvPkv+KWr/vs+62+mxabQdUhNHAYtAjuY6p3JMXG8pnYcUr7VF0vxC1TZ E2ITCmUABgbS4fkyIresNOq+kDzLYAJ3Er2a6T14rL+F9H2MbY7L27itrt0kwgo0Kh 7Spe8h+QM3MyvdHkm6WWh6DAimB8oGB6rFBtu2QQPHI9HnDpvtV6VdxJjtKz7VeWj2 Cxv0OPSFOXb0g== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F92ACA0FED; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) From: Aaron Kling via B4 Relay Date: Sat, 06 Sep 2025 15:16:55 -0500 Subject: [PATCH v3 5/9] memory: tegra210: Support interconnect framework Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250906-t210-actmon-v3-5-1403365d571e@gmail.com> References: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> In-Reply-To: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Thierry Reding , Jonathan Hunter , Krzysztof Kozlowski , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Dmitry Osipenko Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, Aaron Kling X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757189854; l=14757; i=webgeek1234@gmail.com; s=20250217; h=from:subject:message-id; bh=m5ZhfVIuvuh1I0mQ/EHdvDIqAYGB5EuPbVWBtkxLV64=; b=+961k4846RzewO4/gG2nQAmvms4a5mVlJoZaFuzlbK7ZZpMd2gOlu7csm8Vb98wbMKjWfyC2Z 0KKItvfhSMhDaWTdYA51e/Buq3xGXqsRZO9nWgoTWDZxDSL4Kn3nn/g X-Developer-Key: i=webgeek1234@gmail.com; a=ed25519; pk=TQwd6q26txw7bkK7B8qtI/kcAohZc7bHHGSD7domdrU= X-Endpoint-Received: by B4 Relay for webgeek1234@gmail.com/20250217 with auth_id=342 X-Original-From: Aaron Kling Reply-To: webgeek1234@gmail.com From: Aaron Kling This makes mc and emc interconnect providers and allows for dynamic memory clock scaling. Signed-off-by: Aaron Kling --- drivers/memory/tegra/Kconfig | 1 + drivers/memory/tegra/tegra210-emc-core.c | 272 +++++++++++++++++++++++++++= +++- drivers/memory/tegra/tegra210-emc.h | 23 +++ drivers/memory/tegra/tegra210.c | 81 +++++++++ 4 files changed, 375 insertions(+), 2 deletions(-) diff --git a/drivers/memory/tegra/Kconfig b/drivers/memory/tegra/Kconfig index fc5a277918267ee8240f9fb9efeb80275db4790b..2d0be29afe2b9ebf9a0630ef7fb= 6fb43ff359499 100644 --- a/drivers/memory/tegra/Kconfig +++ b/drivers/memory/tegra/Kconfig @@ -55,6 +55,7 @@ config TEGRA210_EMC tristate "NVIDIA Tegra210 External Memory Controller driver" depends on ARCH_TEGRA_210_SOC || COMPILE_TEST select TEGRA210_EMC_TABLE + select PM_OPP help This driver is for the External Memory Controller (EMC) found on Tegra210 chips. The EMC controls the external DRAM on the board. diff --git a/drivers/memory/tegra/tegra210-emc-core.c b/drivers/memory/tegr= a/tegra210-emc-core.c index e96ca4157d48182574310f8caf72687bed7cc16a..8991592794c888f75b9e7d2e59d= 911e364ffba92 100644 --- a/drivers/memory/tegra/tegra210-emc-core.c +++ b/drivers/memory/tegra/tegra210-emc-core.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -87,6 +88,13 @@ =20 #define LPDDR2_MR4_SRR GENMASK(2, 0) =20 +/* + * Tegra210 memory layout can be 1 channel at 64-bit or 2 channels at 32-b= it + * each. Either way, the total bus width will always be 64-bit. + */ +#define DRAM_DATA_BUS_WIDTH_BYTES (64 / 8) +#define DDR 2 + static const struct tegra210_emc_sequence *tegra210_emc_sequences[] =3D { &tegra210_emc_r21021, }; @@ -1569,6 +1577,79 @@ static int tegra210_emc_set_rate(struct device *dev, return 0; } =20 +static void tegra_emc_rate_requests_init(struct tegra210_emc *emc) +{ + unsigned int i; + + for (i =3D 0; i < EMC_RATE_TYPE_MAX; i++) { + emc->requested_rate[i].min_rate =3D 0; + emc->requested_rate[i].max_rate =3D ULONG_MAX; + } +} + +static int emc_request_rate(struct tegra210_emc *emc, + unsigned long new_min_rate, + unsigned long new_max_rate, + enum emc_rate_request_type type) +{ + struct emc_rate_request *req =3D emc->requested_rate; + unsigned long min_rate =3D 0, max_rate =3D ULONG_MAX; + unsigned int i; + int err; + + /* select minimum and maximum rates among the requested rates */ + for (i =3D 0; i < EMC_RATE_TYPE_MAX; i++, req++) { + if (i =3D=3D type) { + min_rate =3D max(new_min_rate, min_rate); + max_rate =3D min(new_max_rate, max_rate); + } else { + min_rate =3D max(req->min_rate, min_rate); + max_rate =3D min(req->max_rate, max_rate); + } + } + + if (min_rate > max_rate) { + dev_err_ratelimited(emc->dev, "%s: type %u: out of range: %lu %lu\n", + __func__, type, min_rate, max_rate); + return -ERANGE; + } + + err =3D clk_set_rate(emc->clk, min_rate); + if (err) + return err; + + emc->requested_rate[type].min_rate =3D new_min_rate; + emc->requested_rate[type].max_rate =3D new_max_rate; + + return 0; +} + +static int emc_set_min_rate(struct tegra210_emc *emc, unsigned long rate, + enum emc_rate_request_type type) +{ + struct emc_rate_request *req =3D &emc->requested_rate[type]; + int ret; + + mutex_lock(&emc->rate_lock); + ret =3D emc_request_rate(emc, rate, req->max_rate, type); + mutex_unlock(&emc->rate_lock); + + return ret; +} + +static int emc_set_max_rate(struct tegra210_emc *emc, unsigned long rate, + enum emc_rate_request_type type) +{ + struct emc_rate_request *req =3D &emc->requested_rate[type]; + int ret; + + mutex_lock(&emc->rate_lock); + ret =3D emc_request_rate(emc, req->min_rate, rate, type); + mutex_unlock(&emc->rate_lock); + + return ret; +} + /* * debugfs interface * @@ -1641,7 +1722,7 @@ static int tegra210_emc_debug_min_rate_set(void *data= , u64 rate) if (!tegra210_emc_validate_rate(emc, rate)) return -EINVAL; =20 - err =3D clk_set_min_rate(emc->clk, rate); + err =3D emc_set_min_rate(emc, rate, EMC_RATE_DEBUG); if (err < 0) return err; =20 @@ -1671,7 +1752,7 @@ static int tegra210_emc_debug_max_rate_set(void *data= , u64 rate) if (!tegra210_emc_validate_rate(emc, rate)) return -EINVAL; =20 - err =3D clk_set_max_rate(emc->clk, rate); + err =3D emc_set_max_rate(emc, rate, EMC_RATE_DEBUG); if (err < 0) return err; =20 @@ -1758,6 +1839,185 @@ static void tegra210_emc_debugfs_init(struct tegra2= 10_emc *emc) &tegra210_emc_debug_temperature_fops); } =20 +static inline struct tegra210_emc * +to_tegra210_emc_provider(struct icc_provider *provider) +{ + return container_of(provider, struct tegra210_emc, icc_provider); +} + +static struct icc_node_data * +emc_of_icc_xlate_extended(const struct of_phandle_args *spec, void *data) +{ + struct icc_provider *provider =3D data; + struct icc_node_data *ndata; + struct icc_node *node; + + /* External Memory is the only possible ICC route */ + list_for_each_entry(node, &provider->nodes, node_list) { + if (node->id !=3D TEGRA_ICC_EMEM) + continue; + + ndata =3D kzalloc(sizeof(*ndata), GFP_KERNEL); + if (!ndata) + return ERR_PTR(-ENOMEM); + + /* + * SRC and DST nodes should have matching TAG in order to have + * it set by default for a requested path. + */ + ndata->tag =3D TEGRA_MC_ICC_TAG_ISO; + ndata->node =3D node; + + return ndata; + } + + return ERR_PTR(-EPROBE_DEFER); +} + +static int emc_icc_set(struct icc_node *src, struct icc_node *dst) +{ + struct tegra210_emc *emc =3D to_tegra210_emc_provider(dst->provider); + unsigned long long peak_bw =3D icc_units_to_bps(dst->peak_bw); + unsigned long long avg_bw =3D icc_units_to_bps(dst->avg_bw); + unsigned long long rate =3D max(avg_bw, peak_bw); + int err; + + /* + * Tegra210 EMC runs on a clock rate of SDRAM bus. This means that + * EMC clock rate is twice smaller than the peak data rate because + * data is sampled on both EMC clock edges. + */ + do_div(rate, DDR * DRAM_DATA_BUS_WIDTH_BYTES); + rate =3D min_t(u64, rate, U32_MAX); + + err =3D emc_set_min_rate(emc, rate, EMC_RATE_ICC); + if (err) + return err; + + return 0; +} + +static int tegra_emc_icc_get_init_bw(struct icc_node *node, u32 *avg, u32 = *peak) +{ + *avg =3D 0; + *peak =3D 0; + + return 0; +} + +static int tegra_emc_interconnect_init(struct tegra210_emc *emc) +{ + const struct tegra_mc_soc *soc =3D emc->mc->soc; + struct icc_node *node; + int err; + + emc->icc_provider.dev =3D emc->dev; + emc->icc_provider.set =3D emc_icc_set; + emc->icc_provider.data =3D &emc->icc_provider; + emc->icc_provider.aggregate =3D soc->icc_ops->aggregate; + emc->icc_provider.xlate_extended =3D emc_of_icc_xlate_extended; + emc->icc_provider.get_bw =3D tegra_emc_icc_get_init_bw; + + icc_provider_init(&emc->icc_provider); + + /* create External Memory Controller node */ + node =3D icc_node_create(TEGRA_ICC_EMC); + if (IS_ERR(node)) { + err =3D PTR_ERR(node); + goto err_msg; + } + + node->name =3D "External Memory Controller"; + icc_node_add(node, &emc->icc_provider); + + /* link External Memory Controller to External Memory (DRAM) */ + err =3D icc_link_create(node, TEGRA_ICC_EMEM); + if (err) + goto remove_nodes; + + /* create External Memory node */ + node =3D icc_node_create(TEGRA_ICC_EMEM); + if (IS_ERR(node)) { + err =3D PTR_ERR(node); + goto remove_nodes; + } + + node->name =3D "External Memory (DRAM)"; + icc_node_add(node, &emc->icc_provider); + + err =3D icc_provider_register(&emc->icc_provider); + if (err) + goto remove_nodes; + + return 0; + +remove_nodes: + icc_nodes_remove(&emc->icc_provider); +err_msg: + dev_err(emc->dev, "failed to initialize ICC: %d\n", err); + + return err; +} + +static int tegra_emc_opp_table_init(struct tegra210_emc *emc) +{ + u32 hw_version =3D BIT(tegra_sku_info.soc_speedo_id); + struct dev_pm_opp *opp; + unsigned long rate; + int opp_token, err, max_opps, i; + + err =3D dev_pm_opp_set_supported_hw(emc->dev, &hw_version, 1); + if (err < 0) { + dev_err(emc->dev, "failed to set OPP supported HW: %d\n", err); + return err; + } + opp_token =3D err; + + err =3D dev_pm_opp_of_add_table(emc->dev); + if (err) { + if (err =3D=3D -ENODEV) + dev_warn(emc->dev, "OPP table not found, please update your device tree= \n"); + else + dev_err(emc->dev, "failed to add OPP table: %d\n", err); + + goto put_hw_table; + } + + max_opps =3D dev_pm_opp_get_opp_count(emc->dev); + if (max_opps <=3D 0) { + dev_err(emc->dev, "Failed to add OPPs\n"); + goto remove_table; + } + + if (emc->num_timings !=3D max_opps) { + dev_err(emc->dev, "OPP table does not match emc table\n"); + goto remove_table; + } + + for (i =3D 0; i < emc->num_timings; i++) { + rate =3D emc->timings[i].rate * 1000; + opp =3D dev_pm_opp_find_freq_exact(emc->dev, rate, true); + if (IS_ERR(opp)) { + dev_err(emc->dev, "Rate %lu not found in OPP table\n", rate); + goto remove_table; + } + + dev_pm_opp_put(opp); + } + + dev_info_once(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n", + hw_version, clk_get_rate(emc->clk) / 1000000); + + return 0; + +remove_table: + dev_pm_opp_of_remove_table(emc->dev); +put_hw_table: + dev_pm_opp_put_supported_hw(opp_token); + + return err; +} + static void tegra210_emc_detect(struct tegra210_emc *emc) { u32 value; @@ -1966,6 +2226,13 @@ static int tegra210_emc_probe(struct platform_device= *pdev) =20 tegra210_emc_debugfs_init(emc); =20 + err =3D tegra_emc_opp_table_init(emc); + if (!err) { + tegra_emc_rate_requests_init(emc); + tegra_emc_interconnect_init(emc); + } else if (err !=3D -ENODEV) + return err; + cd =3D devm_thermal_of_cooling_device_register(emc->dev, np, "emc", emc, &tegra210_emc_cd_ops); if (IS_ERR(cd)) { @@ -2050,6 +2317,7 @@ static struct platform_driver tegra210_emc_driver =3D= { .name =3D "tegra210-emc", .of_match_table =3D tegra210_emc_of_match, .pm =3D &tegra210_emc_pm_ops, + .sync_state =3D icc_sync_state, }, .probe =3D tegra210_emc_probe, .remove =3D tegra210_emc_remove, diff --git a/drivers/memory/tegra/tegra210-emc.h b/drivers/memory/tegra/teg= ra210-emc.h index 8988bcf1529072a7bdc93b185ebe0d51d82c1763..3c9142bfd5ae5c57bbc139e69e6= 2c893b50ce40c 100644 --- a/drivers/memory/tegra/tegra210-emc.h +++ b/drivers/memory/tegra/tegra210-emc.h @@ -8,6 +8,7 @@ =20 #include #include +#include #include #include =20 @@ -784,6 +785,17 @@ enum { #define TRIM_REGS_SIZE 138 #define BURST_REGS_SIZE 221 =20 +enum emc_rate_request_type { + EMC_RATE_DEBUG, + EMC_RATE_ICC, + EMC_RATE_TYPE_MAX, +}; + +struct emc_rate_request { + unsigned long min_rate; + unsigned long max_rate; +}; + struct tegra210_emc_per_channel_regs { u16 bank; u16 offset; @@ -932,6 +944,17 @@ struct tegra210_emc { } debugfs; =20 struct tegra210_clk_emc_provider provider; + + struct icc_provider icc_provider; + + /* + * There are multiple sources in the EMC driver which could request + * a min/max clock rate, these rates are contained in this array. + */ + struct emc_rate_request requested_rate[EMC_RATE_TYPE_MAX]; + + /* protect shared rate-change code path */ + struct mutex rate_lock; }; =20 struct tegra210_emc_sequence { diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra21= 0.c index cfa61dd885577a8fbd79c396a1316101197ca1f2..20828a07d2d0cafa739b534c20c= 12f065b276669 100644 --- a/drivers/memory/tegra/tegra210.c +++ b/drivers/memory/tegra/tegra210.c @@ -3,6 +3,9 @@ * Copyright (C) 2015 NVIDIA CORPORATION. All rights reserved. */ =20 +#include +#include + #include =20 #include "mc.h" @@ -1273,6 +1276,83 @@ static const struct tegra_mc_reset tegra210_mc_reset= s[] =3D { TEGRA210_MC_RESET(TSECB, 0x970, 0x974, 13), }; =20 +static int tegra210_mc_icc_set(struct icc_node *src, struct icc_node *dst) +{ + /* TODO: program PTSA */ + return 0; +} + +static int tegra210_mc_icc_aggregate(struct icc_node *node, u32 tag, u32 a= vg_bw, + u32 peak_bw, u32 *agg_avg, u32 *agg_peak) +{ + /* + * ISO clients need to reserve extra bandwidth up-front because + * there could be high bandwidth pressure during initial filling + * of the client's FIFO buffers. Secondly, we need to take into + * account impurities of the memory subsystem. + */ + if (tag & TEGRA_MC_ICC_TAG_ISO) + peak_bw =3D tegra_mc_scale_percents(peak_bw, 400); + + *agg_avg +=3D avg_bw; + *agg_peak =3D max(*agg_peak, peak_bw); + + return 0; +} + +static struct icc_node_data * +tegra210_mc_of_icc_xlate_extended(const struct of_phandle_args *spec, void= *data) +{ + struct tegra_mc *mc =3D icc_provider_to_tegra_mc(data); + const struct tegra_mc_client *client; + unsigned int i, idx =3D spec->args[0]; + struct icc_node_data *ndata; + struct icc_node *node; + + list_for_each_entry(node, &mc->provider.nodes, node_list) { + if (node->id !=3D idx) + continue; + + ndata =3D kzalloc(sizeof(*ndata), GFP_KERNEL); + if (!ndata) + return ERR_PTR(-ENOMEM); + + client =3D &mc->soc->clients[idx]; + ndata->node =3D node; + + switch (client->swgroup) { + case TEGRA_SWGROUP_DC: + case TEGRA_SWGROUP_DCB: + case TEGRA_SWGROUP_PTC: + case TEGRA_SWGROUP_VI: + /* these clients are isochronous by default */ + ndata->tag =3D TEGRA_MC_ICC_TAG_ISO; + break; + + default: + ndata->tag =3D TEGRA_MC_ICC_TAG_DEFAULT; + break; + } + + return ndata; + } + + for (i =3D 0; i < mc->soc->num_clients; i++) { + if (mc->soc->clients[i].id =3D=3D idx) + return ERR_PTR(-EPROBE_DEFER); + } + + dev_err(mc->dev, "invalid ICC client ID %u\n", idx); + + return ERR_PTR(-EINVAL); +} + +static const struct tegra_mc_icc_ops tegra210_mc_icc_ops =3D { + .xlate_extended =3D tegra210_mc_of_icc_xlate_extended, + .aggregate =3D tegra210_mc_icc_aggregate, + .set =3D tegra210_mc_icc_set, +}; + const struct tegra_mc_soc tegra210_mc_soc =3D { .clients =3D tegra210_mc_clients, .num_clients =3D ARRAY_SIZE(tegra210_mc_clients), @@ -1286,5 +1366,6 @@ const struct tegra_mc_soc tegra210_mc_soc =3D { .reset_ops =3D &tegra_mc_reset_ops_common, .resets =3D tegra210_mc_resets, .num_resets =3D ARRAY_SIZE(tegra210_mc_resets), + .icc_ops =3D &tegra210_mc_icc_ops, .ops =3D &tegra30_mc_ops, }; --=20 2.50.1 From nobody Tue Sep 9 16:20:06 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 16FE3296BDF; Sat, 6 Sep 2025 20:17:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; cv=none; b=Byut7TLWEwMrud+4EF8/MC1fn5eDIFbm6NKtmd2iXOruI1DqFPQwGvQjNYjY3Mbwi0rm81bAH7tyb67zX70BOpneMO6jduDj1tdj1YSMljoKQPiVAr5IluoTLize/GgffC4GLMPRdaoicw0uDFtGYcQq3jLQok1ICAwHZC4Zsnc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; c=relaxed/simple; bh=QE+tJk1zGwmAgzpewZ2cpQB2QWRaftfJfeA1AtKdsDQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=LCCwPtMGnElfM5hN5Fv/fR31RQN4ejK/jjpFHx5+oE+TzNiSJ2WhKxo/aNNZ2mR+VLsPlVwixVPfZUl1yO+OXELJ8l93b2arx6JR3fdnMBrvtMSGaEnsJREfPKR4EJekCCrEkJZtRDP5gZWD1w7spe6DoxbRB2MLGc5cMo8tXFU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hL4sOwWF; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hL4sOwWF" Received: by smtp.kernel.org (Postfix) with ESMTPS id B685CC4AF10; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757189855; bh=QE+tJk1zGwmAgzpewZ2cpQB2QWRaftfJfeA1AtKdsDQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=hL4sOwWFatJxFYvhTyNgmap21Uy4OX0X/dbc1Dd745TVertZfa6aRHE6FyxZ8G5Tm uHPskiVrtR/LQpb0obG5vGVc5PZROWnHkWJsOmzE/EG4TFBuw+EHlmyJFNP7OPoW6d LKYKqi53nuVEcTV5OK+aacZYo57g0wi+2u1YYgiHNja7HWRxNqz9EVvJyz8+dBnIGL dkUhZK/3o2r5FpqfS/rKYjYh5/KEa+lYH21zT+15AHt5c919MEqCjWuuzd2kXD7zTf hVwmMqmdG0c3/whlY7jflMUt5cBhNaN6CE3I5kGetvCgRvHrq3HKdxqVQmaGuLxoPm eZw+PToKzHxxg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE26ECAC582; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) From: Aaron Kling via B4 Relay Date: Sat, 06 Sep 2025 15:16:56 -0500 Subject: [PATCH v3 6/9] soc: tegra: fuse: speedo-tegra210: Add soc speedo 2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250906-t210-actmon-v3-6-1403365d571e@gmail.com> References: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> In-Reply-To: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Thierry Reding , Jonathan Hunter , Krzysztof Kozlowski , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Dmitry Osipenko Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, Aaron Kling X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757189854; l=904; i=webgeek1234@gmail.com; s=20250217; h=from:subject:message-id; bh=IRRKZEiLQdonkqHTuobp6JolP/SAC2dsrByPD6yqKl4=; b=PZmk3AyXp13NbqIXi+I2Q47roGCN8f7EhFZnsHsZfE+JmBXRjxGRgUyiytVzKXZcCnx4RN8l7 s7FH05RfIBkCLL3Pau8z+n34Ew3RgYOQ7m2ZZVnIstNn3U3ONBzu2Y5 X-Developer-Key: i=webgeek1234@gmail.com; a=ed25519; pk=TQwd6q26txw7bkK7B8qtI/kcAohZc7bHHGSD7domdrU= X-Endpoint-Received: by B4 Relay for webgeek1234@gmail.com/20250217 with auth_id=342 X-Original-From: Aaron Kling Reply-To: webgeek1234@gmail.com From: Aaron Kling The Jetson Nano series of modules only have 2 emc table entries, different from other soc sku's. As the emc driver uses the soc speedo to populate the emc opp tables, add a new speedo id to uniquely identify this. Signed-off-by: Aaron Kling --- drivers/soc/tegra/fuse/speedo-tegra210.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/tegra/fuse/speedo-tegra210.c b/drivers/soc/tegra/f= use/speedo-tegra210.c index 60356159e00d2059e55eaacba27b5ca63bf96c90..c310bdabcfd06ea8f23facb4eaa= f209f183dc4eb 100644 --- a/drivers/soc/tegra/fuse/speedo-tegra210.c +++ b/drivers/soc/tegra/fuse/speedo-tegra210.c @@ -97,6 +97,7 @@ static void __init rev_sku_to_speedo_ids(struct tegra_sku= _info *sku_info, break; =20 case 0x8F: + sku_info->soc_speedo_id =3D 2; sku_info->cpu_speedo_id =3D 9; sku_info->gpu_speedo_id =3D 2; break; --=20 2.50.1 From nobody Tue Sep 9 16:20:06 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3FF7029BDBD; Sat, 6 Sep 2025 20:17:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; cv=none; b=swcjJ5vyh7y49TPLA3ldqr3XRA3Vk2hbYmc6Bo3O33Vzf5tblTFOayK8j7JhekX/WNrF57GBz7eKHYSky/WP7vB9kJwC+lgTitlDw9+hzEtrvDrpFT2C7xD9yXt6v29dnAfXENzxEXtvhbO2o8BNHMjI1dkDZt2YVAdai6fcX4k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; c=relaxed/simple; bh=+IqvVuotGYuZApHW8p/VIh20PCQhO97R0C9yu9c5l84=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Xy/S5iYbSaiacMGPO6UCDs9MnmYZqrk86bKeX3qyA7nLWIOwEeYxEr+WX8UgmBxCLYuOzn6QBgejHka5s+A7HemoobQRIYIVZVil+Cwv1+ZQ1yKp5IBq4Z1vc/R0YUxJ53dwubz59bVFkp+dJPvn2wA5c1EACF19dBEPW9LRqls= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=H07Addjb; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="H07Addjb" Received: by smtp.kernel.org (Postfix) with ESMTPS id C5AA0C113CF; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757189855; bh=+IqvVuotGYuZApHW8p/VIh20PCQhO97R0C9yu9c5l84=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=H07AddjbTgLGf/R77VrRRDTTjEkQ+VhQlNdD9XVBeMywcaBE5HT/5eFnoS9HyaJwt dJoyKFsh+ylIgi1zQZRIkRYoX01PbrdheHtCN6a0SMhsI+tZuhh/JgQ6viCfdGeDiZ kQqiRhgG2vTIdXK5yOf55YwOxAJPr+RgcVr+MtkIdFGmIQQ6j9ZmAbu9xybDTgra/7 ULQA1tZklmO+qhYU/yy1MJ78Xqyfekh9IdYxWwVQwKmTziKsza1Ssr/KpngS9zniEf /gxy4WGlaPtdkM1HGgCZddnN6pF34P9W/FJvqYPMrHmNGXxhcP2HXP1zkFehXelyqw ExRazu1yA6FOg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC2B5CA101F; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) From: Aaron Kling via B4 Relay Date: Sat, 06 Sep 2025 15:16:57 -0500 Subject: [PATCH v3 7/9] arm64: tegra: tegra210: Add actmon Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250906-t210-actmon-v3-7-1403365d571e@gmail.com> References: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> In-Reply-To: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Thierry Reding , Jonathan Hunter , Krzysztof Kozlowski , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Dmitry Osipenko Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, Aaron Kling X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757189854; l=1154; i=webgeek1234@gmail.com; s=20250217; h=from:subject:message-id; bh=JRVT2B6B9kttupzRP71VsPsEx2g3JnQatmD4nEG5i7w=; b=Ek2dia8bo7+jRy6ILec8xFU4HhpqJTduARxdJ90BYhcVDJ30+9pSw1KR2przrw90mgmht2y+g 2GS4YdII+IJD08nUJWFzre6HyYF9EqXNbEt9tkvd5XeAskPtEpEylPn X-Developer-Key: i=webgeek1234@gmail.com; a=ed25519; pk=TQwd6q26txw7bkK7B8qtI/kcAohZc7bHHGSD7domdrU= X-Endpoint-Received: by B4 Relay for webgeek1234@gmail.com/20250217 with auth_id=342 X-Original-From: Aaron Kling Reply-To: webgeek1234@gmail.com From: Aaron Kling This enables the action monitor to facilitate dynamic frequency scaling. Signed-off-by: Aaron Kling --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts= /nvidia/tegra210.dtsi index 402b0ede1472af625d9d9e811f5af306d436cc98..6da10db893add44a98fde1666c3= 82511212fd43c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -485,6 +485,18 @@ flow-controller@60007000 { reg =3D <0x0 0x60007000 0x0 0x1000>; }; =20 + actmon@6000c800 { + compatible =3D "nvidia,tegra210-actmon", "nvidia,tegra124-actmon"; + reg =3D <0x0 0x6000c800 0x0 0x400>; + interrupts =3D ; + clocks =3D <&tegra_car TEGRA210_CLK_ACTMON>, + <&tegra_car TEGRA210_CLK_EMC>; + clock-names =3D "actmon", "emc"; + resets =3D <&tegra_car 119>; + reset-names =3D "actmon"; + #cooling-cells =3D <2>; + }; + gpio: gpio@6000d000 { compatible =3D "nvidia,tegra210-gpio", "nvidia,tegra30-gpio"; reg =3D <0x0 0x6000d000 0x0 0x1000>; --=20 2.50.1 From nobody Tue Sep 9 16:20:06 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4005229C326; Sat, 6 Sep 2025 20:17:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; cv=none; b=dg8qMn6j0luSY0JN2ZiFsqNZleKaevzR1lWmY62TRGeoYIC7a7dL1Esqxy6qc00ekYTuvo9TNiQE1bIt+dgZAwUXSwnTQxz0ppui4VYVpERiYZme4rqZBzpNKuUQC4qfRhVKD7vSeCrp3IgqXl/cUOjZAZsYtFPjd8jGYdNeVVM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; c=relaxed/simple; bh=gosAl1zQ0z5viYliFA0S6p65O6ADdSW+IUkYdiR08BU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tjsXlVTN8JcsdkOjnyCX2yNPLCAwjOhR5OgLHb+2ZQc7/CpyTZ0UGO3Q5OECwXrgAFVcmzqnu9HzGNgquX4AGxRNXrl1inMjupJzk8j6CoACsfIMPbxB87W12649dQNiuY/8xFhKrhg9HBPCYqFdkJCx9euWXiWrDfzGxkUE8Ak= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KkTxoxZ4; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KkTxoxZ4" Received: by smtp.kernel.org (Postfix) with ESMTPS id D1B6AC4AF13; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757189855; bh=gosAl1zQ0z5viYliFA0S6p65O6ADdSW+IUkYdiR08BU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=KkTxoxZ4GzG45ugCGMZ5ukBBQo1bbtT8e8oAn8ZB/c8EDA6YLQesxZkryT9rnwMGJ R/6p1rWFFDtUhW1fgE8Av75mXiwnlL654HCpOE7MQq9VbGomSOjlnZ6a7h5PvwO7D5 rBXL4Lf1DjrgHq8j2fzxpda6l16WRzS6Jt7H3dfYmE3Tzsv9s8CeWQ4FV+HHR8IMSn 5If9uANEHZ2XCgh0xb+cK1Ru1biHe9Sxvb7mfIrxjWhL1NUGWC6XzwDAW4EeUT2vrL KJfe6uxViZ1OwlSx6xwc7VfdtsYmrktOKH51teaXOLZp91kvqCjfAYqoHTJehsUVzS /tuXhHns1sgpw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB27BCAC583; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) From: Aaron Kling via B4 Relay Date: Sat, 06 Sep 2025 15:16:58 -0500 Subject: [PATCH v3 8/9] arm64: tegra: Add interconnect properties to Tegra210 device-tree Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250906-t210-actmon-v3-8-1403365d571e@gmail.com> References: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> In-Reply-To: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Thierry Reding , Jonathan Hunter , Krzysztof Kozlowski , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Dmitry Osipenko Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, Aaron Kling X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757189854; l=2042; i=webgeek1234@gmail.com; s=20250217; h=from:subject:message-id; bh=dV5rTm0DsZp/CMwTv4aBWDsgqy68fQx2GO3uvjxraWo=; b=S4uvmqs7odtVkYbIwXsnCkesoYxuVCSldVJRtbmXkFPf8RoJ2YqmghlfntDBLSMX97g4sOMrj dJHCTkjupbpBRPaEnFCK/xU423mSwDJ6aFb5L2W/tcL/zmSBsbirbmH X-Developer-Key: i=webgeek1234@gmail.com; a=ed25519; pk=TQwd6q26txw7bkK7B8qtI/kcAohZc7bHHGSD7domdrU= X-Endpoint-Received: by B4 Relay for webgeek1234@gmail.com/20250217 with auth_id=342 X-Original-From: Aaron Kling Reply-To: webgeek1234@gmail.com From: Aaron Kling Add interconnect properties to the Memory Controller, External Memory Controller and the Display Controller nodes in order to describe hardware interconnection. Signed-off-by: Aaron Kling --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts= /nvidia/tegra210.dtsi index 6da10db893add44a98fde1666c382511212fd43c..2fcc7a28690f7100d49e8b93c4f= b77de7947b002 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -202,6 +202,19 @@ dc@54200000 { =20 nvidia,outputs =3D <&dsia &dsib &sor0 &sor1>; nvidia,head =3D <0>; + + interconnects =3D <&mc TEGRA210_MC_DISPLAY0A &emc>, + <&mc TEGRA210_MC_DISPLAY0B &emc>, + <&mc TEGRA210_MC_DISPLAY0C &emc>, + <&mc TEGRA210_MC_DISPLAYHC &emc>, + <&mc TEGRA210_MC_DISPLAYD &emc>, + <&mc TEGRA210_MC_DISPLAYT &emc>; + interconnect-names =3D "wina", + "winb", + "winc", + "cursor", + "wind", + "wint"; }; =20 dc@54240000 { @@ -217,6 +230,15 @@ dc@54240000 { =20 nvidia,outputs =3D <&dsia &dsib &sor0 &sor1>; nvidia,head =3D <1>; + + interconnects =3D <&mc TEGRA210_MC_DISPLAY0AB &emc>, + <&mc TEGRA210_MC_DISPLAY0BB &emc>, + <&mc TEGRA210_MC_DISPLAY0CB &emc>, + <&mc TEGRA210_MC_DISPLAYHCB &emc>; + interconnect-names =3D "wina", + "winb", + "winc", + "cursor"; }; =20 dsia: dsi@54300000 { @@ -990,6 +1012,7 @@ mc: memory-controller@70019000 { =20 #iommu-cells =3D <1>; #reset-cells =3D <1>; + #interconnect-cells =3D <1>; }; =20 emc: external-memory-controller@7001b000 { @@ -1001,6 +1024,7 @@ emc: external-memory-controller@7001b000 { clock-names =3D "emc"; interrupts =3D ; nvidia,memory-controller =3D <&mc>; + #interconnect-cells =3D <0>; #cooling-cells =3D <2>; }; =20 --=20 2.50.1 From nobody Tue Sep 9 16:20:06 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3FDF329BDBA; Sat, 6 Sep 2025 20:17:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; cv=none; b=ZlGTFX4RhO5z6UdF2hnE0R6xadFcvM+NnmeDBOAMwg+M2RBBMqlS/5QcE+12lHTxqVK1cQHdGtBKAjcDvCOYRa5t/WODiVsozpgtzPUo7pRSrB0TqaCaOcreZ9tPBUsyA/6XAFxbpEUrdnnCJUgfLsrVUOc8U9ETA4hoU5iWhvE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757189856; c=relaxed/simple; bh=Xd0tRNw2ps86hJT24DbMzh+hXIm82G3Vlj9OA8R/33g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=aefqzDMtMgl+NkiYYq/VtFS5C/Wl/aFyETKgANTb2zaehOr+68hlkw48jzkqQH3OpAWKzr6MgXFYo3ZCbu6n/ExL6h9SLhbbu/tk7xghK6WiSymTe3dfTNNGhCjpBEhp7eK7sgn6cr1OYIP60GEpQMFAnF0gmbeMyH6Fc6g0kR8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=cWFCuawi; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="cWFCuawi" Received: by smtp.kernel.org (Postfix) with ESMTPS id E1E6FC4CEFB; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757189855; bh=Xd0tRNw2ps86hJT24DbMzh+hXIm82G3Vlj9OA8R/33g=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=cWFCuawiwmQk8/U/EPLBLf4vuXJX5OkY3QbR7IigiT6ClvN950THAMmRcQ7A3Kwht XMkr4f18TEOW7jY6BK9c/bk6hy1ZaDoa52FI6wBgDQEeFCmRAcT939ppwy3FHcqJn8 nER79AXdx/xe3BPjYobd3NA3YQJqBdtXI8fkgkz+QyU0VRCIcu3tn5lkU41a8/1SQS l3Iv5eVU+iISgI02Hsao55RMzo4fwJQapOtLzAQIWJ8iKTzEunLDhGV+L5ax/roAQX zsfnfqI3DLCeLnnHJe4Ckj2cczVB2AU4TkiKxqBFGgIj1gm45heKMsB1HkJcQJAsWu 06nfreBkNZLig== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA3E0CA0FED; Sat, 6 Sep 2025 20:17:35 +0000 (UTC) From: Aaron Kling via B4 Relay Date: Sat, 06 Sep 2025 15:16:59 -0500 Subject: [PATCH v3 9/9] arm64: tegra: Add OPP tables on Tegra210 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250906-t210-actmon-v3-9-1403365d571e@gmail.com> References: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> In-Reply-To: <20250906-t210-actmon-v3-0-1403365d571e@gmail.com> To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Thierry Reding , Jonathan Hunter , Krzysztof Kozlowski , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Dmitry Osipenko Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, Aaron Kling X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757189854; l=4992; i=webgeek1234@gmail.com; s=20250217; h=from:subject:message-id; bh=BuMztMnAqa18LOpanMPfXZmvaUGQqA9O6CgvPF/UAwU=; b=eFekEBzfuYZIf1hLENyeEVVI0RDYPqtMvwfaX/vi62E9SVvKpTam39MEI9y+C+rFiqKSEsrLY xGPnyw0KE7LD34sZeDYucAIjzLZGZs2S9RNw/rRzkwoeSH4lmkGsSbd X-Developer-Key: i=webgeek1234@gmail.com; a=ed25519; pk=TQwd6q26txw7bkK7B8qtI/kcAohZc7bHHGSD7domdrU= X-Endpoint-Received: by B4 Relay for webgeek1234@gmail.com/20250217 with auth_id=342 X-Original-From: Aaron Kling Reply-To: webgeek1234@gmail.com From: Aaron Kling This adds OPP tables for actmon and emc, enabling dynamic frequency scaling for ram. Signed-off-by: Aaron Kling --- .../boot/dts/nvidia/tegra210-peripherals-opp.dtsi | 135 +++++++++++++++++= ++++ arch/arm64/boot/dts/nvidia/tegra210.dtsi | 7 ++ 2 files changed, 142 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-peripherals-opp.dtsi b/arc= h/arm64/boot/dts/nvidia/tegra210-peripherals-opp.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..bf2527d737932a1f41aa83d61f4= 4d87ba52b0519 --- /dev/null +++ b/arch/arm64/boot/dts/nvidia/tegra210-peripherals-opp.dtsi @@ -0,0 +1,135 @@ +// SPDX-License-Identifier: GPL-2.0 + +/ { + /* EMC DVFS OPP table */ + emc_icc_dvfs_opp_table: opp-table-dvfs0 { + compatible =3D "operating-points-v2"; + + opp-40800000-800 { + opp-microvolt =3D <800000 800000 1150000>; + opp-hz =3D /bits/ 64 <40800000>; + opp-supported-hw =3D <0x0003>; + }; + + opp-68000000-800 { + opp-microvolt =3D <800000 800000 1150000>; + opp-hz =3D /bits/ 64 <68000000>; + opp-supported-hw =3D <0x0003>; + }; + + opp-102000000-800 { + opp-microvolt =3D <800000 800000 1150000>; + opp-hz =3D /bits/ 64 <102000000>; + opp-supported-hw =3D <0x0003>; + }; + + opp-204000000-800 { + opp-microvolt =3D <800000 800000 1150000>; + opp-hz =3D /bits/ 64 <204000000>; + opp-supported-hw =3D <0x0007>; + opp-suspend; + }; + + opp-408000000-812 { + opp-microvolt =3D <812000 812000 1150000>; + opp-hz =3D /bits/ 64 <408000000>; + opp-supported-hw =3D <0x0003>; + }; + + opp-665600000-825 { + opp-microvolt =3D <825000 825000 1150000>; + opp-hz =3D /bits/ 64 <665600000>; + opp-supported-hw =3D <0x0003>; + }; + + opp-800000000-825 { + opp-microvolt =3D <825000 825000 1150000>; + opp-hz =3D /bits/ 64 <800000000>; + opp-supported-hw =3D <0x0003>; + }; + + opp-1065600000-837 { + opp-microvolt =3D <837000 837000 1150000>; + opp-hz =3D /bits/ 64 <1065600000>; + opp-supported-hw =3D <0x0003>; + }; + + opp-1331200000-850 { + opp-microvolt =3D <850000 850000 1150000>; + opp-hz =3D /bits/ 64 <1331200000>; + opp-supported-hw =3D <0x0003>; + }; + + opp-1600000000-887 { + opp-microvolt =3D <887000 887000 1150000>; + opp-hz =3D /bits/ 64 <1600000000>; + opp-supported-hw =3D <0x0007>; + }; + }; + + /* EMC bandwidth OPP table */ + emc_bw_dfs_opp_table: opp-table-dvfs1 { + compatible =3D "operating-points-v2"; + + opp-40800000 { + opp-hz =3D /bits/ 64 <40800000>; + opp-supported-hw =3D <0x0003>; + opp-peak-kBps =3D <652800>; + }; + + opp-68000000 { + opp-hz =3D /bits/ 64 <68000000>; + opp-supported-hw =3D <0x0003>; + opp-peak-kBps =3D <1088000>; + }; + + opp-102000000 { + opp-hz =3D /bits/ 64 <102000000>; + opp-supported-hw =3D <0x0003>; + opp-peak-kBps =3D <1632000>; + }; + + opp-204000000 { + opp-hz =3D /bits/ 64 <204000000>; + opp-supported-hw =3D <0x0007>; + opp-peak-kBps =3D <3264000>; + opp-suspend; + }; + + opp-408000000 { + opp-hz =3D /bits/ 64 <408000000>; + opp-supported-hw =3D <0x0003>; + opp-peak-kBps =3D <6528000>; + }; + + opp-665600000 { + opp-hz =3D /bits/ 64 <665600000>; + opp-supported-hw =3D <0x0003>; + opp-peak-kBps =3D <10649600>; + }; + + opp-800000000 { + opp-hz =3D /bits/ 64 <800000000>; + opp-supported-hw =3D <0x001F>; + opp-peak-kBps =3D <12800000>; + }; + + opp-1065600000 { + opp-hz =3D /bits/ 64 <1065600000>; + opp-supported-hw =3D <0x0003>; + opp-peak-kBps =3D <17049600>; + }; + + opp-1331200000 { + opp-hz =3D /bits/ 64 <1331200000>; + opp-supported-hw =3D <0x0003>; + opp-peak-kBps =3D <21299200>; + }; + + opp-1600000000 { + opp-hz =3D /bits/ 64 <1600000000>; + opp-supported-hw =3D <0x0007>; + opp-peak-kBps =3D <25600000>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts= /nvidia/tegra210.dtsi index 2fcc7a28690f7100d49e8b93c4fb77de7947b002..f2961c9e12db1cf91254b753897= 79955f2a0956d 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -9,6 +9,8 @@ #include #include =20 +#include "tegra210-peripherals-opp.dtsi" + / { compatible =3D "nvidia,tegra210"; interrupt-parent =3D <&lic>; @@ -516,6 +518,9 @@ actmon@6000c800 { clock-names =3D "actmon", "emc"; resets =3D <&tegra_car 119>; reset-names =3D "actmon"; + operating-points-v2 =3D <&emc_bw_dfs_opp_table>; + interconnects =3D <&mc TEGRA210_MC_MPCORER &emc>; + interconnect-names =3D "cpu-read"; #cooling-cells =3D <2>; }; =20 @@ -1024,6 +1029,8 @@ emc: external-memory-controller@7001b000 { clock-names =3D "emc"; interrupts =3D ; nvidia,memory-controller =3D <&mc>; + operating-points-v2 =3D <&emc_icc_dvfs_opp_table>; + #interconnect-cells =3D <0>; #cooling-cells =3D <2>; }; --=20 2.50.1