From nobody Tue Sep 9 11:43:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9B7FC2F3617; Sat, 6 Sep 2025 15:43:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757173420; cv=none; b=iMbJAvQJv35ibef+ArCYkOYx4VTsJCGRdMIMvAQmWEX/bwjZBpGPtL+100y0KvqRiyQSBdrHokaae5yU8zp1XOn/gg9y2AzpcMe6ZXquuxP+0NMi7+LrjOOIpePF1DmOcUD/9cFRF4hzMhAnSuCUDb5qgMuSo+OhUexzO01L+X4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757173420; c=relaxed/simple; bh=lzelPEXSZTkAt+allO9OotxrvW+99EFSJPCR1h9x6Yo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BlqozIgYoEog9QXOvNSSbcfziIeTPq3Pd2skyrvawrFrhXtJS/JwYlRYZa5ZFGTRnMjGy8FwnHM5x2qkJp/gegxvL+HyInKnJe8hEYx6wlKQEeUH58vSE85rLr2xobuFqPVsKHQfK+ZnfqmdMEu/g1HybEncLmvgpTZE/IkYAhA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LJqTYWep; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LJqTYWep" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5981CC113D0; Sat, 6 Sep 2025 15:43:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757173420; bh=lzelPEXSZTkAt+allO9OotxrvW+99EFSJPCR1h9x6Yo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=LJqTYWepXzKTLRMxGgLVWIEHNdEEjcdx9WpG0AKmkfVkRta0jqV7Foh0Hq6EX5Abb 7b3ozwsHhDGtEQetpvBNrwkRCiTGD/Za3SY0v+V5vacrgyy+obWnjWXGFnj9DJAgaI GU3bl8iIxYddARwxe5CTo3UwDfLgmDJyCthWv1XtGCqaXdB70h3lXKDcvtK0NYtMhb AoYb6RXv/XAcI+Bmw/6YClBGQDIqKWDK3XBdlXkwfsMGyPDUAOQ6SqrGp4JxSG4awP MxgsdGd3LMcbl7RQOjCOqqeLrBCsHbJGtecOh1wrM6/0lFcGaX9GC4VbxbE4RBFyum HzxwSfbe/QRUA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 406B6CA0FED; Sat, 6 Sep 2025 15:43:40 +0000 (UTC) From: Sven Peter Date: Sat, 06 Sep 2025 15:43:30 +0000 Subject: [PATCH v2 17/22] soc: apple: Add hardware tunable support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250906-atcphy-6-17-v2-17-52c348623ef6@kernel.org> References: <20250906-atcphy-6-17-v2-0-52c348623ef6@kernel.org> In-Reply-To: <20250906-atcphy-6-17-v2-0-52c348623ef6@kernel.org> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Felipe Balbi , Janne Grunau , Alyssa Rosenzweig , Neal Gompa , Vinod Koul , Kishon Vijay Abraham I , Thinh Nguyen , Heikki Krogerus , Philipp Zabel , Frank Li , Ran Wang , Peter Chen Cc: linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, Sven Peter X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6132; i=sven@kernel.org; h=from:subject:message-id; bh=lzelPEXSZTkAt+allO9OotxrvW+99EFSJPCR1h9x6Yo=; b=owGbwMvMwCHmIlirolUq95LxtFoSQ8aesCXvLq1+k2bPsV9yM+OsT+ZKdhFWjw5f750Yn9zU5 FKXtI+vo5SFQYyDQVZMkWX7fnvTJw/fCC7ddOk9zBxWJpAhDFycAjCRO6UM/7NfTLpgeGPuFkWB 7ewfrU44BidaOa/blxpYMM11XVXgnmcM//Q6X7Qadql9VdPLPp6qcbuj7l7dxJnxrnfVfIz9Rb4 bsAEA X-Developer-Key: i=sven@kernel.org; a=openpgp; fpr=A1E3E34A2B3C820DBC4955E5993B08092F131F93 X-Endpoint-Received: by B4 Relay for sven@kernel.org/default with auth_id=407 Various hardware, like the Type-C PHY or the Thunderbolt/USB4 NHI, present on Apple SoCs need machine-specific tunables passed from our bootloader m1n1 to the device tree. Add generic helpers so that we don't have to duplicate this across multiple drivers. Signed-off-by: Sven Peter Reviewed-by: Alyssa Rosenzweig --- drivers/soc/apple/Kconfig | 4 +++ drivers/soc/apple/Makefile | 3 ++ drivers/soc/apple/tunable.c | 71 +++++++++++++++++++++++++++++++++++= ++++ include/linux/soc/apple/tunable.h | 60 +++++++++++++++++++++++++++++++++ 4 files changed, 138 insertions(+) diff --git a/drivers/soc/apple/Kconfig b/drivers/soc/apple/Kconfig index 6388cbe1e56b5a9d90acad3ee2377ed6ac0d207d..f266b70fd9620cc940dc685f7eb= 2972c21a361df 100644 --- a/drivers/soc/apple/Kconfig +++ b/drivers/soc/apple/Kconfig @@ -41,6 +41,10 @@ config APPLE_SART =20 Say 'y' here if you have an Apple SoC. =20 +config APPLE_TUNABLE + tristate + depends on ARCH_APPLE || COMPILE_TEST + endmenu =20 endif diff --git a/drivers/soc/apple/Makefile b/drivers/soc/apple/Makefile index 4d9ab8f3037b7159771d8817fa507ba29f99ae10..0b85ab61aefe131349a67d0aa80= 204edd8e89925 100644 --- a/drivers/soc/apple/Makefile +++ b/drivers/soc/apple/Makefile @@ -8,3 +8,6 @@ apple-rtkit-y =3D rtkit.o rtkit-crashlog.o =20 obj-$(CONFIG_APPLE_SART) +=3D apple-sart.o apple-sart-y =3D sart.o + +obj-$(CONFIG_APPLE_TUNABLE) +=3D apple-tunable.o +apple-tunable-y =3D tunable.o diff --git a/drivers/soc/apple/tunable.c b/drivers/soc/apple/tunable.c new file mode 100644 index 0000000000000000000000000000000000000000..c54da8ef28cef16118c518c761f= 95e8dd9f78002 --- /dev/null +++ b/drivers/soc/apple/tunable.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Apple Silicon hardware tunable support + * + * Each tunable is a list with each entry containing a offset into the MMIO + * region, a mask of bits to be cleared and a set of bits to be set. These + * tunables are passed along by the previous boot stages and vary from dev= ice + * to device such that they cannot be hardcoded in the individual drivers. + * + * Copyright (C) The Asahi Linux Contributors + */ + +#include +#include +#include +#include + +struct apple_tunable *devm_apple_tunable_parse(struct device *dev, + struct device_node *np, + const char *name) +{ + struct apple_tunable *tunable; + struct property *prop; + const __be32 *p; + size_t sz; + int i; + + prop =3D of_find_property(np, name, NULL); + if (!prop) + return ERR_PTR(-ENOENT); + + if (prop->length % (3 * sizeof(u32))) + return ERR_PTR(-EINVAL); + sz =3D prop->length / (3 * sizeof(u32)); + + tunable =3D devm_kzalloc(dev, + sizeof(*tunable) + sz * sizeof(*tunable->values), + GFP_KERNEL); + if (!tunable) + return ERR_PTR(-ENOMEM); + tunable->sz =3D sz; + + for (i =3D 0, p =3D NULL; i < tunable->sz; ++i) { + p =3D of_prop_next_u32(prop, p, &tunable->values[i].offset); + p =3D of_prop_next_u32(prop, p, &tunable->values[i].mask); + p =3D of_prop_next_u32(prop, p, &tunable->values[i].value); + } + + return tunable; +} +EXPORT_SYMBOL(devm_apple_tunable_parse); + +void apple_tunable_apply(void __iomem *regs, struct apple_tunable *tunable) +{ + size_t i; + + for (i =3D 0; i < tunable->sz; ++i) { + u32 val, old_val; + + val =3D old_val =3D readl_relaxed(regs + tunable->values[i].offset); + val &=3D ~tunable->values[i].mask; + val |=3D tunable->values[i].value; + if (val !=3D old_val) + writel_relaxed(val, regs + tunable->values[i].offset); + } +} +EXPORT_SYMBOL(apple_tunable_apply); + +MODULE_LICENSE("Dual MIT/GPL"); +MODULE_AUTHOR("Sven Peter "); +MODULE_DESCRIPTION("Apple Silicon hardware tunable support"); diff --git a/include/linux/soc/apple/tunable.h b/include/linux/soc/apple/tu= nable.h new file mode 100644 index 0000000000000000000000000000000000000000..3785ee2c898993328356005b636= 82f4848fc2f22 --- /dev/null +++ b/include/linux/soc/apple/tunable.h @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ +/* + * Apple Silicon hardware tunable support + * + * Each tunable is a list with each entry containing a offset into the MMIO + * region, a mask of bits to be cleared and a set of bits to be set. These + * tunables are passed along by the previous boot stages and vary from dev= ice + * to device such that they cannot be hardcoded in the individual drivers. + * + * Copyright (C) The Asahi Linux Contributors + */ + +#ifndef _LINUX_SOC_APPLE_TUNABLE_H_ +#define _LINUX_SOC_APPLE_TUNABLE_H_ + +#include +#include + +/** + * Struct to store an Apple Silicon hardware tunable. + * + * Each tunable is a list with each entry containing a offset into the MMIO + * region, a mask of bits to be cleared and a set of bits to be set. These + * tunables are passed along by the previous boot stages and vary from dev= ice + * to device such that they cannot be hardcoded in the individual drivers. + * + * @param sz Number of [offset, mask, value] tuples stored in values. + * @param values [offset, mask, value] array. + */ +struct apple_tunable { + size_t sz; + struct { + u32 offset; + u32 mask; + u32 value; + } values[]; +}; + +/** + * Parse an array of hardware tunables from the device tree. + * + * @dev: Device node used for devm_kzalloc internally. + * @np: Device node which contains the tunable array. + * @name: Name of the device tree property which contains the tunables. + * + * @return: devres allocated struct on success or PTR_ERR on failure. + */ +struct apple_tunable *devm_apple_tunable_parse(struct device *dev, + struct device_node *np, + const char *name); + +/** + * Apply a previously loaded hardware tunable. + * + * @param regs: MMIO to which the tunable will be applied. + * @param tunable: Pointer to the tunable. + */ +void apple_tunable_apply(void __iomem *regs, struct apple_tunable *tunable= ); + +#endif --=20 2.34.1