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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiner Kallweit , Russell King , Philipp Zabel , Geert Uytterhoeven , Magnus Damm , Wolfram Sang Cc: linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH net-next v2 5/9] net: pcs: rzn1-miic: move port range handling into SoC data Date: Thu, 4 Sep 2025 12:41:59 +0100 Message-ID: <20250904114204.4148520-6-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250904114204.4148520-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20250904114204.4148520-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar Define per-SoC miic_port_start and miic_port_max fields in struct miic_of_data and use them to validate the device-tree "reg" port number and to compute the driver's internal zero-based port index as (port - miic_port_start). Replace uses of the hard-coded MIIC_MAX_NR_PORTS with the SoC-provided miic_port_max when iterating over ports. On RZ/N1 the MIIC ports are numbered 1..5, whereas RZ/T2H numbers its MIIC ports 0..3. By making the port base and range part of the OF data the driver no longer assumes a fixed numbering scheme and can support SoCs that enumerate ports from either zero or one and that expose different numbers of ports. This change is preparatory work for adding RZ/T2H support. Signed-off-by: Lad Prabhakar Reviewed-by: Andrew Lunn --- v1->v2: - No change. --- drivers/net/pcs/pcs-rzn1-miic.c | 26 ++++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/drivers/net/pcs/pcs-rzn1-miic.c b/drivers/net/pcs/pcs-rzn1-mii= c.c index 724bac86cf8c..c119ec66fe95 100644 --- a/drivers/net/pcs/pcs-rzn1-miic.c +++ b/drivers/net/pcs/pcs-rzn1-miic.c @@ -49,8 +49,6 @@ #define MIIC_SWCTRL 0x304 #define MIIC_SWDUPC 0x308 =20 -#define MIIC_MAX_NR_PORTS 5 - #define MIIC_MODCTRL_CONF_CONV_MAX 6 #define MIIC_MODCTRL_CONF_NONE -1 =20 @@ -146,6 +144,8 @@ struct miic { * @conf_to_string_count: Number of entries in the conf_to_string array * @index_to_string: String representations of the index values * @index_to_string_count: Number of entries in the index_to_string array + * @miic_port_start: MIIC port start number + * @miic_port_max: Maximum MIIC supported */ struct miic_of_data { struct modctrl_match *match_table; @@ -155,6 +155,8 @@ struct miic_of_data { u8 conf_to_string_count; const char * const *index_to_string; u8 index_to_string_count; + u8 miic_port_start; + u8 miic_port_max; }; =20 /** @@ -330,6 +332,7 @@ static const struct phylink_pcs_ops miic_phylink_ops = =3D { =20 struct phylink_pcs *miic_create(struct device *dev, struct device_node *np) { + const struct miic_of_data *of_data; struct platform_device *pdev; struct miic_port *miic_port; struct device_node *pcs_np; @@ -342,9 +345,6 @@ struct phylink_pcs *miic_create(struct device *dev, str= uct device_node *np) if (of_property_read_u32(np, "reg", &port)) return ERR_PTR(-EINVAL); =20 - if (port > MIIC_MAX_NR_PORTS || port < 1) - return ERR_PTR(-EINVAL); - /* The PCS pdev is attached to the parent node */ pcs_np =3D of_get_parent(np); if (!pcs_np) @@ -363,18 +363,24 @@ struct phylink_pcs *miic_create(struct device *dev, s= truct device_node *np) return ERR_PTR(-EPROBE_DEFER); } =20 + miic =3D platform_get_drvdata(pdev); + of_data =3D miic->of_data; + if (port > of_data->miic_port_max || port < of_data->miic_port_start) { + put_device(&pdev->dev); + return ERR_PTR(-EINVAL); + } + miic_port =3D kzalloc(sizeof(*miic_port), GFP_KERNEL); if (!miic_port) { put_device(&pdev->dev); return ERR_PTR(-ENOMEM); } =20 - miic =3D platform_get_drvdata(pdev); device_link_add(dev, miic->dev, DL_FLAG_AUTOREMOVE_CONSUMER); put_device(&pdev->dev); =20 miic_port->miic =3D miic; - miic_port->port =3D port - 1; + miic_port->port =3D port - of_data->miic_port_start; miic_port->pcs.ops =3D &miic_phylink_ops; =20 phy_interface_set_rgmii(miic_port->pcs.supported_interfaces); @@ -410,7 +416,7 @@ static int miic_init_hw(struct miic *miic, u32 cfg_mode) miic_reg_writel(miic, MIIC_MODCTRL, FIELD_PREP(MIIC_MODCTRL_SW_MODE, cfg_mode)); =20 - for (port =3D 0; port < MIIC_MAX_NR_PORTS; port++) { + for (port =3D 0; port < miic->of_data->miic_port_max; port++) { miic_converter_enable(miic, port, 0); /* Disable speed/duplex control from these registers, datasheet * says switch registers should be used to setup switch port @@ -497,6 +503,8 @@ static int miic_parse_dt(struct miic *miic, u32 *mode_c= fg) if (of_property_read_u32(conv, "reg", &port)) continue; =20 + /* Adjust for 0 based index */ + port +=3D !miic->of_data->miic_port_start; if (of_property_read_u32(conv, "renesas,miic-input", &conf) =3D=3D 0) dt_val[port] =3D conf; } @@ -570,6 +578,8 @@ static struct miic_of_data rzn1_miic_of_data =3D { .conf_to_string_count =3D ARRAY_SIZE(conf_to_string), .index_to_string =3D index_to_string, .index_to_string_count =3D ARRAY_SIZE(index_to_string), + .miic_port_start =3D 1, + .miic_port_max =3D 5, }; =20 static const struct of_device_id miic_of_mtable[] =3D { --=20 2.51.0