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Thu, 04 Sep 2025 03:04:38 -0700 (PDT) Received: from iku.Home ([2a06:5906:61b:2d00:904e:70c8:edf3:59a4]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45b7e68c83asm301288725e9.20.2025.09.04.03.04.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Sep 2025 03:04:37 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2] arm64: dts: renesas: rzt2h-n2h-evk: Enable USB2.0 support Date: Thu, 4 Sep 2025 11:04:35 +0100 Message-ID: <20250904100435.4033858-1-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar Enable USB2.0 support on RZ/T2H and RZ/N2H EVKs. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- v1->v2: - Reflowed comments to adhere to 80 char width. - Updated comment about simultaneously using USB host and function interfac= es. Note, this patch was originally part of series [0], rest of the patches have been accepted so just sending this one. [0] https://lore.kernel.org/all/20250821161946.1096033-1-prabhakar.mahadev-= lad.rj@bp.renesas.com/ --- .../dts/renesas/r9a09g077m44-rzt2h-evk.dts | 36 ++++++++++++++++ .../dts/renesas/r9a09g087m44-rzn2h-evk.dts | 41 +++++++++++++++++++ .../dts/renesas/rzt2h-n2h-evk-common.dtsi | 22 ++++++++++ 3 files changed, 99 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts b/arch/= arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts index 264f7ddb8cc5..2bf867273ad0 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts @@ -29,6 +29,28 @@ */ #define SD1_MICRO_SD 1 =20 +/* + * USB Pin Configuration: + * + * This board is equipped with three USB connectors: Type-A (CN80), Mini-B + * (CN79), and Micro-AB (CN33). The RZ/T2H SoC has a single USB channel, so + * either the USB host interface or the USB function interface can be used, + * but not both simultaneously when using the CN79 and CN80 connectors. + * + * By default, the Type-A (CN80) and Mini-B (CN79) connectors are enabled. + * Configure the switches as follows: + * - P00_0 - P00_2 (control signals for USB power supply): SW1[5] =3D ON + * - USB_VBUSIN (used for USB function): SW7[7] =3D OFF; SW7[8] =3D ON + * - USB_VBUSEN (used for USB_HF_VBUSEN): SW7[9] =3D OFF; SW7[10] =3D ON + * + * To enable the Micro-AB (CN33) USB OTG connector, set the following macro + * to 1 and configure the switches as follows: + * - P00_0 - P00_2 (control signals for USB power supply): SW1[5] =3D ON + * - USB_VBUSIN (used for USB OTG): SW7[7] =3D ON; SW7[8] =3D OFF + * - USB_VBUSEN (used for USB_OTG_VBUSEN): SW7[9] =3D ON; SW7[10] =3D OFF + */ +#define USB_OTG 0 + #include "rzt2h-n2h-evk-common.dtsi" =20 / { @@ -145,4 +167,18 @@ i2c1_pins: i2c1-pins { pinmux =3D , /* SDA */ ; /* SCL */ }; + +#if USB_OTG + usb-exicen-hog { + gpio-hog; + gpios =3D ; + output-high; + line-name =3D "usb_exicen_a"; + }; +#endif + + usb_pins: usb-pins { + pinmux =3D , /* VBUSEN */ + ; /* OVRCUR */ + }; }; diff --git a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts b/arch/= arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts index 80f358fb2d74..084b3a0c8052 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts @@ -33,6 +33,33 @@ */ #define SD1_MICRO_SD 1 =20 +/* + * USB Pin Configuration: + * + * This board is equipped with three USB connectors: Type-A (CN7), Mini-B + * (CN8), and Micro-AB (CN9). The RZ/N2H SoC has a single USB channel, so + * either the USB host interface or the USB function interface can be used, + * but not both simultaneously when using the CN7 and CN8 connectors. + * + * By default, the Type-A (CN7) and Mini-B (CN8) connectors are enabled. + * Configure the switches as follows: + * - P02_2 - P02_3 (control signals for USB power supply): DSW2[6] =3D O= FF; + * - P02_2 (used for VBUSEN): DSW14[5] =3D OFF; DSW14[6] =3D ON + * - P02_3 (used for USB_OVRCUR): DSW14[1] =3D OFF; DSW14[2] =3D ON + * - USB_VBUSIN (used for VBUS of CN8): DSW16[1] =3D OFF; DSW16[2] =3D ON + * - USB_VBUSEN (used for USB_HF_VBUSEN): DSW16[3] =3D OFF; DSW16[4] =3D= ON + * + * To enable the Micro-AB (CN9) USB OTG connector, set the following macro + * to 1 and configure the switches as follows: + * - P02_2 - P02_3 (control signals for USB power supply): DSW2[6] =3D O= FF; + * - P02_2 (used for VBUSEN): DSW14[5] =3D OFF; DSW14[6] =3D ON + * - P02_3 (used for USB_OVRCUR): DSW14[1] =3D OFF; DSW14[2] =3D ON + * - USB_VBUSIN (used for VBUS for OTG): DSW16[1] =3D ON; DSW16[2] =3D O= FF + * - USB_VBUSEN (used for USB_OTG_VBUSEN): DSW16[3] =3D ON; DSW16[4] =3D= OFF + * - USB_EXICEN (used for USB OTG EXICEN): DSW14[3] =3D OFF; DSW14[4] = =3D ON + */ +#define USB_OTG 0 + #include "rzt2h-n2h-evk-common.dtsi" =20 /* @@ -185,4 +212,18 @@ i2c1_pins: i2c1-pins { pinmux =3D , ; }; + +#if USB_OTG + usb-exicen-hog { + gpio-hog; + gpios =3D ; + output-high; + line-name =3D "usb_exicen_a"; + }; +#endif + + usb_pins: usb-pins { + pinmux =3D , /* VBUSEN */ + ; /* OVRCUR */ + }; }; diff --git a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi b/arch/a= rm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi index 91068042bec0..5c91002c99c4 100644 --- a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi +++ b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi @@ -65,10 +65,20 @@ vccq_sdhi1: regulator-vccq-sdhi1 { #endif }; =20 +&ehci { + dr_mode =3D "otg"; + status =3D "okay"; +}; + &extal_clk { clock-frequency =3D <25000000>; }; =20 +&hsusb { + dr_mode =3D "otg"; + status =3D "okay"; +}; + &i2c0 { eeprom: eeprom@50 { compatible =3D "renesas,r1ex24016", "atmel,24c16"; @@ -77,6 +87,11 @@ eeprom: eeprom@50 { }; }; =20 +&ohci { + dr_mode =3D "otg"; + status =3D "okay"; +}; + &pinctrl { /* * SCI0 Pin Configuration: @@ -218,6 +233,13 @@ &sdhi1 { }; #endif =20 +&usb2_phy { + pinctrl-0 =3D <&usb_pins>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + &wdt2 { status =3D "okay"; timeout-sec =3D <60>; --=20 2.51.0