From nobody Sun Sep 14 14:53:52 2025 Received: from mail-pj1-f73.google.com (mail-pj1-f73.google.com [209.85.216.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E3A628C5D3 for ; Thu, 4 Sep 2025 06:55:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.73 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756968917; cv=none; b=XwUkxEvX74dQlLgZ4yPtoMU65eVM48kqBExjMeFIxJi0Q8CTmr/NnsVmYh1OMspeuObjNZNxpXNAoo4PRoqWLdpqlb7O5bNoii35SNnl1/ovv8bCYBUDmDx2LZX4y/1gfVaLIkY+3gxMtEomqmRZlIWiIUVMvGJVPunrx35JVbk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756968917; c=relaxed/simple; bh=n+L9vWeyzbQUQZp/RqgYkXX79E/BX1CQXhnoKJC68eU=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=lWKP17pwiLvbl61hPOuNXnXrOfA4itXSLfslROm8uEXu3YGOgAcWX4rB92kTnkVPTMSCIND3maFU4/bPNkf6WNFfi/O9cEs2CP8BZ5Qp+ac3JX7niWbvhMKCLorOzJm3910PjZXNcTa694vEKb+fzSx8bqA4iTnpik47pEmpEnQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--sagis.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=vWT3YYQk; arc=none smtp.client-ip=209.85.216.73 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--sagis.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="vWT3YYQk" Received: by mail-pj1-f73.google.com with SMTP id 98e67ed59e1d1-329745d6b89so1037656a91.1 for ; Wed, 03 Sep 2025 23:55:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1756968915; x=1757573715; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=SOAKBocMN15a/GPc9+kQ8WwGfS18ZYkBgBZhxajgBOA=; b=vWT3YYQkQuzNB7g36r0nNQMQmMUqlbH/AodLPt3M4TIaVNDGnDUBCZxsuhQ7+VbNPW BqW9Ow/TAwPdkwk9NViQnamufzlX3lxgGNk1GvHcw6aVMyktE0e4GZlmq0A8e1ZnCsuu tiyFeSj/iDHsmd4WvGmBZwZZdFfv2DISMZnxT4HcI/eadCewiXYh07ndFqmhp6p+DrJz 5s1yKQGXDGl2tiu7XzjvOPfv4sxpPK2ufxishyGG6YJ/kyVTTZDzOO52qPYDuA2cQMFW G5n+et/9JxHnEf2tXK04dFeRu9EaA8Aw7iyW6tWoKHb4UaiCyoxiP5QCSizFPJc2lM0/ +ZMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756968915; x=1757573715; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=SOAKBocMN15a/GPc9+kQ8WwGfS18ZYkBgBZhxajgBOA=; b=ZJGJM1rIZrgiAjI2J2trvVgCR4PAmJ3MbG+cEFJPeY1lXadUEwgqw24aBUdDJ3OKao jNw9eGDzAPbXG/74aDwwRmMc2ijIQWgf3X/inv+/efM3aCCc+lBvsKXs8sBc+G1uLCPY esBCzxcbfzFLLA6W1G7o8uVL4usz03Ug8Al0mnSRT3B5ASZwlqpkZQakJpBf6672A+nk OOCyHvXsP56BlzlJ/0A9tbA6dXwH2xPVQoV3yH/G+jBU9aiz/WPA9CcgiPvErAVIByjF 5zMfRwyvbfei0ncPSiLki/AIgAxdKjpAjGigMyXGRDC4EO5L7Bt9SbSJCwAU0cmxBbfG 7YQw== X-Gm-Message-State: AOJu0Yxhhhx5/vt58jsFxBYUqMIuoipWMfxhqMu56WreprrEpAEgAj6f 6Atp76vkGGuk5iSeDUUoXkqmgjA4gylXAodQY0C56fidGBNCpoiQdlCZf4KBeBRvpbb7/gzDz3Q hYA== X-Google-Smtp-Source: AGHT+IF/JgzkvqqUvrXqyvg4ttqyVIVVsNkmsuNFfNqAnjTzj0j4TENvTPgfKFid94anRdEttRjKvvvZcA== X-Received: from pjxx3.prod.google.com ([2002:a17:90b:58c3:b0:32b:4de4:2ac9]) (user=sagis job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:530d:b0:329:ca48:7090 with SMTP id 98e67ed59e1d1-329ca4873c6mr14454454a91.37.1756968915479; Wed, 03 Sep 2025 23:55:15 -0700 (PDT) Date: Wed, 3 Sep 2025 23:54:38 -0700 In-Reply-To: <20250904065453.639610-1-sagis@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250904065453.639610-1-sagis@google.com> X-Mailer: git-send-email 2.51.0.338.gd7d06c2dae-goog Message-ID: <20250904065453.639610-9-sagis@google.com> Subject: [PATCH v10 08/21] KVM: selftests: Add TDX boot code From: Sagi Shahar To: linux-kselftest@vger.kernel.org, Paolo Bonzini , Shuah Khan , Sean Christopherson , Ackerley Tng , Ryan Afranji , Andrew Jones , Isaku Yamahata , Erdem Aktas , Rick Edgecombe , Sagi Shahar , Roger Wang , Binbin Wu , Oliver Upton , "Pratik R. Sampat" , Reinette Chatre , Ira Weiny , Chao Gao , Chenyi Qiang Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Erdem Aktas Add code to boot a TDX test VM. Since TDX registers are inaccesible to KVM, the boot code loads the relevant values from memory into the registers before jumping to the guest code. Signed-off-by: Erdem Aktas Co-developed-by: Ackerley Tng Signed-off-by: Ackerley Tng Co-developed-by: Sagi Shahar Signed-off-by: Sagi Shahar Reviewed-by: Binbin Wu --- tools/testing/selftests/kvm/Makefile.kvm | 3 + .../selftests/kvm/include/x86/tdx/td_boot.h | 5 ++ .../kvm/include/x86/tdx/td_boot_asm.h | 16 +++++ .../selftests/kvm/lib/x86/tdx/td_boot.S | 60 +++++++++++++++++++ 4 files changed, 84 insertions(+) create mode 100644 tools/testing/selftests/kvm/include/x86/tdx/td_boot_asm= .h create mode 100644 tools/testing/selftests/kvm/lib/x86/tdx/td_boot.S diff --git a/tools/testing/selftests/kvm/Makefile.kvm b/tools/testing/selft= ests/kvm/Makefile.kvm index 3f93c093b046..d11d02e17cc5 100644 --- a/tools/testing/selftests/kvm/Makefile.kvm +++ b/tools/testing/selftests/kvm/Makefile.kvm @@ -31,6 +31,7 @@ LIBKVM_x86 +=3D lib/x86/sev.c LIBKVM_x86 +=3D lib/x86/svm.c LIBKVM_x86 +=3D lib/x86/ucall.c LIBKVM_x86 +=3D lib/x86/vmx.c +LIBKVM_x86 +=3D lib/x86/tdx/td_boot.S =20 LIBKVM_arm64 +=3D lib/arm64/gic.c LIBKVM_arm64 +=3D lib/arm64/gic_v3.c @@ -336,6 +337,8 @@ $(LIBKVM_ASM_DEFS_OBJ): $(OUTPUT)/%.s: %.c FORCE $(LIBKVM_STRING_OBJ): $(OUTPUT)/%.o: %.c $(CC) $(CFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c -ffreestanding $< -o $@ =20 +$(OUTPUT)/lib/x86/tdx/td_boot.o: $(OUTPUT)/include/x86/tdx/td_boot_offsets= .h + $(OUTPUT)/include/x86/tdx/td_boot_offsets.h: $(OUTPUT)/lib/x86/tdx/td_boot= _offsets.s FORCE $(call filechk,offsets,__TDX_BOOT_OFFSETS_H__) =20 diff --git a/tools/testing/selftests/kvm/include/x86/tdx/td_boot.h b/tools/= testing/selftests/kvm/include/x86/tdx/td_boot.h index 8eda3ce10220..17c3083da9ca 100644 --- a/tools/testing/selftests/kvm/include/x86/tdx/td_boot.h +++ b/tools/testing/selftests/kvm/include/x86/tdx/td_boot.h @@ -66,4 +66,9 @@ struct td_boot_parameters { struct td_per_vcpu_parameters per_vcpu[]; }; =20 +void td_boot(void); +void td_boot_code_end(void); + +#define TD_BOOT_CODE_SIZE (td_boot_code_end - td_boot) + #endif /* SELFTEST_TDX_TD_BOOT_H */ diff --git a/tools/testing/selftests/kvm/include/x86/tdx/td_boot_asm.h b/to= ols/testing/selftests/kvm/include/x86/tdx/td_boot_asm.h new file mode 100644 index 000000000000..10b4b527595c --- /dev/null +++ b/tools/testing/selftests/kvm/include/x86/tdx/td_boot_asm.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef SELFTEST_TDX_TD_BOOT_ASM_H +#define SELFTEST_TDX_TD_BOOT_ASM_H + +/* + * GPA where TD boot parameters will be loaded. + * + * TD_BOOT_PARAMETERS_GPA is arbitrarily chosen to + * + * + be within the 4GB address space + * + provide enough contiguous memory for the struct td_boot_parameters su= ch + * that there is one struct td_per_vcpu_parameters for KVM_MAX_VCPUS + */ +#define TD_BOOT_PARAMETERS_GPA 0xffff0000 + +#endif // SELFTEST_TDX_TD_BOOT_ASM_H diff --git a/tools/testing/selftests/kvm/lib/x86/tdx/td_boot.S b/tools/test= ing/selftests/kvm/lib/x86/tdx/td_boot.S new file mode 100644 index 000000000000..7aa33caa9a78 --- /dev/null +++ b/tools/testing/selftests/kvm/lib/x86/tdx/td_boot.S @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include "tdx/td_boot_asm.h" +#include "tdx/td_boot_offsets.h" +#include "processor_asm.h" + +.code32 + +.globl td_boot +td_boot: + /* In this procedure, edi is used as a temporary register. */ + cli + + /* Paging is off. */ + + movl $TD_BOOT_PARAMETERS_GPA, %ebx + + /* + * Find the address of struct td_per_vcpu_parameters for this + * vCPU based on esi (TDX spec: initialized with vCPU id). Put + * struct address into register for indirect addressing. + */ + movl $SIZEOF_TD_PER_VCPU_PARAMETERS, %eax + mul %esi + leal TD_BOOT_PARAMETERS_PER_VCPU(%ebx), %edi + addl %edi, %eax + + /* Setup stack. */ + movl TD_PER_VCPU_PARAMETERS_ESP_GVA(%eax), %esp + + /* Setup GDT. */ + leal TD_BOOT_PARAMETERS_GDT(%ebx), %edi + lgdt (%edi) + + /* Setup IDT. */ + leal TD_BOOT_PARAMETERS_IDT(%ebx), %edi + lidt (%edi) + + /* + * Set up control registers (There are no instructions to mov from + * memory to control registers, hence use edi as a scratch register). + */ + movl TD_BOOT_PARAMETERS_CR4(%ebx), %edi + movl %edi, %cr4 + movl TD_BOOT_PARAMETERS_CR3(%ebx), %edi + movl %edi, %cr3 + movl TD_BOOT_PARAMETERS_CR0(%ebx), %edi + movl %edi, %cr0 + + /* Switching to 64bit mode after ljmp and then jump to guest code */ + ljmp $(KERNEL_CS),$1f +1: + jmp *TD_PER_VCPU_PARAMETERS_GUEST_CODE(%eax) + +/* Leave marker so size of td_boot code can be computed. */ +.globl td_boot_code_end +td_boot_code_end: + +/* Disable executable stack. */ +.section .note.GNU-stack,"",%progbits --=20 2.51.0.338.gd7d06c2dae-goog