From nobody Fri Oct 3 08:50:44 2025 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9042C3002C6; Wed, 3 Sep 2025 12:46:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903588; cv=none; b=onXCgstV84eaTWu8scrdrz1PpEb05y7u77X8euAq9cEEOeKHtGqa434cdIulE7VxmfHqQHEBxr3l9N7lZPhrUeehQTtWn9ryn/tHrvV1D8d+rKjNaH0pl19Y2eliVT5Jruj/4ZRO/uSdv1fHTs3rhwmKgPrC8hvHPKZhAEeCG8o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903588; c=relaxed/simple; bh=JdIooVZBeOxFib0P3YzqxJBCOi/lRohb6ZMkibdZn+4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=QhtgW8tK8s46fqYPQfSbJhli8/BK56FWIad+eibxWz+XGqj+t7DKg7A5BY2lpKmJETT1ye2ZCCQrLeGBT32yYH9ls9/EzvJwZH5iDZFwlx8i3hDHIcPYUG2rg8TW8jahPqgOrahO1Nu7xBJiLFjMJHNlDzS0k2wh2F6Iob9BxWY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=Elm56HEC; arc=none smtp.client-ip=198.47.19.246 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Elm56HEC" Received: from fllvem-sh04.itg.ti.com ([10.64.41.54]) by fllvem-ot04.ext.ti.com (8.15.2/8.15.2) with ESMTP id 583Ck7Pe3226627; Wed, 3 Sep 2025 07:46:07 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1756903567; bh=ab5PTS5S8mETPWHGqh64TsWawA1igO4wRVx5rgJS1zo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Elm56HECzkdzXAKybcfNP1iEN3qxMkMQh/4ZsnWJh3g0EskDSnRoO/aFhiaKAtsTe R8drAV9U7+TAUZee3ftfys8GNSPTfqGAEiKtHk3SNch9hiLpY+/rM8WEjBiSKJDzDI lu8jy9jW1SJkJE3PEGV6hYTtV9wVTbwxbCCHZNvA= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllvem-sh04.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 583Ck7Cr084371 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 3 Sep 2025 07:46:07 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 3 Sep 2025 07:46:06 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Wed, 3 Sep 2025 07:46:06 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 583Cj5wZ1576150; Wed, 3 Sep 2025 07:45:59 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH 08/11] PCI: keystone: Add ks_pcie_disable_error_irq() helper for cleanup Date: Wed, 3 Sep 2025 18:14:49 +0530 Message-ID: <20250903124505.365913-9-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250903124505.365913-1-s-vadapalli@ti.com> References: <20250903124505.365913-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Introduce the helper function ks_pcie_disable_error_irq() to disable the error interrupts that have been enabled by ks_pcie_enable_error_irq(). Signed-off-by: Siddharth Vadapalli --- drivers/pci/controller/dwc/pci-keystone.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index f432818f6802..bb93559f6468 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -329,6 +329,15 @@ static void ks_pcie_handle_intx_irq(struct keystone_pc= ie *ks_pcie, ks_pcie_app_writel(ks_pcie, IRQ_EOI, offset); } =20 +static void ks_pcie_disable_error_irq(struct keystone_pcie *ks_pcie) +{ + u32 val; + + val =3D ks_pcie_app_readl(ks_pcie, ERR_IRQ_ENABLE_SET); + val &=3D ~ERR_IRQ_ALL; + ks_pcie_app_writel(ks_pcie, ERR_IRQ_ENABLE_SET, val); +} + static void ks_pcie_enable_error_irq(struct keystone_pcie *ks_pcie) { ks_pcie_app_writel(ks_pcie, ERR_IRQ_ENABLE_SET, ERR_IRQ_ALL); --=20 2.43.0