From nobody Fri Oct 3 07:43:42 2025 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 797733002C4; Wed, 3 Sep 2025 12:45:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903539; cv=none; b=iYIl+jK8/AA4Gtp0KfWZiCECQYPk4lvWimyn1KkX85Fhl53qTwrRMEibJ2l/KENPD+w8x0BeCOJUhDiQQFdI8bW3kESFKKGyS9D6OEFFrou5p0eKcJO/rsNOPEmt/vSoccPe+d5sMRtn1dpJql/TmuBl2BLIcxcXFx22aryIvmE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903539; c=relaxed/simple; bh=Ud2B27Eh56vwZK+XhNEM6d0W8BWXEkBJ+KeVOWRRnnY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=RXhBMhQzjm0igXHMJQvTdI58VxJEPR1AwgghodkxbioRy1d9CVcq3rpg5wVjAhiF8ewxHuOrhIFR+k0jmo2xXnWM9jf4Bd3mJrrsghXOsg08MGROWYfdb//JSNUfgsti5vMwh7XkW2JJOZJZVp3FEWYf1vat/aIvsBEZ43xYy6I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=Uruiri59; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Uruiri59" Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTP id 583CjKdK3263776; Wed, 3 Sep 2025 07:45:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1756903520; bh=Y7DJKYlXrJxu80EYCcBCLZKzR+uhECr5mDBhtoKfNEc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Uruiri59eA50IV/6eoRqLg2QxiA3p2iTX+gLik5CGr3KrHF/RRZu4i5J9q85gok0x CgVL3BxTcPFeaxbSBvCu2tFmxoc82b/CXcCBBgCG98YLTVILzxM/lRIU20ecVSa8BA II2mUNC+bRp4C+ki2J5i0vVzg/XbJfgdK2DDSciw= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 583CjJph3601454 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 3 Sep 2025 07:45:19 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 3 Sep 2025 07:45:19 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Wed, 3 Sep 2025 07:45:19 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 583Cj5wS1576150; Wed, 3 Sep 2025 07:45:13 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH 01/11] PCI: Export pci_get_host_bridge_device() for use by pci-keystone Date: Wed, 3 Sep 2025 18:14:42 +0530 Message-ID: <20250903124505.365913-2-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250903124505.365913-1-s-vadapalli@ti.com> References: <20250903124505.365913-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The pci-keystone.c driver uses the 'pci_get_host_bridge_device()' helper. In preparation for enabling the pci-keystone.c driver to be built as a loadable module, export 'pci_get_host_bridge_device()'. Signed-off-by: Siddharth Vadapalli --- drivers/pci/host-bridge.c | 1 + include/linux/pci.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/pci/host-bridge.c b/drivers/pci/host-bridge.c index afa50b446567..be5ef6516cff 100644 --- a/drivers/pci/host-bridge.c +++ b/drivers/pci/host-bridge.c @@ -33,6 +33,7 @@ struct device *pci_get_host_bridge_device(struct pci_dev = *dev) kobject_get(&bridge->kobj); return bridge; } +EXPORT_SYMBOL_GPL(pci_get_host_bridge_device); =20 void pci_put_host_bridge_device(struct device *dev) { diff --git a/include/linux/pci.h b/include/linux/pci.h index d1fdf81fbe1e..b253cbc27d36 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -646,6 +646,7 @@ struct pci_host_bridge *pci_alloc_host_bridge(size_t pr= iv); struct pci_host_bridge *devm_pci_alloc_host_bridge(struct device *dev, size_t priv); void pci_free_host_bridge(struct pci_host_bridge *bridge); +struct device *pci_get_host_bridge_device(struct pci_dev *dev); struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus); =20 void pci_set_host_bridge_release(struct pci_host_bridge *bridge, --=20 2.43.0 From nobody Fri Oct 3 07:43:42 2025 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EA4C12FF17B; Wed, 3 Sep 2025 12:45:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903546; cv=none; b=RazXFAcu5iJC98IIPIsNVCWiwFM7VghPlqFVVVAKNYOeXq4lvkKmIBXZ/uKQlhNqq7kpTyC0mhmF4Abv9lXaP1+/iPVx4E+NJ2PKo9TiO5qgfLqe9wHRVM8VZvS+hEz5bgHSudC65uMODzNP52nL38r99jqBAgRmfFZsclSED6s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903546; c=relaxed/simple; bh=TrpD7d+wgl+RfE1iZBW309Mn4A8/OzhBrMrOg0V6DY4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=fstONyEjoTE2tR6DtLo8Htoo2yN0njf8dzBYQf60HLuuNzWPQOl5BEiUCkmvfqHP+oiL1R92cgdTFCSt2NbAQp5KXhrWnDOP9WnWn+Rd+4q5NGI93DD2rG5cAN5ZxVuYV2BqFniJDYZVPfuB2aLKqUoFwag8tFSqC6r27egw2hQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=phcOzWfZ; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="phcOzWfZ" Received: from lelvem-sh01.itg.ti.com ([10.180.77.71]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 583CjQxa2831256; Wed, 3 Sep 2025 07:45:26 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1756903526; bh=CKO8MzldBexrXr7kewzqwdKjuMhvxB9kVL4I0IFKJYo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=phcOzWfZaowJgVm92lbNrSgcQ85gj6mmpdDlxdM+SpxQzgDXxs1PID4pnUdlu2/Ip aEf08G7t4Iy1UdviKxIifxG6cDxCd0UcHiUhxsbKS3j7G08pVxkwvE5TqoFfM4NZDA DB1Hd8BeIbd4k5tMwAvzdUOSeM4SH6oRhRv/O5zo= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by lelvem-sh01.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 583CjQl43043970 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 3 Sep 2025 07:45:26 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 3 Sep 2025 07:45:26 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Wed, 3 Sep 2025 07:45:26 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 583Cj5wT1576150; Wed, 3 Sep 2025 07:45:19 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH 02/11] PCI: dwc: Export dw_pcie_allocate_domains() for pci-keystone Date: Wed, 3 Sep 2025 18:14:43 +0530 Message-ID: <20250903124505.365913-3-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250903124505.365913-1-s-vadapalli@ti.com> References: <20250903124505.365913-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The pci-keystone.c driver uses the 'dw_pcie_allocate_domains()' helper. In preparation for enabling the pci-keystone.c driver to be built as a loadable module, export 'dw_pcie_allocate_domains()'. Signed-off-by: Siddharth Vadapalli --- drivers/pci/controller/dwc/pcie-designware-host.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pc= i/controller/dwc/pcie-designware-host.c index 952f8594b501..3cc83d921376 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -229,6 +229,7 @@ int dw_pcie_allocate_domains(struct dw_pcie_rp *pp) =20 return 0; } +EXPORT_SYMBOL_GPL(dw_pcie_allocate_domains); =20 void dw_pcie_free_msi(struct dw_pcie_rp *pp) { --=20 2.43.0 From nobody Fri Oct 3 07:43:42 2025 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 409722FFDCB; Wed, 3 Sep 2025 12:45:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903552; cv=none; b=g7m8i3aZP0QR0BCxYZs3QDg/FcpSnG0bY0fwg3w5FRrmL46tYNLSNihb9dMElbbVgpBM1544MSYnvVDNGM0rgjPV4ldDjnYiNOsYWzGJT4C0233n2l8ECIY/SgUP5nZ5tZOSCS61eESJbc65oHSboPwqaLSVuMT2S6uigqpGo6I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903552; c=relaxed/simple; bh=+QKYlKpERCPrAP8O0C+5KTKYG3bxu2S0WACh131NlXA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=d2UaM/lpIBcpPJMrLclvamWe5Q9wFynQhJ4BXJx4IgkOelLAwd1QHUMy+qEZ8J5KpoIbGkR6wRpzsR40xI8k5qM92PqSHd1MO49n5MZp4HG9yxwkLq7lhh7qkA9k+nlkB1A6c7OTyRSn+AahrNHlMYf6sGDBSCFCP8u9XlFqOqU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=DsAmnW0Z; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="DsAmnW0Z" Received: from fllvem-sh04.itg.ti.com ([10.64.41.54]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTP id 583CjXRm3263808; Wed, 3 Sep 2025 07:45:33 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1756903534; bh=4QD21tgjxfBWtfcipGGATPRBLLmOBGCMaskE3EBQK8w=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=DsAmnW0ZLQ/P1vKp82E0eRSmQFK2Tjlxyw5N7Ry3pAVrP2RC24rBNzwTQaMASNwB0 kz7f7v22ECfwfbK5CT0PDScB9pZpsGBoobcv6GwS/gp3p9v2EcZmf51e6EqoCw2YX0 KD1gY5HjwbqcrvKDoQzdzCmUHN088BK4zgO3vowM= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllvem-sh04.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 583CjXH4084035 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 3 Sep 2025 07:45:33 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 3 Sep 2025 07:45:32 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Wed, 3 Sep 2025 07:45:32 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 583Cj5wU1576150; Wed, 3 Sep 2025 07:45:26 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH 03/11] PCI: dwc: Add dw_pcie_free_domains() helper for cleanup Date: Wed, 3 Sep 2025 18:14:44 +0530 Message-ID: <20250903124505.365913-4-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250903124505.365913-1-s-vadapalli@ti.com> References: <20250903124505.365913-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Introduce the helper function dw_pcie_free_domains() which will undo the allocation performed by the dw_pcie_allocate_domains() function. Export this helper for the users of dw_pcie_allocate_domains(). Signed-off-by: Siddharth Vadapalli --- drivers/pci/controller/dwc/pcie-designware-host.c | 9 +++++++++ drivers/pci/controller/dwc/pcie-designware.h | 5 +++++ 2 files changed, 14 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pc= i/controller/dwc/pcie-designware-host.c index 3cc83d921376..df55c0ed75e4 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -211,6 +211,15 @@ static const struct irq_domain_ops dw_pcie_msi_domain_= ops =3D { .free =3D dw_pcie_irq_domain_free, }; =20 +void dw_pcie_free_domains(struct dw_pcie_rp *pp) +{ + if (pp->irq_domain) { + irq_domain_remove(pp->irq_domain); + pp->irq_domain =3D NULL; + } +} +EXPORT_SYMBOL_GPL(dw_pcie_free_domains); + int dw_pcie_allocate_domains(struct dw_pcie_rp *pp) { struct dw_pcie *pci =3D to_dw_pcie_from_pp(pp); diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/con= troller/dwc/pcie-designware.h index a44f2113925d..9f6f6f0ecd93 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -802,6 +802,7 @@ void dw_pcie_free_msi(struct dw_pcie_rp *pp); int dw_pcie_setup_rc(struct dw_pcie_rp *pp); int dw_pcie_host_init(struct dw_pcie_rp *pp); void dw_pcie_host_deinit(struct dw_pcie_rp *pp); +void dw_pcie_free_domains(struct dw_pcie_rp *pp); int dw_pcie_allocate_domains(struct dw_pcie_rp *pp); void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus, unsigned int d= evfn, int where); @@ -846,6 +847,10 @@ static inline void dw_pcie_host_deinit(struct dw_pcie_= rp *pp) { } =20 +static inline void dw_pcie_free_domains(struct dw_pcie_rp *pp) +{ +} + static inline int dw_pcie_allocate_domains(struct dw_pcie_rp *pp) { return 0; --=20 2.43.0 From nobody Fri Oct 3 07:43:42 2025 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3A1FF3009D2; Wed, 3 Sep 2025 12:45:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; 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Wed, 3 Sep 2025 07:45:39 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Wed, 3 Sep 2025 07:45:39 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 583Cj5wV1576150; Wed, 3 Sep 2025 07:45:33 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH 04/11] PCI: dwc: ep: Export dw_pcie_ep_raise_msix_irq() for pci-keystone Date: Wed, 3 Sep 2025 18:14:45 +0530 Message-ID: <20250903124505.365913-5-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250903124505.365913-1-s-vadapalli@ti.com> References: <20250903124505.365913-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The pci-keystone.c driver uses the 'dw_pcie_ep_raise_msix_irq()' helper. In preparation for enabling the pci-keystone.c driver to be built as a loadable module, export 'dw_pcie_ep_raise_msix_irq()'. Signed-off-by: Siddharth Vadapalli --- drivers/pci/controller/dwc/pcie-designware-ep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/= controller/dwc/pcie-designware-ep.c index 7f2112c2fb21..19571ac2b961 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -797,6 +797,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8= func_no, =20 return 0; } +EXPORT_SYMBOL_GPL(dw_pcie_ep_raise_msix_irq); =20 /** * dw_pcie_ep_cleanup - Cleanup DWC EP resources after fundamental reset --=20 2.43.0 From nobody Fri Oct 3 07:43:42 2025 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 713D530100A; Wed, 3 Sep 2025 12:46:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903566; cv=none; b=WFYbeTKWwZ+NM+AuE0Go+SXeoddGLQAxkLGexA8/03aViOXrveFZvI0zJYcrACrD0WiqsSYX7ch/j1X5Mqc6YHib7qY3lZ2zDWyyIdM2mUg+TIdedu2mSy2ho1/JESemh+krzIo4uG60HiQSR4rvGYAD4wnZ6DCTXL7mpwFyOwI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903566; c=relaxed/simple; bh=qF5436bTX16jxt4pf8yH0hQgEL15Nmwihn7GsSVjW4E=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=YoZIHEqwHhjQ1QLALCzWIAALgVuNG2AlWlzSRsyRfuE2kuUCzhRrVEwx6V8P2PeChL3ytYKSGkGohftsOCjlp7GLlvDCDI7TwJsGOf88pAjNt4z/mM6GTbZyxxIRUNGa/CMKIIbIHtUZuIAg5Z4tkQ6ArrLWL2XQ2fBNkuZQxTk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=ILACtSZj; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="ILACtSZj" Received: from fllvem-sh03.itg.ti.com ([10.64.41.86]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 583CjlAm2831316; Wed, 3 Sep 2025 07:45:47 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1756903547; bh=IOJd8niW0aLqEJaIsbx3UOkA/f/bi/oRRBZYE6rFVXk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ILACtSZjqUdPHfO/CKnE5REYy9/xAYra7/30YxqqurZLlCjCb7EXmVz+tEweELlq2 GtxE5MxnObAPC05pnN425IuO1J2v3Tkb8vKnqYnwxptHq2l1jRVAS5jIoR23E+JvBk D0sXlxczGtn8AtoAtGepFirZ8fVs7xWj3mLkyBQE= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by fllvem-sh03.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 583CjlZ33522784 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 3 Sep 2025 07:45:47 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 3 Sep 2025 07:45:45 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Wed, 3 Sep 2025 07:45:46 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 583Cj5wW1576150; Wed, 3 Sep 2025 07:45:40 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH 05/11] PCI: keystone: Add ks_pcie_free_msi_irq() helper for cleanup Date: Wed, 3 Sep 2025 18:14:46 +0530 Message-ID: <20250903124505.365913-6-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250903124505.365913-1-s-vadapalli@ti.com> References: <20250903124505.365913-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Introduce the helper function ks_pcie_free_msi_irq() which will undo the configuration performed by the ks_pcie_config_msi_irq() function. This will be required for implementing a future helper function to undo the configuration performed by the ks_pcie_host_init() function. Signed-off-by: Siddharth Vadapalli --- drivers/pci/controller/dwc/pci-keystone.c | 25 +++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index 3d10e1112131..6cedb6dc4650 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -666,6 +666,31 @@ static void ks_pcie_intx_irq_handler(struct irq_desc *= desc) chained_irq_exit(chip, desc); } =20 +static void ks_pcie_free_msi_irq(struct keystone_pcie *ks_pcie) +{ + struct device_node *np =3D ks_pcie->np; + struct device_node *intc_np; + int irq_count, irq, i; + + if (!IS_ENABLED(CONFIG_PCI_MSI)) + return; + + /* Nothing to do if MSI Interrupt Controller does not exist */ + intc_np =3D of_get_child_by_name(np, "msi-interrupt-controller"); + if (!intc_np) + return; + + /* irq_count should be non-zero. Else, ks_pcie_host_init would have faile= d. */ + irq_count =3D of_irq_count(intc_np); + + for (i =3D 0; i < irq_count; i++) { + /* We expect to get an irq since it succeeded during 'config'. */ + irq =3D irq_of_parse_and_map(intc_np, i); + irq_set_chained_handler(irq, NULL); + } + of_node_put(intc_np); +} + static int ks_pcie_config_msi_irq(struct keystone_pcie *ks_pcie) { struct device *dev =3D ks_pcie->pci->dev; --=20 2.43.0 From nobody Fri Oct 3 07:43:42 2025 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 237012FDC43; Wed, 3 Sep 2025 12:46:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903573; cv=none; b=rVEOnLYJj9h6W7KUFzDmsP3bAljxyL/Xlu25FpcJIR4vUSoNkD8MuMX+ywyDFvaRLnzEz7sazcIAGKbMjb/exRCrd/ZKyZqGllMx5WlLoTy47yUUAlbyPpvCOqHEgvTrNUqbMsZMF7rIyDiHkwjzKC98PDfIHPUf7/CTz+39AGk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903573; c=relaxed/simple; bh=eELTOw4TFFXMp1myjC3VvY7dRkx/jEnFMJSUXs8Riyk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=UaqfkQwoRkS9pmdZsndkQVYRQX8UfhzW3cztRQ7MFP8nCq84H+FqHd298efvUvxq0q3cKL61LE4CNJuyS+HBed012tfJ88DS6zGpBYmdIjarHXVqKv+a7xhdj/Ktqd8bafJtvWQXbeCqK8negVSlBcrOCx85XkLj5jnRL+1bX3o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=WDntU0TJ; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="WDntU0TJ" Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTP id 583Cjrwc3263852; Wed, 3 Sep 2025 07:45:53 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1756903553; bh=teF+KOtkZYo/wkZDuBpN5Zu/YgKSEJW0ToMr/y7CuHg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=WDntU0TJ4Jrll9dgYmiZorQkVuUyVwE8R8rvP4Wc2V+U2eOftLCC8F2UdneMV3+kt VMs+snVuWp70TrU0cJThnIqp/has5oPxEc3WemxwVKNwWTBrn6nOc7qD9ORxiYRd7j co/6okDFR8hbMZU1lo9meA7KjOqiCgCJKcSe94b0= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 583Cjrxv3601814 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 3 Sep 2025 07:45:53 -0500 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 3 Sep 2025 07:45:52 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Wed, 3 Sep 2025 07:45:52 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 583Cj5wX1576150; Wed, 3 Sep 2025 07:45:46 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH 06/11] PCI: keystone: Add ks_pcie_free_intx_irq() helper for cleanup Date: Wed, 3 Sep 2025 18:14:47 +0530 Message-ID: <20250903124505.365913-7-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250903124505.365913-1-s-vadapalli@ti.com> References: <20250903124505.365913-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Introduce the helper function ks_pcie_free_intx_irq() which will undo the configuration performed by the ks_pcie_config_intx_irq() function. This will be required for implementing a future helper function to undo the configuration performed by the ks_pcie_host_init() function. Signed-off-by: Siddharth Vadapalli --- drivers/pci/controller/dwc/pci-keystone.c | 29 +++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index 6cedb6dc4650..3afa298e89d1 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -745,6 +745,35 @@ static int ks_pcie_config_msi_irq(struct keystone_pcie= *ks_pcie) return ret; } =20 +static void ks_pcie_free_intx_irq(struct keystone_pcie *ks_pcie) +{ + struct device_node *np =3D ks_pcie->np; + struct device_node *intc_np; + int irq_count, i; + u32 val; + + /* Nothing to do if INTx Interrupt Controller does not exist */ + intc_np =3D of_get_child_by_name(np, "legacy-interrupt-controller"); + if (!intc_np) + return; + + /* irq_count should be non-zero. Else, ks_pcie_host_init would have faile= d. */ + irq_count =3D of_irq_count(intc_np); + + /* Disable all legacy interrupts */ + for (i =3D 0; i < PCI_NUM_INTX; i++) { + val =3D ks_pcie_app_readl(ks_pcie, IRQ_ENABLE_SET(i)); + val &=3D ~INTx_EN; + ks_pcie_app_writel(ks_pcie, IRQ_ENABLE_SET(i), val); + } + + irq_domain_remove(ks_pcie->intx_irq_domain); + for (i =3D 0; i < irq_count; i++) + irq_set_chained_handler(ks_pcie->intx_host_irqs[i], NULL); + + of_node_put(intc_np); +} + static int ks_pcie_config_intx_irq(struct keystone_pcie *ks_pcie) { struct device *dev =3D ks_pcie->pci->dev; --=20 2.43.0 From nobody Fri Oct 3 07:43:42 2025 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E896F3019CA; Wed, 3 Sep 2025 12:46:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903577; cv=none; b=TDQA67lP6l2ufSCjpSCYmZIA9Yr52qv5pnqTlgOqSIeJi0FvZEOP8QPSp3vg+G4u6ygfBgVAXm17qydNCeQ2c6VSJUoS3Lhbg3r1lD9G9GFlQlMQbVUg4lWz5pLSPYCFDHZkS6N6jCp9A5gl+k2xT2EfbHGcJKnaCOlMQh8DVss= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903577; c=relaxed/simple; bh=UcGpUncYIuK2K8q0nFk1U+GPhAZQCShpsSiXTy+pXBU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=C1gIS2hl//mExFznvUZm9YxVMhlsUG13Q34BY8zD5hauQjW+Rrc+58mP2h1pebYtQjXlJxKeJWP5LzA8K0JpF/QszN322cgazl4lnMPwgp01+GQZVivt8H+UujYBzT6MMmDpu5CaaE1Ld8Navlnekj/NW5w/4lstQArkwO5F2ww= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=waZilO5r; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="waZilO5r" Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTP id 583Ck03H3263860; Wed, 3 Sep 2025 07:46:00 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1756903560; bh=tTQYoXHzAsvVZHpeb9xbXoz42twoCo53trrb9qs+WBU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=waZilO5rLVGtPTi60mPbG6dTrt/Svxm2d7dcz67/xqqZ+O37eQHbzlWw0F6s+jjcw eRd+jBiDGyBqSZhCAtyFGHegCb6rfTzsue+IXJLphMUoxUBUqoZIrRuRycE2nMwiLS c8dFf8ybrwPII8KlyVqifdJpEsCGwQ5055ZvsYYo= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 583Cjx8h3601941 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 3 Sep 2025 07:46:00 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 3 Sep 2025 07:45:59 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Wed, 3 Sep 2025 07:45:59 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 583Cj5wY1576150; Wed, 3 Sep 2025 07:45:53 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH 07/11] PCI: keystone: Add ks_pcie_host_deinit() helper for cleanup Date: Wed, 3 Sep 2025 18:14:48 +0530 Message-ID: <20250903124505.365913-8-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250903124505.365913-1-s-vadapalli@ti.com> References: <20250903124505.365913-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Introduce the helper function ks_pcie_host_deinit() to undo the configuration performed by the ks_pcie_host_init() function and also to free the MSI Domains if the '.msi_init' callback was implemented which would have made a call to dw_pcie_allocate_domains(). Signed-off-by: Siddharth Vadapalli --- drivers/pci/controller/dwc/pci-keystone.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index 3afa298e89d1..f432818f6802 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -885,6 +885,18 @@ static int __init ks_pcie_init_id(struct keystone_pcie= *ks_pcie) return 0; } =20 +static void ks_pcie_host_deinit(struct dw_pcie_rp *pp) +{ + struct dw_pcie *pci =3D to_dw_pcie_from_pp(pp); + struct keystone_pcie *ks_pcie =3D to_keystone_pcie(pci); + + ks_pcie_stop_link(pci); + ks_pcie_free_msi_irq(ks_pcie); + ks_pcie_free_intx_irq(ks_pcie); + if (pci->pp.ops->msi_init) + dw_pcie_free_domains(pp); +} + static int __init ks_pcie_host_init(struct dw_pcie_rp *pp) { struct dw_pcie *pci =3D to_dw_pcie_from_pp(pp); @@ -929,11 +941,13 @@ static int __init ks_pcie_host_init(struct dw_pcie_rp= *pp) =20 static const struct dw_pcie_host_ops ks_pcie_host_ops =3D { .init =3D ks_pcie_host_init, + .deinit =3D ks_pcie_host_deinit, .msi_init =3D ks_pcie_msi_host_init, }; =20 static const struct dw_pcie_host_ops ks_pcie_am654_host_ops =3D { .init =3D ks_pcie_host_init, + .deinit =3D ks_pcie_host_deinit, }; =20 static irqreturn_t ks_pcie_err_irq_handler(int irq, void *priv) --=20 2.43.0 From nobody Fri Oct 3 07:43:42 2025 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9042C3002C6; Wed, 3 Sep 2025 12:46:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903588; cv=none; b=onXCgstV84eaTWu8scrdrz1PpEb05y7u77X8euAq9cEEOeKHtGqa434cdIulE7VxmfHqQHEBxr3l9N7lZPhrUeehQTtWn9ryn/tHrvV1D8d+rKjNaH0pl19Y2eliVT5Jruj/4ZRO/uSdv1fHTs3rhwmKgPrC8hvHPKZhAEeCG8o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903588; c=relaxed/simple; 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Wed, 3 Sep 2025 07:46:06 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 583Cj5wZ1576150; Wed, 3 Sep 2025 07:45:59 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH 08/11] PCI: keystone: Add ks_pcie_disable_error_irq() helper for cleanup Date: Wed, 3 Sep 2025 18:14:49 +0530 Message-ID: <20250903124505.365913-9-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250903124505.365913-1-s-vadapalli@ti.com> References: <20250903124505.365913-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Introduce the helper function ks_pcie_disable_error_irq() to disable the error interrupts that have been enabled by ks_pcie_enable_error_irq(). Signed-off-by: Siddharth Vadapalli --- drivers/pci/controller/dwc/pci-keystone.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index f432818f6802..bb93559f6468 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -329,6 +329,15 @@ static void ks_pcie_handle_intx_irq(struct keystone_pc= ie *ks_pcie, ks_pcie_app_writel(ks_pcie, IRQ_EOI, offset); } =20 +static void ks_pcie_disable_error_irq(struct keystone_pcie *ks_pcie) +{ + u32 val; + + val =3D ks_pcie_app_readl(ks_pcie, ERR_IRQ_ENABLE_SET); + val &=3D ~ERR_IRQ_ALL; + ks_pcie_app_writel(ks_pcie, ERR_IRQ_ENABLE_SET, val); +} + static void ks_pcie_enable_error_irq(struct keystone_pcie *ks_pcie) { ks_pcie_app_writel(ks_pcie, ERR_IRQ_ENABLE_SET, ERR_IRQ_ALL); --=20 2.43.0 From nobody Fri Oct 3 07:43:42 2025 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8DBD63019D1; Wed, 3 Sep 2025 12:46:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903592; cv=none; b=mNJjLXyw22ffnWT7t0xQPeVBlZBkV07rH2SaCclRUGrKuzkxMESEz3AtHV4XoQqH29wyeSzVRTbL/Qe5zzKPo1NOdQ9eqUOKJAL362kYo6XQSp+nLZaPXa0Xd1IbO5Y0sPHzAFupxYqjHc9t5KGKOMBTkiw4d6Vm5d5+TzdHqXY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903592; c=relaxed/simple; bh=5iM5dpJQByr4jyThMJW1hOi75nuXBqtOM+72+KmSwoE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ol72LsuWVjUc3RkFjbvFsS8M2asr7gc6yrb5ghvDe3fwIjEtXGuVNAfomMyBZsa0W1u6Xf6I0dcrpd+Li6RZbZKjqtsIKwCCI28kk85w+osPim15oKPSqa5N5QWy+vGteHILaQsJ6f+X2EF80eNVcq066j4SabbyTdNwylZ53Fc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=i3ZQ8owQ; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="i3ZQ8owQ" Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTP id 583CkDf63263877; Wed, 3 Sep 2025 07:46:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1756903573; bh=j9zumft/0d81Ai2iztJqI3RZIK9xCpoK82EwXCpDpfU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=i3ZQ8owQYoj7YNjj5nuASTBgd7p+3ec4uRlCazkmLF1kdwlpBY++eOv2WxWOsme/q k7OYKVlvwms/+MdgHTvvUZMvMMnV7T2QcfFFllMM8uW/vSAp6hXbJ2o9bHT+PEnfyx FYU7ZeWzDcFufePY/tkdDP/WhsLC9Au6PKkGvlGc= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 583CkDmM3602232 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 3 Sep 2025 07:46:13 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 3 Sep 2025 07:46:12 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Wed, 3 Sep 2025 07:46:13 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 583Cj5wa1576150; Wed, 3 Sep 2025 07:46:06 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH 09/11] PCI: keystone: Switch to devm_request_irq() for "ks-pcie-error-irq" IRQ Date: Wed, 3 Sep 2025 18:14:50 +0530 Message-ID: <20250903124505.365913-10-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250903124505.365913-1-s-vadapalli@ti.com> References: <20250903124505.365913-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" In preparation for enabling loadable module support for the driver, there is motivation to switch to devm_request_irq() to simplify the cleanup on driver removal. Additionally, since the interrupt handler associated with the "ks-pcie-error-irq" namely "ks_pcie_handle_error_irq() is only printing the error and is clearing the interrupt, there is no necessity to prefer devm_request_threaded_irq() over devm_request_irq(). Hence, switch from request_irq() to devm_request_irq(). Signed-off-by: Siddharth Vadapalli --- drivers/pci/controller/dwc/pci-keystone.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index bb93559f6468..02f9a6d0e4a8 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -1277,8 +1277,8 @@ static int ks_pcie_probe(struct platform_device *pdev) if (irq < 0) return irq; =20 - ret =3D request_irq(irq, ks_pcie_err_irq_handler, IRQF_SHARED, - "ks-pcie-error-irq", ks_pcie); + ret =3D devm_request_irq(dev, irq, ks_pcie_err_irq_handler, IRQF_SHARED, + "ks-pcie-error-irq", ks_pcie); if (ret < 0) { dev_err(dev, "failed to request error IRQ %d\n", irq); --=20 2.43.0 From nobody Fri Oct 3 07:43:42 2025 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0FCBC3019D1; Wed, 3 Sep 2025 12:46:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903598; cv=none; b=uMqCGK99a70mUwkeezEMOl+LXO102C+GWskm6ROZu7qP2j4yQ65WZsCzHzaxkx18KVc9eRRxJYKOk3FuUPbAO2HMaRswbr1/gNrav728Dh/9PS8mjLH8HeVOS4sOXIcCVkIuEZZ0JQCPG64Lq8AHH0d+/M/IZjkEB1YY+W0bm/0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903598; c=relaxed/simple; bh=RMyU4qN6lb1VAO/6Ebo/EW9ZSLN6J/a8zPn9TGDbqf8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Albc+ksuYsZWBzhX3iwLOCYMlkZOHR7LsHrLQBOG+hlJlaMuTZFtlx3RwIxge6niDWtdiLcqPC9zYMeqa58A4mmQn3QHtTSZoli6NKlRMWW6MzcoyNJBtLydYYf3aUWetMZ38/TqbYE1kIvraTL+SOJz42sCDzieobpuJReN5Fs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=GMExD6Nb; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="GMExD6Nb" Received: from fllvem-sh03.itg.ti.com ([10.64.41.86]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 583CkKfT2831378; Wed, 3 Sep 2025 07:46:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1756903580; bh=SSgvnTvhiPvpnGrJs7A+0odLklISOXka10lYXHEdnGk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=GMExD6NbY/oe5Loa5ZYnMAS8SnUhVlYBUqG6U+61HDqlqD/6ta6eORPqzqQ71I6zX B+GnHvuo6LKbpV1ukLpKCmt3yqTrloqYxmDzHwjAREfmIUP+3kYBd/i7Yubb0SwL3r FNvyGnMcxmkYgiX20q6vTykzlNERyvK34x1q89U4= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllvem-sh03.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 583CkKxl3523158 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 3 Sep 2025 07:46:20 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 3 Sep 2025 07:46:19 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Wed, 3 Sep 2025 07:46:19 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 583Cj5wb1576150; Wed, 3 Sep 2025 07:46:13 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH 10/11] PCI: keystone: Exit ks_pcie_probe() for the default switch-case of "mode" Date: Wed, 3 Sep 2025 18:14:51 +0530 Message-ID: <20250903124505.365913-11-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250903124505.365913-1-s-vadapalli@ti.com> References: <20250903124505.365913-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" In ks_pcie_probe(), the switch-case for the "mode" is used to configure the PCIe Controller for either Root-Complex or Endpoint mode of operation. Prior to the switch-case statement for "mode" an invalid mode will result in probe failure only if "dw_pcie_ver_is_ge(pci, 480A)" is true, which is the case for the AM654 platform. On the other hand, when that is not the case, "ks_pcie_set_mode()" will be invoked, which does not validate the mode. As a result, it is possible for the switch-case statement for "mode" to receive an invalid mode. Currently, an error message is displayed in the "default" case where "mode" is neither "DW_PCIE_RC_TYPE" nor "DW_PCIE_EP_TYPE", but the probe succeeds. However, since the configuration required for Root-Complex and Endpoint mode have not been performed, the Controller is not operational. Fix this by exiting "ks_pcie_probe()" with the return value of "-EINVAL" in addition to displaying the existing error message. Signed-off-by: Siddharth Vadapalli --- NOTE: A "Fixes" tag is ommitted on purpose since the fix is not crucial: 1. It doesn't fix a crash or any fatal error 2. It doesn't enable controller functionality by fixing the issue Therefore, the patch may not be worth backporting. Regards, Siddharth. drivers/pci/controller/dwc/pci-keystone.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index 02f9a6d0e4a8..4ed6eab0a2f0 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -1414,6 +1414,8 @@ static int ks_pcie_probe(struct platform_device *pdev) break; default: dev_err(dev, "INVALID device type %d\n", mode); + ret =3D -EINVAL; + goto err_get_sync; } =20 ks_pcie_enable_error_irq(ks_pcie); --=20 2.43.0 From nobody Fri Oct 3 07:43:42 2025 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6647A3009F6; Wed, 3 Sep 2025 12:46:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903607; cv=none; b=OyqDxE0gpEfXC6fx+zr0704PfojnOPWKYcPY2ebDGFa3T36ARsae8DqcS523fIb8kLU5gI+YNbcG4Cw4IBx8aEUUW7S6dyyVXoIBW294p5Ku4C1Vdu2qdRvR8EgwcitV9JY5nEGD2yIIEjL1uBdhtaR1lU4rw+/8ryqu1jsSlPQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756903607; c=relaxed/simple; bh=rHdN20Z7v5RdwfYiFVdz1M2P//lEvL3AeWX2YnWW1dI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Qb+YbXFkcLvhPeYazGXyWvxeFqfVGvlWP7BpR1ZgBpUYKpDT/ucC2QEuHtzWYakSY4zbHaAq2QT6VAhPpXp9qIXuALIuUBAVuYmR8gVR18qS5yRH7cTO0Y8gosVRTKhhndqSrcKZS0LY+8qP/vDWQWwQt0q/4bjFy2tjQRBE+P8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=lu8QFZOq; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="lu8QFZOq" Received: from fllvem-sh04.itg.ti.com ([10.64.41.54]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTP id 583CkQOg2770254; Wed, 3 Sep 2025 07:46:26 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1756903586; bh=OkP7TTKiElQOLd+SowOImk0xgxSLg9GSlZ1Kn2yvf34=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=lu8QFZOq0GHhlc4pg8xuXfh+rDajawczMPBhzeODcLlUGrflN8aT2q1hu+TRFuEf3 hpCW1t7heWchbukP3ihr753FtCrvq3QvaGv8ODZI/SMgw5pJzYNEmG89w429Vrw2bD qO1np7XB/eGIrjjoR5R3ZNEQ07D1M7CimjPo7n3w= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllvem-sh04.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 583CkQdW084587 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 3 Sep 2025 07:46:26 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 3 Sep 2025 07:46:26 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Wed, 3 Sep 2025 07:46:26 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 583Cj5wc1576150; Wed, 3 Sep 2025 07:46:20 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH 11/11] PCI: keystone: Add support to build as a loadable module Date: Wed, 3 Sep 2025 18:14:52 +0530 Message-ID: <20250903124505.365913-12-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250903124505.365913-1-s-vadapalli@ti.com> References: <20250903124505.365913-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The 'pci-keystone.c' driver is the application/glue/wrapper driver for the Designware PCIe Controllers on TI SoCs. Now that all of the helper APIs that the 'pci-keystone.c' driver depends upon have been exported for use, enable support to build the driver as a loadable module. Signed-off-by: Siddharth Vadapalli --- drivers/pci/controller/dwc/Kconfig | 6 ++--- drivers/pci/controller/dwc/pci-keystone.c | 28 ++++++++++++++++++++--- 2 files changed, 28 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dw= c/Kconfig index deafc512b079..33f3dab7b385 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -458,10 +458,10 @@ config PCI_DRA7XX_EP This uses the DesignWare core. =20 config PCI_KEYSTONE - bool + tristate =20 config PCI_KEYSTONE_HOST - bool "TI Keystone PCIe controller (host mode)" + tristate "TI Keystone PCIe controller (host mode)" depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST @@ -473,7 +473,7 @@ config PCI_KEYSTONE_HOST DesignWare core functions to implement the driver. =20 config PCI_KEYSTONE_EP - bool "TI Keystone PCIe controller (endpoint mode)" + tristate "TI Keystone PCIe controller (endpoint mode)" depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST depends on PCI_ENDPOINT select PCIE_DW_EP diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index 4ed6eab0a2f0..eabe7e9ed44b 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -132,6 +133,7 @@ struct keystone_pcie { struct device_node *msi_intc_np; struct irq_domain *intx_irq_domain; struct device_node *np; + struct gpio_desc *reset_gpio; =20 /* Application register space */ void __iomem *va_app_base; /* DT 1st resource */ @@ -862,7 +864,7 @@ static int ks_pcie_fault(unsigned long addr, unsigned i= nt fsr, } #endif =20 -static int __init ks_pcie_init_id(struct keystone_pcie *ks_pcie) +static int ks_pcie_init_id(struct keystone_pcie *ks_pcie) { int ret; unsigned int id; @@ -906,7 +908,7 @@ static void ks_pcie_host_deinit(struct dw_pcie_rp *pp) dw_pcie_free_domains(pp); } =20 -static int __init ks_pcie_host_init(struct dw_pcie_rp *pp) +static int ks_pcie_host_init(struct dw_pcie_rp *pp) { struct dw_pcie *pci =3D to_dw_pcie_from_pp(pp); struct keystone_pcie *ks_pcie =3D to_keystone_pcie(pci); @@ -1211,6 +1213,7 @@ static const struct of_device_id ks_pcie_of_match[] = =3D { }, { }, }; +MODULE_DEVICE_TABLE(of, ks_pcie_of_match); =20 static int ks_pcie_probe(struct platform_device *pdev) { @@ -1329,6 +1332,7 @@ static int ks_pcie_probe(struct platform_device *pdev) dev_err(dev, "Failed to get reset GPIO\n"); goto err_link; } + ks_pcie->reset_gpio =3D gpiod; =20 /* Obtain references to the PHYs */ for (i =3D 0; i < num_lanes; i++) @@ -1440,9 +1444,23 @@ static void ks_pcie_remove(struct platform_device *p= dev) { struct keystone_pcie *ks_pcie =3D platform_get_drvdata(pdev); struct device_link **link =3D ks_pcie->link; + struct dw_pcie *pci =3D ks_pcie->pci; int num_lanes =3D ks_pcie->num_lanes; + const struct ks_pcie_of_data *data; struct device *dev =3D &pdev->dev; + enum dw_pcie_device_mode mode; + + ks_pcie_disable_error_irq(ks_pcie); + data =3D of_device_get_match_data(dev); + mode =3D data->mode; + if (mode =3D=3D DW_PCIE_RC_TYPE) { + dw_pcie_host_deinit(&pci->pp); + } else { + pci_epc_deinit_notify(pci->ep.epc); + dw_pcie_ep_deinit(&pci->ep); + } =20 + gpiod_set_value_cansleep(ks_pcie->reset_gpio, 0); pm_runtime_put(dev); pm_runtime_disable(dev); ks_pcie_disable_phy(ks_pcie); @@ -1458,4 +1476,8 @@ static struct platform_driver ks_pcie_driver =3D { .of_match_table =3D ks_pcie_of_match, }, }; -builtin_platform_driver(ks_pcie_driver); +module_platform_driver(ks_pcie_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("PCIe host controller driver for Texas Instruments Keys= tone SoCs"); +MODULE_AUTHOR("Murali Karicheri "); --=20 2.43.0