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(unknown [172.20.64.188]) by smtprelay.cixcomputing.com (Postfix) with ESMTPSA id ED41841C0143; Wed, 3 Sep 2025 16:47:13 +0800 (CST) From: Jun Guo To: peter.chen@cixtech.com, fugang.duan@cixtech.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: cix-kernel-upstream@cixtech.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Hongliang Yang , Jun Guo Subject: [PATCH] arm64: dts: cix: add DT nodes for all I2C and I3C ports for sky1 Date: Wed, 3 Sep 2025 16:47:13 +0800 Message-Id: <20250903084713.3221907-1-jun.guo@cixtech.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SG1PEPF000082E8:EE_|TYZPR06MB6956:EE_ X-MS-Office365-Filtering-Correlation-Id: 44a3a92b-27ff-4496-2ca8-08ddeac67b67 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?RD8z4qe3r86F+i6GbCNnlkyUVlo504dJ2vR67Ag5VgF9Iyne19MkGs9lmQTG?= =?us-ascii?Q?Vsr34ek0rKVA1iWOOViuxrAllODuBTcBTZ0/bJIJMqkXYeDTcv4hYqNk5uFY?= =?us-ascii?Q?WWCCu5YhPI8zccG52s066yQAOE4C0Gkuu5S2t2f1LFW4Ycuga2TuhdRmeFpg?= =?us-ascii?Q?GAnTfn6CpkJQgIAtWeXcWA11hRsJJNWQtGZPAG/W56xzYeBfKoXA8CkBkRQ+?= =?us-ascii?Q?LICqj+9TZlDZEqx+h/duTCeK8uyrV0/dF5kYt/lvlUAAiOWYNjSrg1gkJf6X?= =?us-ascii?Q?Ym9b0r5yZieU7CDYDisuqCqIIjBpwm6UvglFqNRCILXMivTfsR62jkVYqtvk?= =?us-ascii?Q?W4BmGswKcEFownisGAU+paZny8zJkzdO2hAZutvOtRV2YkbBl5iA8hbJQ83x?= =?us-ascii?Q?Jwd8nr0bv8Ran+7Vf3rvdNGH4L9d0PnspF1iNl0Ke+T4jLAUWyuwzpemMi7a?= =?us-ascii?Q?PBnRwj0g6iMIRamupC6apJZtYfsNjtYl7/lYxX/RrZkO3R71U16f2gUAd9mJ?= =?us-ascii?Q?0LYl8W4FEAiti1LEGrNSlmPOqiumLH7IYANdkDtgogFzqYLSBFI9TRpUZ4Ik?= =?us-ascii?Q?oMbhInv89Y55WPELVh7T1U4Xq4Hv64ZPBbkaZAriafrLWQlkir7ZPtv7uZS0?= =?us-ascii?Q?0WOZu5GCcnARkRFP6TgqbtKjvaEp682BNkzP7yaAiI7CWp6fg2IXPMEZtOs3?= =?us-ascii?Q?dfx0UjfSw8Wl/gtuNzX9IczMc8iTs0seKpoaC4g5aQULZ52GU56j9eB7JanL?= =?us-ascii?Q?zE6SZsU3XcvN6rt6Nvsnm4squgXpO2Y87PIqrQpxgsojknVeO7zzPhbihEcs?= =?us-ascii?Q?LCWZzkY5uIT69Z4a9xgqIR/hK+g+Ul1Duoh4zsFvcL5ANUOX6BzxK6Xu8qIx?= =?us-ascii?Q?OrO0yv1IarRUhwPJyacLjK8YWNpe2ot/AHI0BwQRHTN+Kz9L6qBlXJ4sTYId?= =?us-ascii?Q?qKSWSSX/H9Pi77dBViqFPxlWcSd/cuMBi6VSQW/FRrI/brTXfMMoODtp9yrT?= =?us-ascii?Q?dTvh3mFN+nwqe/wdoq8yn2so+cxnycDiEbikUveIZM+/v225IMqHI69aRDgl?= =?us-ascii?Q?PKusVpuBJY7glhe8oJLRAIxfar+IYsSid9p8Q/v+29zvxrHQs7TTGZlkA2NJ?= =?us-ascii?Q?t/rZVE85W30nX5l+gPXTi1uDXGuGPj2y3bT/eKNHHBSxUJV/ZHAx8y5Ef5XO?= =?us-ascii?Q?+ZZy86ILJyOnLenIzUNDUoXvK5gyraZPcPCrtQ6ttKAJhRPjyyU0EqvZJoy/?= =?us-ascii?Q?fmupMvb70R4U0S6VrqOcVNxPO2OwuoElOVZBtGl6z3hxUNb6JnMBHNlgwnRg?= =?us-ascii?Q?9Sv9V8hreNlPfxrufG6hni0Tvks6cSGRfu5MT8+l3qZOlkrJyqWYb2sjd2FR?= =?us-ascii?Q?cggwcQ6vuEJXGdOjZdVzoAiORwrVFj4gg3VL82CyAVFEdTbxJgzFVB6YThBH?= =?us-ascii?Q?3HEkhaxx95bXYEPdYPI1W91z3aEaiLiaLqwS3PAU84+OFlY61qn+oB46CWun?= =?us-ascii?Q?HwFBYi/fT8anaJ/uVA+Fb1rbiTuFrdnwTwTy?= X-Forefront-Antispam-Report: CIP:222.71.101.198;CTRY:CN;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:smtprelay.cixcomputing.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(36860700013);DIR:OUT;SFP:1102; X-OriginatorOrg: cixtech.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Sep 2025 08:47:14.9575 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 44a3a92b-27ff-4496-2ca8-08ddeac67b67 X-MS-Exchange-CrossTenant-Id: 0409f77a-e53d-4d23-943e-ccade7cb4811 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=0409f77a-e53d-4d23-943e-ccade7cb4811;Ip=[222.71.101.198];Helo=[smtprelay.cixcomputing.com] X-MS-Exchange-CrossTenant-AuthSource: SG1PEPF000082E8.apcprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: TYZPR06MB6956 Content-Type: text/plain; charset="utf-8" From: Hongliang Yang The CIX SKY1 SoC supports the integration of 8 I2C bus controllers and 2 I3C bus controllers. Signed-off-by: Hongliang Yang Signed-off-by: Jun Guo --- arch/arm64/boot/dts/cix/sky1.dtsi | 100 ++++++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sk= y1.dtsi index 7dfe7677e649..2fb2c99c0796 100644 --- a/arch/arm64/boot/dts/cix/sky1.dtsi +++ b/arch/arm64/boot/dts/cix/sky1.dtsi @@ -192,6 +192,78 @@ soc@0 { #address-cells =3D <2>; #size-cells =3D <2>; =20 + i2c0: i2c@4010000 { + compatible =3D "cdns,i2c-r1p14"; + reg =3D <0x0 0x04010000 0x0 0x10000>; + clock-frequency =3D <400000>; + clocks =3D <&scmi_clk CLK_TREE_FCH_I2C0_APB>; + interrupts =3D ; + status =3D "disabled"; + }; + + i2c1: i2c@4020000 { + compatible =3D "cdns,i2c-r1p14"; + reg =3D <0x0 0x04020000 0x0 0x10000>; + clock-frequency =3D <400000>; + clocks =3D <&scmi_clk CLK_TREE_FCH_I2C1_APB>; + interrupts =3D ; + status =3D "disabled"; + }; + + i2c2: i2c@4030000 { + compatible =3D "cdns,i2c-r1p14"; + reg =3D <0x0 0x04030000 0x0 0x10000>; + clock-frequency =3D <400000>; + clocks =3D <&scmi_clk CLK_TREE_FCH_I2C2_APB>; + interrupts =3D ; + status =3D "disabled"; + }; + + i2c3: i2c@4040000 { + compatible =3D "cdns,i2c-r1p14"; + reg =3D <0x0 0x04040000 0x0 0x10000>; + clock-frequency =3D <400000>; + clocks =3D <&scmi_clk CLK_TREE_FCH_I2C3_APB>; + interrupts =3D ; + status =3D "disabled"; + }; + + i2c4: i2c@4050000 { + compatible =3D "cdns,i2c-r1p14"; + reg =3D <0x0 0x04050000 0x0 0x10000>; + clock-frequency =3D <400000>; + clocks =3D <&scmi_clk CLK_TREE_FCH_I2C4_APB>; + interrupts =3D ; + status =3D "disabled"; + }; + + i2c5: i2c@4060000 { + compatible =3D "cdns,i2c-r1p14"; + reg =3D <0x0 0x04060000 0x0 0x10000>; + clock-frequency =3D <400000>; + clocks =3D <&scmi_clk CLK_TREE_FCH_I2C5_APB>; + interrupts =3D ; + status =3D "disabled"; + }; + + i2c6: i2c@4070000 { + compatible =3D "cdns,i2c-r1p14"; + reg =3D <0x0 0x04070000 0x0 0x10000>; + clock-frequency =3D <400000>; + clocks =3D <&scmi_clk CLK_TREE_FCH_I2C6_APB>; + interrupts =3D ; + status =3D "disabled"; + }; + + i2c7: i2c@4080000 { + compatible =3D "cdns,i2c-r1p14"; + reg =3D <0x0 0x04080000 0x0 0x10000>; + clock-frequency =3D <400000>; + clocks =3D <&scmi_clk CLK_TREE_FCH_I2C7_APB>; + interrupts =3D ; + status =3D "disabled"; + }; + uart0: serial@40b0000 { compatible =3D "arm,pl011", "arm,primecell"; reg =3D <0x0 0x040b0000 0x0 0x1000>; @@ -228,6 +300,34 @@ uart3: serial@40e0000 { status =3D "disabled"; }; =20 + i3c0: i3c@40f0000 { + compatible =3D "cdns,i3c-master"; + reg =3D <0x0 0x040f0000 0x0 0x10000>; + #address-cells =3D <3>; + #size-cells =3D <0>; + interrupts =3D ; + clocks =3D <&scmi_clk CLK_TREE_FCH_I3C0_APB>, + <&scmi_clk CLK_TREE_FCH_I3C0_FUNC>; + clock-names =3D "pclk", "sysclk"; + i3c-scl-hz =3D <400000>; + i2c-scl-hz =3D <100000>; + status =3D "disabled"; + }; + + i3c1: i3c@4100000 { + compatible =3D "cdns,i3c-master"; + reg =3D <0x0 0x04100000 0x0 0x10000>; + #address-cells =3D <3>; + #size-cells =3D <0>; + interrupts =3D ; + clocks =3D <&scmi_clk CLK_TREE_FCH_I3C1_APB>, + <&scmi_clk CLK_TREE_FCH_I3C1_FUNC>; + clock-names =3D "pclk", "sysclk"; + i3c-scl-hz =3D <400000>; + i2c-scl-hz =3D <100000>; + status =3D "disabled"; + }; + mbox_ap2se: mailbox@5060000 { compatible =3D "cix,sky1-mbox"; reg =3D <0x0 0x05060000 0x0 0x10000>; --=20 2.34.1