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charset="utf-8" Due to board-specific hardware constraints particularly related to level shifter in this case the maximum frequency for SD High-Speed (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD card in HS mode. This is achieved by introducing the `max-sd-hs-hz` property in the device tree, allowing the controller to operate within safe frequency limits for HS mode. Signed-off-by: Sarthak Garg --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qco= m/sm8550.dtsi index 82cabf777cd2..3692a3a49634 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -3189,6 +3189,7 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, &config_noc SLAVE_SDCC_2 QCOM_ICC_TAG_ACTIVE_ONLY>; interconnect-names =3D "sdhc-ddr", "cpu-sdhc"; bus-width =3D <4>; + max-sd-hs-hz =3D <37500000>; dma-coherent; =20 /* Forbid SDR104/SDR50 - broken hw! */ --=20 2.34.1