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Wed, 03 Sep 2025 01:00:23 -0700 (PDT) From: Bartosz Golaszewski Date: Wed, 03 Sep 2025 10:00:07 +0200 Subject: [PATCH 03/12] gpio: idt3243x: use new generic GPIO chip API Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250903-gpio-mmio-gpio-conv-part3-v1-3-ff346509f408@linaro.org> References: <20250903-gpio-mmio-gpio-conv-part3-v1-0-ff346509f408@linaro.org> In-Reply-To: <20250903-gpio-mmio-gpio-conv-part3-v1-0-ff346509f408@linaro.org> To: Linus Walleij , Bartosz Golaszewski , Linus Walleij , Imre Kaloz , James Cowgill , Matt Redfearn , Neil Jones , Nikolaos Pasaloukos Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4965; i=bartosz.golaszewski@linaro.org; h=from:subject:message-id; bh=e/qGrO8l+ENSlw7HsMx562UJMTgOPKWKnabZxYTV0tI=; b=owEBbQKS/ZANAwAKARGnLqAUcddyAcsmYgBot/WR0q/PabxdIvdLuE5NvJ2Vf33JlqQQHM24o lmAyWJXZSiJAjMEAAEKAB0WIQQWnetsC8PEYBPSx58Rpy6gFHHXcgUCaLf1kQAKCRARpy6gFHHX csuFD/4l6q+pYGbMLExGUqxOdQN4Qaa2wc88p4+eTqITDl6QmdBk7jg8eDU1raZaO50yTBq8nyX WMMpOG0CVqAwUjYw+jrfXEVBkMbnNl2HTlxp/R1SVyUyJrXtLhtwjYf2BLh18hhNKNLf+uw9nJk zReeTu5hD90OVTk9qoq7ZFEn61vZeEcT1qjGkM+t/JHkvh5HC4WtmC9uH7FP2PwcyreqTDTvs44 2n+qz0lTIlHsek8dAsKIk8g/XHCXKz0k8UXTupshUiJO6x0GU9iP4VfPZeMb/QEzC3sV+TzgHxY cw5OvDsNufNtrHMGf5piBrg+fHvyGhlJUjyNYYweDw/20ty4XMQ7fQRpspSJ8KHjIyd5YgnUnX/ H5r5q+z8I+EnYalW22flHyOlYK4BHdhuf3+h+jHylT6Lx2qIdDnQDjvhTuhsIUhczCfARTwdJtk 31ylCCp8KxYth7VXtiYI3vC+Z6EHnFb8oTiaQXDSjwhum9GM/0XNpLa5lIy8FdIZe3R6KcBZzFh V/OeNbJ3UvbAiuVPnUkk1KAppgZ/6A9Z/KvgHLSDj4GHzGqkbPrczDKUtOoiKmg6zdK8JqjmeJk 9dCSx+hYa2qw+joESxnZ1cep1QqyS00e/ligPrj1e8elBK2CIEcir+oHv3CtSd+blUDgw432spk apu8x7vO5jXT02g== X-Developer-Key: i=bartosz.golaszewski@linaro.org; a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-idt3243x.c | 45 ++++++++++++++++++++++------------------= ---- 1 file changed, 23 insertions(+), 22 deletions(-) diff --git a/drivers/gpio/gpio-idt3243x.c b/drivers/gpio/gpio-idt3243x.c index 535f255144556ecb71c5e3f8756f9f4a8bd9ca3d..232a621ba086ef66b2d2f0d4713= 88c77ac5caa5b 100644 --- a/drivers/gpio/gpio-idt3243x.c +++ b/drivers/gpio/gpio-idt3243x.c @@ -3,6 +3,7 @@ =20 #include #include +#include #include #include #include @@ -18,7 +19,7 @@ #define IDT_GPIO_ISTAT 0x0C =20 struct idt_gpio_ctrl { - struct gpio_chip gc; + struct gpio_generic_chip chip; void __iomem *pic; void __iomem *gpio; u32 mask_cache; @@ -50,14 +51,13 @@ static int idt_gpio_irq_set_type(struct irq_data *d, un= signed int flow_type) struct gpio_chip *gc =3D irq_data_get_irq_chip_data(d); struct idt_gpio_ctrl *ctrl =3D gpiochip_get_data(gc); unsigned int sense =3D flow_type & IRQ_TYPE_SENSE_MASK; - unsigned long flags; u32 ilevel; =20 /* hardware only supports level triggered */ if (sense =3D=3D IRQ_TYPE_NONE || (sense & IRQ_TYPE_EDGE_BOTH)) return -EINVAL; =20 - raw_spin_lock_irqsave(&gc->bgpio_lock, flags); + guard(gpio_generic_lock_irqsave)(&ctrl->chip); =20 ilevel =3D readl(ctrl->gpio + IDT_GPIO_ILEVEL); if (sense & IRQ_TYPE_LEVEL_HIGH) @@ -68,7 +68,6 @@ static int idt_gpio_irq_set_type(struct irq_data *d, unsi= gned int flow_type) writel(ilevel, ctrl->gpio + IDT_GPIO_ILEVEL); irq_set_handler_locked(d, handle_level_irq); =20 - raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); return 0; } =20 @@ -84,14 +83,11 @@ static void idt_gpio_mask(struct irq_data *d) { struct gpio_chip *gc =3D irq_data_get_irq_chip_data(d); struct idt_gpio_ctrl *ctrl =3D gpiochip_get_data(gc); - unsigned long flags; =20 - raw_spin_lock_irqsave(&gc->bgpio_lock, flags); - - ctrl->mask_cache |=3D BIT(d->hwirq); - writel(ctrl->mask_cache, ctrl->pic + IDT_PIC_IRQ_MASK); - - raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); + scoped_guard(gpio_generic_lock_irqsave, &ctrl->chip) { + ctrl->mask_cache |=3D BIT(d->hwirq); + writel(ctrl->mask_cache, ctrl->pic + IDT_PIC_IRQ_MASK); + } =20 gpiochip_disable_irq(gc, irqd_to_hwirq(d)); } @@ -100,15 +96,13 @@ static void idt_gpio_unmask(struct irq_data *d) { struct gpio_chip *gc =3D irq_data_get_irq_chip_data(d); struct idt_gpio_ctrl *ctrl =3D gpiochip_get_data(gc); - unsigned long flags; =20 gpiochip_enable_irq(gc, irqd_to_hwirq(d)); - raw_spin_lock_irqsave(&gc->bgpio_lock, flags); + + guard(gpio_generic_lock_irqsave)(&ctrl->chip); =20 ctrl->mask_cache &=3D ~BIT(d->hwirq); writel(ctrl->mask_cache, ctrl->pic + IDT_PIC_IRQ_MASK); - - raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); } =20 static int idt_gpio_irq_init_hw(struct gpio_chip *gc) @@ -134,6 +128,7 @@ static const struct irq_chip idt_gpio_irqchip =3D { =20 static int idt_gpio_probe(struct platform_device *pdev) { + struct gpio_generic_chip_config config; struct device *dev =3D &pdev->dev; struct gpio_irq_chip *girq; struct idt_gpio_ctrl *ctrl; @@ -150,18 +145,24 @@ static int idt_gpio_probe(struct platform_device *pde= v) if (IS_ERR(ctrl->gpio)) return PTR_ERR(ctrl->gpio); =20 - ctrl->gc.parent =3D dev; + ctrl->chip.gc.parent =3D dev; =20 - ret =3D bgpio_init(&ctrl->gc, &pdev->dev, 4, ctrl->gpio + IDT_GPIO_DATA, - NULL, NULL, ctrl->gpio + IDT_GPIO_DIR, NULL, 0); + config =3D (typeof(config)){ + .dev =3D &pdev->dev, + .sz =3D 4, + .dat =3D ctrl->gpio + IDT_GPIO_DATA, + .dirout =3D ctrl->gpio + IDT_GPIO_DIR, + }; + + ret =3D gpio_generic_chip_init(&ctrl->chip, &config); if (ret) { - dev_err(dev, "bgpio_init failed\n"); + dev_err(dev, "failed to initialize the generic GPIO chip\n"); return ret; } =20 ret =3D device_property_read_u32(dev, "ngpios", &ngpios); if (!ret) - ctrl->gc.ngpio =3D ngpios; + ctrl->chip.gc.ngpio =3D ngpios; =20 if (device_property_read_bool(dev, "interrupt-controller")) { ctrl->pic =3D devm_platform_ioremap_resource_byname(pdev, "pic"); @@ -172,7 +173,7 @@ static int idt_gpio_probe(struct platform_device *pdev) if (parent_irq < 0) return parent_irq; =20 - girq =3D &ctrl->gc.irq; + girq =3D &ctrl->chip.gc.irq; gpio_irq_chip_set_chip(girq, &idt_gpio_irqchip); girq->init_hw =3D idt_gpio_irq_init_hw; girq->parent_handler =3D idt_gpio_dispatch; @@ -188,7 +189,7 @@ static int idt_gpio_probe(struct platform_device *pdev) girq->handler =3D handle_bad_irq; } =20 - return devm_gpiochip_add_data(&pdev->dev, &ctrl->gc, ctrl); + return devm_gpiochip_add_data(&pdev->dev, &ctrl->chip.gc, ctrl); } =20 static const struct of_device_id idt_gpio_of_match[] =3D { --=20 2.48.1