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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3276fcd4bd6sm17921724a91.15.2025.09.01.21.21.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Sep 2025 21:21:49 -0700 (PDT) From: Jie Gan To: Suzuki K Poulose , Mike Leach , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tingwei Zhang , Mao Jinlong , Yuanfang Zhang , Tao Zhang Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v1] dt-binding: Update oss email address for Coresight documents Date: Tue, 2 Sep 2025 12:21:43 +0800 Message-Id: <20250902042143.1010-1-jie.gan@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODMwMDAxOSBTYWx0ZWRfX+m9oZK6VErQ1 WA+/70U3nvbzPYL4QHBvw2CDm91PRy2qSbNBzSU+VMu27lGEgpPPco/6JvN+VGozP3GgUk5XZiw wc4q1VxEAc7GsRj2yi8MoxZP4mhOVrLUG8RYkdN1nS8eX4rhlqoxZr2067O27RgZu5u8KDbn+n7 ILVeS+qEeTGrslD2U/mlBR59Og7ryBeolxGG917+sCCawmTSGsTdo0WSvekb/84Oms9EY7eb1Aw VrXGKJ05LBCmYYXQVFJUnz8nM9g9Mjuh5S1Z1WGzzsSm8sw/zrEqm0IpvxgYzaVi4CReaF4blHH mpFINgCg6XLKeH5ySxbFRRQPFCWG6bkub1Cx9JXVSteP2RI99HjnMq2Z/QQn3u+jp1Vey0BtcI2 G6H0BLJ9 X-Proofpoint-GUID: U3omOJxlU9pwrCtfoCCGdc62ntqQdUFj X-Proofpoint-ORIG-GUID: U3omOJxlU9pwrCtfoCCGdc62ntqQdUFj X-Authority-Analysis: v=2.4 cv=PNkP+eqC c=1 sm=1 tr=0 ts=68b670df cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=yJojWOMRYYMA:10 a=gEfo2CItAAAA:8 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=KKAkSRfTAAAA:8 a=7CQSdrXTAAAA:8 a=h3IwZbAuBUFrkWXUJSEA:9 a=iS9zxrgQBfv6-_F4QbHw:22 a=sptkURWiP4Gy88Gu7hUp:22 a=TjNXssC_j7lpFel5tvFf:22 a=cvBusfyB2V15izCimMoJ:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-02_01,2025-08-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 clxscore=1015 suspectscore=0 adultscore=0 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508300019 Content-Type: text/plain; charset="utf-8" Update the OSS email addresses across all Coresight documents, as the previous addresses have been deprecated. Signed-off-by: Jie Gan Acked-by: Rob Herring (Arm) --- .../sysfs-bus-coresight-devices-dummy-source | 4 +- .../testing/sysfs-bus-coresight-devices-tpdm | 56 +++++++++---------- .../arm/arm,coresight-dummy-sink.yaml | 2 +- .../arm/arm,coresight-dummy-source.yaml | 2 +- .../bindings/arm/qcom,coresight-ctcu.yaml | 6 +- .../arm/qcom,coresight-remote-etm.yaml | 4 +- .../bindings/arm/qcom,coresight-tnoc.yaml | 2 +- .../bindings/arm/qcom,coresight-tpda.yaml | 4 +- .../bindings/arm/qcom,coresight-tpdm.yaml | 4 +- 9 files changed, 42 insertions(+), 42 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-so= urce b/Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source index 0830661ef656..efd9f96d6eca 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source @@ -1,7 +1,7 @@ What: /sys/bus/coresight/devices/dummy_source/enable_source Date: Dec 2024 KernelVersion: 6.14 -Contact: Mao Jinlong +Contact: Mao Jinlong Description: (RW) Enable/disable tracing of dummy source. A sink should be= activated before enabling the source. The path of coresight components linking the source to the sink is configured and managed automatically by the @@ -10,6 +10,6 @@ Description: (RW) Enable/disable tracing of dummy source.= A sink should be activ What: /sys/bus/coresight/devices/dummy_source/traceid Date: Dec 2024 KernelVersion: 6.14 -Contact: Mao Jinlong +Contact: Mao Jinlong Description: (R) Show the trace ID that will appear in the trace stream coming from this trace entity. diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm b/D= ocumentation/ABI/testing/sysfs-bus-coresight-devices-tpdm index a341b08ae70b..86e508a1b409 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm @@ -1,7 +1,7 @@ What: /sys/bus/coresight/devices//integration_test Date: January 2023 KernelVersion: 6.2 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (Write) Run integration test for tpdm. Integration test will generate test data for tpdm. It can help to make @@ -15,7 +15,7 @@ Description: What: /sys/bus/coresight/devices//reset_dataset Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (Write) Reset the dataset of the tpdm. =20 @@ -25,7 +25,7 @@ Description: What: /sys/bus/coresight/devices//dsb_trig_type Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the trigger type of the DSB for tpdm. =20 @@ -36,7 +36,7 @@ Description: What: /sys/bus/coresight/devices//dsb_trig_ts Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the trigger timestamp of the DSB for tpdm. =20 @@ -47,7 +47,7 @@ Description: What: /sys/bus/coresight/devices//dsb_mode Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the programming mode of the DSB for tpdm. =20 @@ -61,7 +61,7 @@ Description: What: /sys/bus/coresight/devices//dsb_edge/ctrl_idx Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the index number of the edge detection for the DSB subunit TPDM. Since there are at most 256 edge detections, this @@ -70,7 +70,7 @@ Description: What: /sys/bus/coresight/devices//dsb_edge/ctrl_val Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: Write a data to control the edge detection corresponding to the index number. Before writing data to this sysfs file, @@ -86,7 +86,7 @@ Description: What: /sys/bus/coresight/devices//dsb_edge/ctrl_mask Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: Write a data to mask the edge detection corresponding to the index number. Before writing data to this sysfs file, "ctrl_idx" should @@ -98,21 +98,21 @@ Description: What: /sys/bus/coresight/devices//dsb_edge/edcr[0:15] Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: Read a set of the edge control value of the DSB in TPDM. =20 What: /sys/bus/coresight/devices//dsb_edge/edcmr[0:7] Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: Read a set of the edge control mask of the DSB in TPDM. =20 What: /sys/bus/coresight/devices//dsb_trig_patt/xpr[0:7] Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the value of the trigger pattern for the DSB subunit TPDM. @@ -120,7 +120,7 @@ Description: What: /sys/bus/coresight/devices//dsb_trig_patt/xpmr[0:7] Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the mask of the trigger pattern for the DSB subunit TPDM. @@ -128,21 +128,21 @@ Description: What: /sys/bus/coresight/devices//dsb_patt/tpr[0:7] Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the value of the pattern for the DSB subunit TPDM. =20 What: /sys/bus/coresight/devices//dsb_patt/tpmr[0:7] Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the mask of the pattern for the DSB subunit TPDM. =20 What: /sys/bus/coresight/devices//dsb_patt/enable_ts Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (Write) Set the pattern timestamp of DSB tpdm. Read the pattern timestamp of DSB tpdm. @@ -154,7 +154,7 @@ Description: What: /sys/bus/coresight/devices//dsb_patt/set_type Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (Write) Set the pattern type of DSB tpdm. Read the pattern type of DSB tpdm. @@ -166,7 +166,7 @@ Description: What: /sys/bus/coresight/devices//dsb_msr/msr[0:31] Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the MSR(mux select register) for the DSB subunit TPDM. @@ -174,7 +174,7 @@ Description: What: /sys/bus/coresight/devices//cmb_mode Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (Write) Set the data collection mode of CMB tpdm. Continuous change creates CMB data set elements on every CMBCLK edge. Trace-on-change creates CMB data set elements only when a new @@ -188,7 +188,7 @@ Description: (Write) Set the data collection mode of CM= B tpdm. Continuous What: /sys/bus/coresight/devices//cmb_trig_patt/xpr[0:1] Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the value of the trigger pattern for the CMB subunit TPDM. @@ -196,7 +196,7 @@ Description: What: /sys/bus/coresight/devices//cmb_trig_patt/xpmr[0:1] Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the mask of the trigger pattern for the CMB subunit TPDM. @@ -204,21 +204,21 @@ Description: What: /sys/bus/coresight/devices//dsb_patt/tpr[0:1] Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the value of the pattern for the CMB subunit TPDM. =20 What: /sys/bus/coresight/devices//dsb_patt/tpmr[0:1] Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the mask of the pattern for the CMB subunit TPDM. =20 What: /sys/bus/coresight/devices//cmb_patt/enable_ts Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (Write) Set the pattern timestamp of CMB tpdm. Read the pattern timestamp of CMB tpdm. @@ -230,7 +230,7 @@ Description: What: /sys/bus/coresight/devices//cmb_trig_ts Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the trigger timestamp of the CMB for tpdm. =20 @@ -241,7 +241,7 @@ Description: What: /sys/bus/coresight/devices//cmb_ts_all Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Read or write the status of timestamp upon all interface. Only value 0 and 1 can be written to this node. Set this node to 1 to r= equest @@ -253,7 +253,7 @@ Description: What: /sys/bus/coresight/devices//cmb_msr/msr[0:31] Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the MSR(mux select register) for the CMB subunit TPDM. @@ -261,7 +261,7 @@ Description: What: /sys/bus/coresight/devices//mcmb_trig_lane Date: Feb 2025 KernelVersion 6.15 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get which lane participates in the output pattern match cross trigger mechanism for the MCMB subunit TPDM. @@ -269,6 +269,6 @@ Description: What: /sys/bus/coresight/devices//mcmb_lanes_select Date: Feb 2025 KernelVersion 6.15 -Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) <= quic_taozha@quicinc.com> +Contact: Jinlong Mao , Tao Zhang Description: (RW) Set/Get the enablement of the individual lane. diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink= .yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml index 08b89b62c505..deaadf1ca1aa 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml @@ -31,7 +31,7 @@ maintainers: - Mike Leach - Suzuki K Poulose - James Clark - - Mao Jinlong + - Mao Jinlong - Hao Zhang =20 properties: diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sour= ce.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.= yaml index 742dc4e25d3b..b29274f6d5c7 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml @@ -30,7 +30,7 @@ maintainers: - Mike Leach - Suzuki K Poulose - James Clark - - Mao Jinlong + - Mao Jinlong - Hao Zhang =20 properties: diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml= b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml index 843b52eaf872..6f713d20833f 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml @@ -7,9 +7,9 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: CoreSight TMC Control Unit =20 maintainers: - - Yuanfang Zhang - - Mao Jinlong - - Jie Gan + - Yuanfang Zhang + - Mao Jinlong + - Jie Gan =20 description: | The Trace Memory Controller(TMC) is used for Embedded Trace Buffer(ETB), diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-remote-et= m.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-remote-etm.ya= ml index 4fd5752978cd..c68764d759ce 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-remote-etm.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-remote-etm.yaml @@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Coresight Remote ETM(Embedded Trace Macrocell) =20 maintainers: - - Jinlong Mao - - Tao Zhang + - Jinlong Mao + - Tao Zhang =20 description: Support for ETM trace collection on remote processor using coresight diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml= b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml index 9d1c93a9ade3..ef648a15b806 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Trace Network On Chip - TNOC =20 maintainers: - - Yuanfang Zhang + - Yuanfang Zhang =20 description: > The Trace Network On Chip (TNOC) is an integration hierarchy hardware diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml= b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml index 5ed40f21b8eb..bab80823f0f6 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml @@ -33,8 +33,8 @@ description: | to sink. =20 maintainers: - - Mao Jinlong - - Tao Zhang + - Mao Jinlong + - Tao Zhang =20 # Need a custom select here or 'arm,primecell' will match on lots of nodes select: diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml= b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml index 7c0acc1f25c5..33ec83901651 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml @@ -19,8 +19,8 @@ description: | sources and send it to a TPDA for packetization, timestamping, and funne= ling. =20 maintainers: - - Mao Jinlong - - Tao Zhang + - Mao Jinlong + - Tao Zhang =20 # Need a custom select here or 'arm,primecell' will match on lots of nodes select: --=20 2.34.1