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Tue, 02 Sep 2025 02:00:35 -0700 (PDT) From: Neil Armstrong Date: Tue, 02 Sep 2025 11:00:30 +0200 Subject: [PATCH v2 3/5] dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Document static lanes mapping Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250902-topic-x1e80100-hdmi-v2-3-f4ccf0ef79ab@linaro.org> References: <20250902-topic-x1e80100-hdmi-v2-0-f4ccf0ef79ab@linaro.org> In-Reply-To: <20250902-topic-x1e80100-hdmi-v2-0-f4ccf0ef79ab@linaro.org> To: Andrzej Hajda , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Bjorn Andersson , Konrad Dybcio Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The QMP USB3/DP Combo PHY hosts an USB3 phy and a DP PHY on top of a combo glue to route either lanes to the 4 shared physical lanes. The routing of the lanes can be: - 2 DP + 2 USB3 - 4 DP - 2 USB3 The layout of the lanes was designed to be mapped and swapped related to the USB-C Power Delivery negociation, so it supports a finite set of mappings inherited by the USB-C Altmode layouts. Nevertheless those QMP Comby PHY can be statically used to drive a DisplayPort connector, DP->HDMI bridge, USB3 A Connector, etc... without an USB-C connector and no PD events. Add a property that documents the static lanes mapping to each underlying PHY to allow supporting boards directly connecting USB3 and DisplayPort lanes to the QMP Combo lanes. Signed-off-by: Neil Armstrong --- .../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 29 ++++++++++++++++++= ++++ 1 file changed, 29 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43d= p-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43d= p-phy.yaml index c8bc512df08b5694c8599f475de78679a4438449..12511a462bc6245e0b82726d053= d8605148c5047 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.y= aml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.y= aml @@ -76,6 +76,35 @@ properties: mode-switch: true orientation-switch: true =20 + qcom,static-lanes-mapping: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 4 + items: + enum: + - 0 # Unconnected (PHY_NONE) + - 4 # USB3 (PHY_TYPE_USB3) + - 6 # DisplayPort (PHY_TYPE_DP) + description: + Describes the static mapping of the Combo PHY lanes, when not used + a in a Type-C dynamic setup using USB-C PD Events to change the mapp= ing. + The 4 lanes can either routed to the underlying DP PHY or the USB3 P= HY. + Only 2 of the lanes can be connected to the USB3 PHY, but the 4 lane= s can + be connected to the DP PHY. + The numbers corresponds to the PHY Type the lanes are connected to. + The possible combinations are + <0 0 0 0> when none are connected + <4 4 0 6> USB3 and DP single lane + <4 4 6 6> USB3 and DP + <6 6 4 4> DP and USB3 + <6 0 4 4> DP and USB3 single lane + <4 4 0 0> USB3 Only + <0 0 4 4> USB3 Only + <6 0 0 0> DP single lane + <0 0 0 6> DP single lane + <6 6 0 0> DP 2 lanes + <0 0 6 6> DP 2 lanes + <6 6 6 6> DP 4 lanes + ports: $ref: /schemas/graph.yaml#/properties/ports properties: --=20 2.34.1