From nobody Fri Oct 3 11:27:52 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BAD7B341666 for ; Tue, 2 Sep 2025 17:07:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756832843; cv=none; b=eVH2rCgfE7XFlYtgpLYomdwbjjBfgG2/Hn+GnXLSYDjVrQLUmgVuVuevElMmlhe3ytmhxnIzuksmR4pz6Ah9pHWE5boXDXWaK0HL22ujxwjVqn88rTjA8X7C45+wjW9gVoOEzBIah+VJhDu16L/cZUXgxwPguyVKRXqTyUWWE3Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756832843; c=relaxed/simple; bh=VhMnfoq8bwK8cM8+3j7VrRnj6sRYkBSA9qTfJP4hKsU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Ls42VAXhQSITE7OJK2vI54Wv7tK9OBz7Y1oXSuynHyJz8/6OekyuISXGpkR7oodIUfhRnqGHrd3fr6dwHRJEgsGCuXFXY2RYT4G6Vqv0CrXZ1S3kmmmoZ3Ic1/Wyedc8z14QMQZYdQBqHy5dK2Hsb/dy/jSo0pWbvexPff+bFoE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=nhgLRGii; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="nhgLRGii" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1756832840; bh=VhMnfoq8bwK8cM8+3j7VrRnj6sRYkBSA9qTfJP4hKsU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=nhgLRGiieUY2LSOayVt7FWDq5wiL4sZKYIbH2BiqRJKQwfbAp2aXKAB/I0RA7MyFq ARTft1vShxMPbaO8qBTBTrraIqriAy2yXl62gQuoyoy8YBzkDB8KfzBA0f9HuEg0Ek s8nE0NWFHnMI4fFnybmSZzSZTQuJrmcipEzATGTi3nurr7TNnjuxKu7Vm86rrTkgmn TFZGz4YQyUdyKRYWzcUS89D2nTVdTybBnnArwg1QkJkLhigWlWAKyQ59OyrLFpoGuc EXsQfDhbu4hvSdsLZrcOEN9y1goIGGorN1Qnk6H9N3Myo4PctSk9TjBAMTMpA8062A wVHsmPFN52+zg== Received: from localhost (unknown [82.79.138.60]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with UTF8SMTPSA id EA5CE17E1356; Tue, 2 Sep 2025 19:07:19 +0200 (CEST) From: Cristian Ciocaltea Date: Tue, 02 Sep 2025 20:07:01 +0300 Subject: [PATCH 3/3] phy: rockchip: samsung-hdptx: Prevent Inter-Pair Skew from exceeding the limits Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250902-phy-hdptx-fixes-v1-3-e8d9ef9748d6@collabora.com> References: <20250902-phy-hdptx-fixes-v1-0-e8d9ef9748d6@collabora.com> In-Reply-To: <20250902-phy-hdptx-fixes-v1-0-e8d9ef9748d6@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner , Dmitry Baryshkov , Algea Cao Cc: kernel@collabora.com, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 Fixup PHY deskew FIFO to prevent the phase of D2 lane going ahead of other lanes. It's worth noting this might only happen when dealing with HDMI 2.0 rates. Fixes: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver") Co-developed-by: Algea Cao Signed-off-by: Algea Cao Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/ph= y/rockchip/phy-rockchip-samsung-hdptx.c index 8ba9b53c2309b22a496574b7731377049f50068f..29de2f7bdae8a31958e31b0a642= 81532fd76e64d 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -668,13 +668,9 @@ static const struct reg_sequence rk_hdtpx_common_lane_= init_seq[] =3D { =20 static const struct reg_sequence rk_hdtpx_tmds_lane_init_seq[] =3D { REG_SEQ0(LANE_REG(0312), 0x00), - REG_SEQ0(LANE_REG(031e), 0x00), REG_SEQ0(LANE_REG(0412), 0x00), - REG_SEQ0(LANE_REG(041e), 0x00), REG_SEQ0(LANE_REG(0512), 0x00), - REG_SEQ0(LANE_REG(051e), 0x00), REG_SEQ0(LANE_REG(0612), 0x00), - REG_SEQ0(LANE_REG(061e), 0x08), REG_SEQ0(LANE_REG(0303), 0x2f), REG_SEQ0(LANE_REG(0403), 0x2f), REG_SEQ0(LANE_REG(0503), 0x2f), @@ -687,6 +683,11 @@ static const struct reg_sequence rk_hdtpx_tmds_lane_in= it_seq[] =3D { REG_SEQ0(LANE_REG(0406), 0x1c), REG_SEQ0(LANE_REG(0506), 0x1c), REG_SEQ0(LANE_REG(0606), 0x1c), + /* Keep Inter-Pair Skew in the limits */ + REG_SEQ0(LANE_REG(031e), 0x02), + REG_SEQ0(LANE_REG(041e), 0x02), + REG_SEQ0(LANE_REG(051e), 0x02), + REG_SEQ0(LANE_REG(061e), 0x0a), }; =20 static struct tx_drv_ctrl tx_drv_ctrl_rbr[4][4] =3D { --=20 2.51.0