From nobody Fri Oct 3 13:32:06 2025 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E1FB258EC1; Mon, 1 Sep 2025 05:59:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756706374; cv=none; b=Y/KkjhYq41SunAfPHDaiVnujOWMltU/O/QfnILYULEOgcsM/x1ZzLiqe960vaqPlZHmcRmi/jErds4ja4JX6etOmST6JC9ZaNwkA7cFPnzR0REAl2LlkfnDHypQNWQSs1omYNFij6sYIOEflk8GJ9IQiPm8Fu4jC0ZZdz3rXmls= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756706374; c=relaxed/simple; bh=ECQvAOjA0DGalnuBqlDoOWOaq5CsUoGL13+0ZROQxEE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=HSiZunEdQN7xswwJMB9LQZT8bOdZff16NkO+1tGIXLMQRrjRLm/eAyvoGUHAG9+vzJ0ficicL2iNSUifno0EbtnaX3KNhXgwr8rKJTygr76VBqXHcM/OVILFdSbaC7HzNkyfpRcUXAytkI836OudyyT74LAxDpxAkrXKDswy9NY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 1 Sep 2025 13:59:23 +0800 Received: from mail.aspeedtech.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 1 Sep 2025 13:59:23 +0800 From: Jacky Chou To: , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v3 04/10] dt-bindings: pinctrl: aspeed,ast2600-pinctrl: Add PCIe RC PERST# group Date: Mon, 1 Sep 2025 13:59:16 +0800 Message-ID: <20250901055922.1553550-5-jacky_chou@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250901055922.1553550-1-jacky_chou@aspeedtech.com> References: <20250901055922.1553550-1-jacky_chou@aspeedtech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add PCIe PERST# group to support for PCIe RC. Signed-off-by: Jacky Chou Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinct= rl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.= yaml index 80974c46f3ef..af8979af9b45 100644 --- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml @@ -141,6 +141,7 @@ additionalProperties: - NRTS3 - NRTS4 - OSCCLK + - PCIERC1 - PEWAKE - PWM0 - PWM1 @@ -369,6 +370,7 @@ additionalProperties: - NRTS3 - NRTS4 - OSCCLK + - PCIERC1 - PEWAKE - PWM0 - PWM1 --=20 2.43.0