From nobody Fri Oct 3 13:27:19 2025 Received: from freeshell.de (freeshell.de [116.202.128.144]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3B8B128E3F; Sun, 31 Aug 2025 23:01:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=116.202.128.144 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756681301; cv=none; b=XUKvKWLmHNAOq0R25sYhJ8vXX9l+/dIcyLKTg3DN4iCiY+a9BwmDyDMRWYhi1RnduzMe+PnyjEg8CvVfseIjGlNJokqzc0RiicGYuRiH5DwV4s6QNq/abBDxdWvtcEr0jglV/j/S+HT4J3DmTeO27NVpw/nkF70aPlujTd5pH6o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756681301; c=relaxed/simple; bh=Izc1aFIyDGmf8d+ALXW9MS1Y9NuPvV19PCEOutaDbbM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DV0r93ov0WBU+sf8KKIMMN49te9W7LPnnfH7gPqkKVcveVMFCgXqQ9gcmla9cAeWs76YbsN7yJyN7gDo7F9XePjaTip5vgo8AQL95Vb0G4kbiMYSYm16TL7aUD5TDT+EVRaYoMWlkjQryBr7sXdORBco0BlvxetQt0341K6iKAY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=freeshell.de; spf=pass smtp.mailfrom=freeshell.de; arc=none smtp.client-ip=116.202.128.144 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=freeshell.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=freeshell.de Received: from hay.lan (unknown [IPv6:2605:59c0:2078:cf00:6ecf:39ff:fe00:8375]) (Authenticated sender: e) by freeshell.de (Postfix) with ESMTPSA id EB3C6B220079; Mon, 1 Sep 2025 01:01:34 +0200 (CEST) From: E Shattow To: Conor Dooley , Emil Renner Berthing , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, E Shattow Subject: [PATCH v2 1/5] riscv: dts: starfive: add common board dtsi for Milk-V Mars CM variants Date: Sun, 31 Aug 2025 15:59:26 -0700 Message-ID: <20250831225959.531393-2-e@freeshell.de> X-Mailer: git-send-email 2.50.0 In-Reply-To: <20250831225959.531393-1-e@freeshell.de> References: <20250831225959.531393-1-e@freeshell.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a common board dtsi for use by Milk-V Mars CM and Milk-V Mars CM Lite. Signed-off-by: E Shattow --- .../dts/starfive/jh7110-milkv-marscm.dtsi | 159 ++++++++++++++++++ 1 file changed, 159 insertions(+) create mode 100644 arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi b/arch/r= iscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi new file mode 100644 index 000000000000..25b70af564ee --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi @@ -0,0 +1,159 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2025 E Shattow + */ + +/dts-v1/; +#include +#include "jh7110-common.dtsi" + +/ { + aliases { + i2c1 =3D &i2c1; + i2c3 =3D &i2c3; + i2c4 =3D &i2c4; + serial3 =3D &uart3; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + reset-gpios =3D <&sysgpio 33 GPIO_ACTIVE_LOW>; + }; +}; + +&gmac0 { + assigned-clocks =3D <&aoncrg JH7110_AONCLK_GMAC0_TX>; + assigned-clock-parents =3D <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>; + starfive,tx-use-rgmii-clk; + status =3D "okay"; +}; + +&i2c0 { + status =3D "okay"; +}; + +&i2c2 { + status =3D "disabled"; +}; + +&i2c6 { + status =3D "disabled"; +}; + +&mmc1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + + mmc-pwrseq =3D <&sdio_pwrseq>; + non-removable; + status =3D "okay"; + + ap6256: wifi@1 { + compatible =3D "brcm,bcm43456-fmac", "brcm,bcm4329-fmac"; + reg =3D <1>; + interrupt-parent =3D <&sysgpio>; + interrupts =3D <34 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "host-wake"; + pinctrl-0 =3D <&wifi_host_wake_irq>; + pinctrl-names =3D "default"; + }; +}; + +&pcie0 { + status =3D "okay"; +}; + +&phy0 { + rx-internal-delay-ps =3D <1500>; + tx-internal-delay-ps =3D <1500>; + motorcomm,rx-clk-drv-microamp =3D <3970>; + motorcomm,rx-data-drv-microamp =3D <2910>; + motorcomm,tx-clk-10-inverted; + motorcomm,tx-clk-100-inverted; + motorcomm,tx-clk-1000-inverted; + motorcomm,tx-clk-adj-enabled; +}; + +&pwm { + status =3D "okay"; +}; + +&spi0 { + status =3D "okay"; +}; + +&sysgpio { + uart1_pins: uart1-0 { + tx-pins { + pinmux =3D ; + bias-disable; + drive-strength =3D <12>; + input-disable; + input-schmitt-disable; + }; + + rx-pins { + pinmux =3D ; + bias-pull-up; + input-enable; + input-schmitt-enable; + }; + + cts-pins { + pinmux =3D ; + bias-disable; + input-enable; + input-schmitt-enable; + }; + + rts-pins { + pinmux =3D ; + bias-disable; + input-disable; + input-schmitt-disable; + }; + }; + + usb0_pins: usb0-0 { + vbus-pins { + pinmux =3D ; + bias-disable; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; + }; + + wifi_host_wake_irq: wifi-host-wake-irq-0 { + wake-pins { + pinmux =3D ; + input-enable; + }; + }; +}; + +&uart1 { + uart-has-rtscts; + pinctrl-0 =3D <&uart1_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&usb0 { + dr_mode =3D "host"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb0_pins>; + status =3D "okay"; +}; --=20 2.50.0