From nobody Fri Oct 3 13:23:48 2025 Received: from mail.mainlining.org (mail.mainlining.org [5.75.144.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4983C13774D; Sat, 30 Aug 2025 21:15:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.75.144.95 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756588546; cv=none; b=fwAQHP9TDSC8n3G8CqqE4ZJrodfKAaZzIBvPGrtumEgekQwfhkiCtBMD1scG0TdlNbIIDIgmXAdf/31WN2Bd2DF/E8L0Kp1T2o+KwO+YjHz0b38fU09+vcR61gGVz19MhXnIoR8hd9iI6feDhSVxOlsOIBXFaFD2dBwmD+BpKXQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756588546; c=relaxed/simple; bh=6npll6b5ANIK0VzuUhhll83oXULGuK5I1TVnZPyAHqY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Xs2r9Oe6Xx3I872NzbXCBcRwfMbOC22cOEcwWCcupM3/XGaUHturJaD/l46CYWf3Bj+QZPp3XQmzn8HwcCmcUSO+laOf6CguhsbWztVGZik3hLdyt2qQ0R8gzd9q4ynprG1IqfXyqklTWnuaDtw9yEMUKxEyBmETw3BSL2Hl4is= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mainlining.org; spf=pass smtp.mailfrom=mainlining.org; dkim=pass (2048-bit key) header.d=mainlining.org header.i=@mainlining.org header.b=rB3rEI3X; dkim=permerror (0-bit key) header.d=mainlining.org header.i=@mainlining.org header.b=yWOPAH4l; arc=none smtp.client-ip=5.75.144.95 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mainlining.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mainlining.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mainlining.org header.i=@mainlining.org header.b="rB3rEI3X"; dkim=permerror (0-bit key) header.d=mainlining.org header.i=@mainlining.org header.b="yWOPAH4l" DKIM-Signature: v=1; a=rsa-sha256; s=202507r; d=mainlining.org; c=relaxed/relaxed; h=To:Message-Id:Subject:Date:From; t=1756588402; bh=MG0nTYr/FlHFSs06D08REUE lNCVAQMbcS562HKcVoPI=; b=rB3rEI3XuDI9BjHop5mmCFu94qFmzg7BUdRA1Sq07vBu4OUAEp vvlPeKy43KABSqod5Qx+ey54fbzoDKGVg8zJ3NxwB8Ci86dEczZ721zWGEyQa8HKcyaUuQwjSde Wzcz9Qlx6VUm4MjtXVekNJ6exjZjhGLk/gE1AK5DcuK0Uv1Bo7FEtH0Vf9AxHXdO8B0axGDxw5+ 9o/u86oTVQxlx/6LCHXi8nHI5/O53gtjlULblLDln9VXFdy3ELCglhFq6sS9S2TVvbeewVI5zrH IgYf0syVisvq2yloGO97ftEiRGpaDV65i0KjEGdGEGjIr4CFEb6QXINB1KyVyZmdv2Q==; DKIM-Signature: v=1; a=ed25519-sha256; s=202507e; d=mainlining.org; c=relaxed/relaxed; h=To:Message-Id:Subject:Date:From; t=1756588402; bh=MG0nTYr/FlHFSs06D08REUE lNCVAQMbcS562HKcVoPI=; b=yWOPAH4lX2Dex0FjzW/pYQ1IGcD0uVgl5HwYiCAkMs4F8ijY+O dx1NwI3beAn3Svqlkoqf0QBQ20u6G4Ky/2Cg==; From: =?utf-8?q?Barnab=C3=A1s_Cz=C3=A9m=C3=A1n?= Date: Sat, 30 Aug 2025 23:13:19 +0200 Subject: [PATCH 1/3] arm64: dts: qcom: msm8953: fix SPI clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250830-msm8953-spi-fix-v1-1-89950eaf10fe@mainlining.org> References: <20250830-msm8953-spi-fix-v1-0-89950eaf10fe@mainlining.org> In-Reply-To: <20250830-msm8953-spi-fix-v1-0-89950eaf10fe@mainlining.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Gianluca Boiano Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Barnab=C3=A1s_Cz=C3=A9m=C3=A1n?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1756588401; l=1726; i=barnabas.czeman@mainlining.org; s=20240730; h=from:subject:message-id; bh=6npll6b5ANIK0VzuUhhll83oXULGuK5I1TVnZPyAHqY=; b=xYWATD9i3dL6pwhTP5w97ZYewAha360HyLH52Lv7ArZQwZJdAyHgDW3VQYNHLmCr/w1wxVPgL RL1ZqtjvGgvB1KEwuyKDYxnHmbf7PI55yKEbe7TvR3eHQ2xV6LQgtLz X-Developer-Key: i=barnabas.czeman@mainlining.org; a=ed25519; pk=TWUSIGgwW/Sn4xnX25nw+lszj1AT/A3bzkahn7EhOFc= Fix SPI clocks, accidentally I2C clocks was assigned for SPI interfaces. Fixes: be69109e93c78 ("arm64: dts: qcom: msm8953: add SPI interfaces") Signed-off-by: Barnab=C3=A1s Cz=C3=A9m=C3=A1n --- arch/arm64/boot/dts/qcom/msm8953.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qc= om/msm8953.dtsi index c5205d09c442e45e4a0cc3e6d8ff7d9d7bda0034..14dd17278ae0850df1dafad19a5= 69ffc5afb174b 100644 --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -1660,7 +1660,7 @@ spi_3: spi@78b7000 { reg =3D <0x078b7000 0x600>; interrupts =3D ; clock-names =3D "core", "iface"; - clocks =3D <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>, + clocks =3D <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; dmas =3D <&blsp1_dma 8>, <&blsp1_dma 9>; dma-names =3D "tx", "rx"; @@ -1751,7 +1751,7 @@ spi_5: spi@7af5000 { reg =3D <0x07af5000 0x600>; interrupts =3D ; clock-names =3D "core", "iface"; - clocks =3D <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>, + clocks =3D <&gcc GCC_BLSP2_QUP1_SPI_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; dmas =3D <&blsp2_dma 4>, <&blsp2_dma 5>; dma-names =3D "tx", "rx"; @@ -1791,7 +1791,7 @@ spi_6: spi@7af6000 { reg =3D <0x07af6000 0x600>; interrupts =3D ; clock-names =3D "core", "iface"; - clocks =3D <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>, + clocks =3D <&gcc GCC_BLSP2_QUP2_SPI_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; dmas =3D <&blsp2_dma 6>, <&blsp2_dma 7>; dma-names =3D "tx", "rx"; --=20 2.51.0 From nobody Fri Oct 3 13:23:48 2025 Received: from mail.mainlining.org (mail.mainlining.org [5.75.144.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 23FE1218ADD; Sat, 30 Aug 2025 21:18:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.75.144.95 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756588719; cv=none; b=Ifr8JVqDU8/8JBe9+5TMVgSyR4RykbgySg7PuF+W/7nAHSQUeyVztOQfpekIyB1LUzzTjLmQMS+vX3zdUv2pkHlapigBZRLz6LQWBZ6oAO03m91XMcm/jLjpWeLYc15jZiyQPfF7uUSO2VEzYJ4DCkJNsE2+uVN+5uf7eXE8h+U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756588719; c=relaxed/simple; bh=CBLy8/WYPaCr1SzkbgPD1dFINhkAMk8tA0yM0q/hdOU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kdsiYUw4BiWDbbFDGbYGhLK7R04QfLtHnzdZNGr0E5bsV18jam0OD+yWfW/kOZmXqbRj3cDO9JdoBd5L5mluVnofzHfYAgHrbVSnrRoAcsYkoP/T2fS/ueNtYEZ0sg11dmixoOFmDidWjxGy3VJfK0tk+qkVUIkzljPCzunf5vQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mainlining.org; spf=pass smtp.mailfrom=mainlining.org; dkim=pass (2048-bit key) header.d=mainlining.org header.i=@mainlining.org header.b=o7W+15EU; dkim=permerror (0-bit key) header.d=mainlining.org header.i=@mainlining.org header.b=hANspEkQ; arc=none smtp.client-ip=5.75.144.95 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mainlining.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mainlining.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mainlining.org header.i=@mainlining.org header.b="o7W+15EU"; dkim=permerror (0-bit key) header.d=mainlining.org header.i=@mainlining.org header.b="hANspEkQ" DKIM-Signature: v=1; a=rsa-sha256; s=202507r; d=mainlining.org; c=relaxed/relaxed; h=To:Message-Id:Subject:Date:From; t=1756588402; bh=vp9BFqVCsrqy1VHNRz6BRNP RHNjMy4Nb9AHUlnIB13c=; b=o7W+15EU+XH1qJUE+6ek49u3494KU9MloIINDjEwejASdPGFVr 7QQbTBtEhsDlUWO6cHAYtx+Qt7bkiIeTAmJztq37P31f/QNQwwmmf9J5KG0gM0RtIsV39y138ij g4p0xa9ATzalURP+VZnw8s2oRO5TBziqpdgNOMcBsD+Mfdge0xXffa5ENJ+gXwU/qSg72kD/vGe uHzr8WSiW0rKNJsbloxcT0AaFZBAxHDozS8vMMucgdR9wsZ92Kg17BWLNLE5krvkiID05GnJwWS BWVYnywYVUVhf0kqVpNOstBg3/hqzFi5HICkOfh7WXz2GMQNMdWtHbFhOTOo3ED7+CQ==; DKIM-Signature: v=1; a=ed25519-sha256; s=202507e; d=mainlining.org; c=relaxed/relaxed; h=To:Message-Id:Subject:Date:From; t=1756588402; bh=vp9BFqVCsrqy1VHNRz6BRNP RHNjMy4Nb9AHUlnIB13c=; b=hANspEkQpLBmx+Qo0aihkxM759im+SMg1BaMFlwYMlalnPM9p7 Hf2CMs3/zMTo04sgYDT62Vj11P8SS6sGW/CA==; From: =?utf-8?q?Barnab=C3=A1s_Cz=C3=A9m=C3=A1n?= Date: Sat, 30 Aug 2025 23:13:20 +0200 Subject: [PATCH 2/3] arm64: dts: qcom: msm8953: correct SPI pinctrls Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250830-msm8953-spi-fix-v1-2-89950eaf10fe@mainlining.org> References: <20250830-msm8953-spi-fix-v1-0-89950eaf10fe@mainlining.org> In-Reply-To: <20250830-msm8953-spi-fix-v1-0-89950eaf10fe@mainlining.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Gianluca Boiano Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Barnab=C3=A1s_Cz=C3=A9m=C3=A1n?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1756588401; l=3489; i=barnabas.czeman@mainlining.org; s=20240730; h=from:subject:message-id; bh=CBLy8/WYPaCr1SzkbgPD1dFINhkAMk8tA0yM0q/hdOU=; b=5lnR9XHUIvmTuSrO8zDAx76BQoW3NmGbdKdCmIGfMWsKPokFDukb2a6usYc/ha5zshdGhHITC SltZ2LwJYPmBuIhejD8i0u61fQ8A2NjPR5oZul0pbLgXMVw1VwWZfrQ X-Developer-Key: i=barnabas.czeman@mainlining.org; a=ed25519; pk=TWUSIGgwW/Sn4xnX25nw+lszj1AT/A3bzkahn7EhOFc= SPI pinctrls should handle 4 pins MOSI, MISO, CLK and CS. This change adding the missing pins for pinctrls and correcting CS pins according to downstream sources. Fixes: be69109e93c78 ("arm64: dts: qcom: msm8953: add SPI interfaces") Signed-off-by: Barnab=C3=A1s Cz=C3=A9m=C3=A1n --- arch/arm64/boot/dts/qcom/msm8953.dtsi | 102 ++++++++++++++++++++++++++----= ---- 1 file changed, 78 insertions(+), 24 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qc= om/msm8953.dtsi index 14dd17278ae0850df1dafad19a569ffc5afb174b..1b3e68aed9450f61d14fe6c16a4= dd513c815c6da 100644 --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -775,45 +775,99 @@ i2c_8_sleep: i2c-8-sleep-state { }; =20 spi_3_default: spi-3-default-state { - pins =3D "gpio10", "gpio11"; - function =3D "blsp_spi3"; - drive-strength =3D <2>; - bias-disable; + cs-pins { + pins =3D "gpio10"; + function =3D "blsp_spi3"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio8", "gpio9", "gpio11"; + function =3D "blsp_spi3"; + drive-strength =3D <12>; + bias-disable; + }; }; =20 spi_3_sleep: spi-3-sleep-state { - pins =3D "gpio10", "gpio11"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; + cs-pins { + pins =3D "gpio10"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio8", "gpio9", "gpio11"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; }; =20 spi_5_default: spi-5-default-state { - pins =3D "gpio18", "gpio19"; - function =3D "blsp_spi5"; - drive-strength =3D <2>; - bias-disable; + cs-pins { + pins =3D "gpio18"; + function =3D "blsp_spi5"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio16", "gpio17", "gpio19"; + function =3D "blsp_spi5"; + drive-strength =3D <12>; + bias-disable; + }; }; =20 spi_5_sleep: spi-5-sleep-state { - pins =3D "gpio18", "gpio19"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; + cs-pins { + pins =3D "gpio18"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio16", "gpio17", "gpio19"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; }; =20 spi_6_default: spi-6-default-state { - pins =3D "gpio22", "gpio23"; - function =3D "blsp_spi6"; - drive-strength =3D <2>; - bias-disable; + cs-pins { + pins =3D "gpio22"; + function =3D "blsp_spi6"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio20", "gpio21", "gpio23"; + function =3D "blsp_spi6"; + drive-strength =3D <12>; + bias-disable; + }; }; =20 spi_6_sleep: spi-6-sleep-state { - pins =3D "gpio22", "gpio23"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; + cs-pins { + pins =3D "gpio22"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio20", "gpio21", "gpio23"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; }; =20 uart_5_default: uart-5-default-state { --=20 2.51.0 From nobody Fri Oct 3 13:23:48 2025 Received: from mail.mainlining.org (mail.mainlining.org [5.75.144.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F29C213C3F6; Sat, 30 Aug 2025 21:15:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.75.144.95 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756588547; cv=none; b=ap+ukb9cOj2oKmWQmgoWycgFLiXMGsTEOrUt/hy1ZXc6LdeGYn2gHMBvqu+63V6ZX3qbuOHZL3Uc/NYbDnJgQVYwoyXhUnUnv3l26JJj0O+Izy2e3pULQF3OOr/H1M+YgBQNPhOYInG2sit7LdjES5xSLnVObBuh0OnI0BOy57A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756588547; c=relaxed/simple; bh=g6eA9zW07eEDawCbAbLUTxP89TMFmmXjHUmQQnyxs1M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rXqUyRKR87A7P3zaMZSpe7qP7wBTnkjtl2xhL2YzHTedIQrEDIzE22XT4xIQVWbznV4KjNGU5MgS4vckgSnF6rzFDUjHRqEPON+ywfOFuaIFGIw0EVssMFo4Xi0JT7rvH7LYvcqKLhhKxXbF2UDFu8BbRfNqS6+V6zEhl+rFbLw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mainlining.org; spf=pass smtp.mailfrom=mainlining.org; dkim=pass (2048-bit key) header.d=mainlining.org header.i=@mainlining.org header.b=BUWTch62; dkim=permerror (0-bit key) header.d=mainlining.org header.i=@mainlining.org header.b=hsWzPOXj; arc=none smtp.client-ip=5.75.144.95 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mainlining.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mainlining.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mainlining.org header.i=@mainlining.org header.b="BUWTch62"; dkim=permerror (0-bit key) header.d=mainlining.org header.i=@mainlining.org header.b="hsWzPOXj" DKIM-Signature: v=1; a=rsa-sha256; s=202507r; d=mainlining.org; c=relaxed/relaxed; h=To:Message-Id:Subject:Date:From; t=1756588403; bh=wPempubpHHvrR9g5D8PVkJk FN5fonYSZwrd4p7zMV0I=; b=BUWTch62Xlh9+i0kizw0nMI3Zvl0wK2iXQzkGh6pOcScOyXRHN Gk/FW+7/ptQifNmYNcOknrl0PAlAv19qoFcCMcTONdxrofQJu581yhtBLdQo74VXi768ZzIK4zk CWvwn1fQhDcYZFaEy+9v9tmFIhMBgwGix19x0t+xWJLrzWL+2mv3g8IZUqyfk5qriSwCgsEc457 TZ2wJtgYT2o7gO6UZNUVLLO/Y03svRSFfSD+wXTDdDQPzjouPMapIwWo9deY18PN+GglUIKOi+d EbpY7M4PqibpcTCF4D6XSfVdSsADhonuq+uPUZ78aDOjBjFBTDKkaQAltu0CVUVwweg==; DKIM-Signature: v=1; a=ed25519-sha256; s=202507e; d=mainlining.org; c=relaxed/relaxed; h=To:Message-Id:Subject:Date:From; t=1756588403; bh=wPempubpHHvrR9g5D8PVkJk FN5fonYSZwrd4p7zMV0I=; b=hsWzPOXjwnJQtRY5Dm8Q3ABw7+xlZZ2MIVeuwyQqHqOPOnLkyY uWkGdFcEqIaksUoDWON4XgBVKXHLa1a+jjAA==; From: =?utf-8?q?Barnab=C3=A1s_Cz=C3=A9m=C3=A1n?= Date: Sat, 30 Aug 2025 23:13:21 +0200 Subject: [PATCH 3/3] arm64: dts: qcom: msm8953: add spi_7 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250830-msm8953-spi-fix-v1-3-89950eaf10fe@mainlining.org> References: <20250830-msm8953-spi-fix-v1-0-89950eaf10fe@mainlining.org> In-Reply-To: <20250830-msm8953-spi-fix-v1-0-89950eaf10fe@mainlining.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Gianluca Boiano Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Barnab=C3=A1s_Cz=C3=A9m=C3=A1n?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1756588401; l=2108; i=barnabas.czeman@mainlining.org; s=20240730; h=from:subject:message-id; bh=g6eA9zW07eEDawCbAbLUTxP89TMFmmXjHUmQQnyxs1M=; b=UvjD1KQGsFARptLxJsznEa9xK1VWIRXyhUuzGHMw4Yy0cYbMIE4weYjxH+9P2neNrx9wZckL4 Otpke86jG63DKAyTiM96jAlEV4oudfQfgrzmCcrDqgpIVHFf5fEzVTY X-Developer-Key: i=barnabas.czeman@mainlining.org; a=ed25519; pk=TWUSIGgwW/Sn4xnX25nw+lszj1AT/A3bzkahn7EhOFc= Add spi_7 can be found in MSM8953 devices. Signed-off-by: Barnab=C3=A1s Cz=C3=A9m=C3=A1n --- arch/arm64/boot/dts/qcom/msm8953.dtsi | 52 +++++++++++++++++++++++++++++++= ++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qc= om/msm8953.dtsi index 1b3e68aed9450f61d14fe6c16a4dd513c815c6da..76317c5783496675a549815bbed= 71fd214590dd1 100644 --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -870,6 +870,38 @@ spi-pins { }; }; =20 + spi_7_default: spi-7-default-state { + cs-pins { + pins =3D "gpio136"; + function =3D "blsp_spi7"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio135", "gpio137", "gpio138"; + function =3D "blsp_spi7"; + drive-strength =3D <12>; + bias-disable; + }; + }; + + spi_7_sleep: spi-7-sleep-state { + cs-pins { + pins =3D "gpio136"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio135", "gpio137", "gpio138"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + }; + uart_5_default: uart-5-default-state { pins =3D "gpio16", "gpio17", "gpio18", "gpio19"; function =3D "blsp_uart5"; @@ -1880,6 +1912,26 @@ i2c_7: i2c@7af7000 { status =3D "disabled"; }; =20 + spi_7: spi@7af7000 { + compatible =3D "qcom,spi-qup-v2.2.1"; + reg =3D <0x07af7000 0x600>; + interrupts =3D ; + clock-names =3D "core", "iface"; + clocks =3D <&gcc GCC_BLSP2_QUP3_SPI_APPS_CLK>, + <&gcc GCC_BLSP2_AHB_CLK>; + dmas =3D <&blsp2_dma 8>, <&blsp2_dma 9>; + dma-names =3D "tx", "rx"; + + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&spi_7_default>; + pinctrl-1 =3D <&spi_7_sleep>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + status =3D "disabled"; + }; + i2c_8: i2c@7af8000 { compatible =3D "qcom,i2c-qup-v2.2.1"; reg =3D <0x07af8000 0x600>; --=20 2.51.0