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charset="utf-8" These opcodes are used for regiter write, modify, poll and store (save). Signed-off-by: Joel Fernandes --- drivers/gpu/nova-core/gsp/sequencer.rs | 127 ++++++++++++++++++++++++- 1 file changed, 123 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/nova-core/gsp/sequencer.rs b/drivers/gpu/nova-core= /gsp/sequencer.rs index 918c3405b33c..75672ae0a687 100644 --- a/drivers/gpu/nova-core/gsp/sequencer.rs +++ b/drivers/gpu/nova-core/gsp/sequencer.rs @@ -13,6 +13,7 @@ use crate::firmware::Firmware; use crate::gsp::cmdq::{GspCmdq, GspMessageFromGsp}; use crate::nvfw as fw; +use crate::util::wait_on; =20 use kernel::transmute::FromBytes; use kernel::{dev_dbg, dev_err}; @@ -32,7 +33,6 @@ pub(crate) struct GspSequencerInfo<'a> { =20 /// GSP Sequencer Command types with payload data /// Commands have an opcode and a opcode-dependent struct. -#[expect(dead_code)] pub(crate) enum GspSeqCmd { RegWrite(fw::GSP_SEQ_BUF_PAYLOAD_REG_WRITE), RegModify(fw::GSP_SEQ_BUF_PAYLOAD_REG_MODIFY), @@ -44,6 +44,20 @@ impl GspSeqCmd { /// Creates a new GspSeqCmd from a firmware GSP_SEQUENCER_BUFFER_CMD pub(crate) fn from_fw_cmd(cmd: &fw::GSP_SEQUENCER_BUFFER_CMD) -> Resul= t { match cmd.opCode { + // SAFETY: In the below unsafe accesses, we're using the union= field + // that corresponds to the opCode + fw::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_WRITE =3D> { + Ok(GspSeqCmd::RegWrite(unsafe { cmd.payload.regWrite })) + } + fw::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_MODIFY =3D> { + Ok(GspSeqCmd::RegModify(unsafe { cmd.payload.regModify })) + } + fw::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_POLL =3D> { + Ok(GspSeqCmd::RegPoll(unsafe { cmd.payload.regPoll })) + } + fw::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_STORE =3D> { + Ok(GspSeqCmd::RegStore(unsafe { cmd.payload.regStore })) + } _ =3D> Err(EINVAL), } } @@ -63,7 +77,16 @@ pub(crate) fn new(data: &[u8], dev: &device::Device) -> Result usize { - 0 + let opcode_size =3D size_of::(); + match self { + // For commands with payloads, add the payload size in bytes + GspSeqCmd::RegWrite(_) =3D> opcode_size + size_of::(), + GspSeqCmd::RegModify(_) =3D> { + opcode_size + size_of::() + } + GspSeqCmd::RegPoll(_) =3D> opcode_size + size_of::(), + GspSeqCmd::RegStore(_) =3D> opcode_size + size_of::(), + } } } =20 @@ -82,12 +105,108 @@ pub(crate) trait GspSeqCmdRunner { fn run(&self, sequencer: &GspSequencer<'_>) -> Result; } =20 -impl GspSeqCmdRunner for GspSeqCmd { - fn run(&self, _seq: &GspSequencer<'_>) -> Result { +impl GspSeqCmdRunner for fw::GSP_SEQ_BUF_PAYLOAD_REG_WRITE { + fn run(&self, sequencer: &GspSequencer<'_>) -> Result { + dev_dbg!( + sequencer.dev, + "RegWrite: addr=3D0x{:x}, val=3D0x{:x}\n", + self.addr, + self.val + ); + let addr =3D self.addr as usize; + let val =3D self.val; + let _ =3D sequencer.bar.try_write32(val, addr); + Ok(()) + } +} + +impl GspSeqCmdRunner for fw::GSP_SEQ_BUF_PAYLOAD_REG_MODIFY { + fn run(&self, sequencer: &GspSequencer<'_>) -> Result { + dev_dbg!( + sequencer.dev, + "RegModify: addr=3D0x{:x}, mask=3D0x{:x}, val=3D0x{:x}\n", + self.addr, + self.mask, + self.val + ); + + let addr =3D self.addr as usize; + if let Ok(temp) =3D sequencer.bar.try_read32(addr) { + let _ =3D sequencer + .bar + .try_write32((temp & !self.mask) | self.val, addr); + } Ok(()) } } =20 +impl GspSeqCmdRunner for fw::GSP_SEQ_BUF_PAYLOAD_REG_POLL { + fn run(&self, sequencer: &GspSequencer<'_>) -> Result { + dev_dbg!( + sequencer.dev, + "RegPoll: addr=3D0x{:x}, mask=3D0x{:x}, val=3D0x{:x}, timeout= =3D0x{:x}, error=3D0x{:x}\n", + self.addr, + self.mask, + self.val, + self.timeout, + self.error + ); + + let addr =3D self.addr as usize; + let mut timeout_us =3D self.timeout as i64; + + // Default timeout to 4 seconds + timeout_us =3D if timeout_us =3D=3D 0 { 4000000 } else { timeout_u= s }; + + // First read + sequencer.bar.try_read32(addr)?; + + // Poll the requested register with requested timeout. + // wait_on() unwraps the closure's Option return value + // and returns a Result. + wait_on(Delta::from_micros(timeout_us), || { + sequencer.bar.try_read32(addr).ok().and_then(|current| { + if (current & self.mask) =3D=3D self.val { + Some(()) + } else { + None + } + }) + })?; + Ok(()) + } +} + +impl GspSeqCmdRunner for fw::GSP_SEQ_BUF_PAYLOAD_REG_STORE { + fn run(&self, sequencer: &GspSequencer<'_>) -> Result { + let addr =3D self.addr as usize; + let _index =3D self.index; + + let val =3D sequencer.bar.try_read32(addr)?; + + dev_dbg!( + sequencer.dev, + "RegStore: addr=3D0x{:x}, index=3D0x{:x}, value=3D{:?}\n", + self.addr, + self.index, + val + ); + + Ok(()) + } +} + +impl GspSeqCmdRunner for GspSeqCmd { + fn run(&self, seq: &GspSequencer<'_>) -> Result { + match self { + GspSeqCmd::RegWrite(cmd) =3D> cmd.run(seq), + GspSeqCmd::RegModify(cmd) =3D> cmd.run(seq), + GspSeqCmd::RegPoll(cmd) =3D> cmd.run(seq), + GspSeqCmd::RegStore(cmd) =3D> cmd.run(seq), + } + } +} + pub(crate) struct GspSeqIter<'a> { cmd_data: &'a [u8], current_offset: usize, // Tracking the current position --=20 2.34.1