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Signed-off-by: Antoniu Miclaus Reviewed-by: Conor Dooley --- changes in v6: - fix title: remove "driver" from "High Performance, Polyphase Energy Mete= ring driver" - improve interrupt-names property: change from free-form description to p= roper enum schema with items/enum structure and minItems constraint .../bindings/iio/adc/adi,ade9000.yaml | 99 +++++++++++++++++++ 1 file changed, 99 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ade9000.y= aml diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ade9000.yaml b/D= ocumentation/devicetree/bindings/iio/adc/adi,ade9000.yaml new file mode 100644 index 000000000000..6b6b9d7159db --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/adi,ade9000.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2025 Analog Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ade9000.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADE9000 High Performance, Polyphase Energy Metering + +maintainers: + - Antoniu Miclaus + +description: | + The ADE9000 is a highly accurate, fully integrated, multiphase energy an= d power + quality monitoring device. Superior analog performance and a digital sig= nal + processing (DSP) core enable accurate energy monitoring over a wide dyna= mic + range. An integrated high end reference ensures low drift over temperatu= re + with a combined drift of less than =C2=B125 ppm/=C2=B0C maximum for the = entire channel + including a programmable gain amplifier (PGA) and an analog-to-digital + converter (ADC). + + https://www.analog.com/media/en/technical-documentation/data-sheets/ADE9= 000.pdf + +$ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + enum: + - adi,ade9000 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 20000000 + + interrupts: + maxItems: 3 + + interrupt-names: + items: + enum: [irq0, irq1, dready] + minItems: 1 + maxItems: 3 + + reset-gpios: + description: + Must be the device tree identifier of the RESET pin. As the line is + active low, it should be marked GPIO_ACTIVE_LOW. + maxItems: 1 + + vdd-supply: true + + vref-supply: true + + clocks: + description: External clock source when not using crystal + maxItems: 1 + + clock-names: + items: + - const: clkin + + "#clock-cells": + description: + ADE9000 can provide clock output via CLKOUT pin with external buffer. + const: 0 + +required: + - compatible + - reg + - vdd-supply + +unevaluatedProperties: false + +examples: + - | + #include + #include + + spi { + #address-cells =3D <1>; + #size-cells =3D <0>; + + adc@0 { + compatible =3D "adi,ade9000"; + reg =3D <0>; + spi-max-frequency =3D <7000000>; + + #clock-cells =3D <0>; + reset-gpios =3D <&gpio 4 GPIO_ACTIVE_LOW>; + interrupts =3D <2 IRQ_TYPE_EDGE_FALLING>, <3 IRQ_TYPE_EDGE_FALLI= NG>, <4 IRQ_TYPE_EDGE_FALLING>; + interrupt-names =3D "irq0", "irq1", "dready"; + interrupt-parent =3D <&gpio>; + clocks =3D <&ext_clock_24576khz>; + clock-names =3D "clkin"; + vdd-supply =3D <&vdd_reg>; + }; + }; --=20 2.43.0