From nobody Fri Oct 3 15:35:51 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6348D29E10B; Fri, 29 Aug 2025 09:20:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756459209; cv=none; b=b6ZpsnuYLKzYoX/7wBM94itlc+IUnwswxKuIHAwWPAf+XrGeYU60qpXJpvJLgBo0PAtKwDkeNhG/BwaR0uOaSA5n0L4FKCB0hsoWKc+g/FJQDU953+Aofa/rGH933rhw0qcew3hUXZF2N5ijJThjyJRBjeOYcL+sXiDQmXY9Qfw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756459209; c=relaxed/simple; bh=50TguRS/Evm2Or/dlQlWRsV6e2qqkAlX4YelhUCK/e8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=N3hqnpuHKWx3J9pI1NTN7qtvI2uPTziZzqaf7/ySmzAcDBDLTILiMVh3ugcP61PFABLzqCWdrdqrWklh9VtOyUsl2MExqNE8oNfATPA9caYBMP1PPrMV4x6UsF4BSEGyFNbyRXALhzmOhz9NefkB4Lp8GkVn0p0zAO+yQYtoRsY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kDFRkjSl; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kDFRkjSl" Received: by smtp.kernel.org (Postfix) with ESMTPS id 0C8FCC4CEF7; Fri, 29 Aug 2025 09:20:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1756459209; bh=50TguRS/Evm2Or/dlQlWRsV6e2qqkAlX4YelhUCK/e8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=kDFRkjSlFhInJWPB8JNZmhVeMSxa3kh7K9Mchd2tbAWySpY/yEeWNBHT1glhHB2Fo mSYFVuFSl/74YcX2sGGu2jI9SIeH5EFueJ1c3uD4GbP2Hnic3KQBWtVZSegrrLG3jd 5o+6t8OhkYwvI143CjF1SI+3zXrgj4NWHp9t9q9a+eNh59WSp7YymRsEpHE5evVfqR SP/RddxNklJXxzZsjiGbesj9A9ZURFo349jcdlx3zqwLlsaTBjkF6Vmbv7wlCHQZrh eZbTcdBwt14gcsfjlKWkDGtYhwjT4Bfff0tyPLCfq1E4D1t4jB4g9AyxJPm7a0xzYK ogx5Cr+g9O1LQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id F16AECA0FFF; Fri, 29 Aug 2025 09:20:08 +0000 (UTC) From: Dimitri Fedrau via B4 Relay Date: Fri, 29 Aug 2025 11:19:59 +0200 Subject: [PATCH v2 2/2] phy: add basic support for NXPs TJA1145 CAN transceiver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250829-tja1145-support-v2-2-60997f328979@liebherr.com> References: <20250829-tja1145-support-v2-0-60997f328979@liebherr.com> In-Reply-To: <20250829-tja1145-support-v2-0-60997f328979@liebherr.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dimitri Fedrau , Dimitri Fedrau , Marc Kleine-Budde , linux-can@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1756459207; l=7265; i=dimitri.fedrau@liebherr.com; s=20241202; h=from:subject:message-id; bh=QbZwerPtcW9uCm9P1dXPNhN6L03SdF6Z/qVX8cgl44k=; b=OPXUrHIg4Ns6KcYoRRUz/2NeKchkc5B40uYMKPr0c22Ke0Q2vS8ioicdasqNQGXOqOCFngvYf S5rdppcnXXWC/lw4/KfQK5UF/BH8wz2m1eJ/msanOG8lyKzBJACKD6M X-Developer-Key: i=dimitri.fedrau@liebherr.com; a=ed25519; pk=rT653x09JSQvotxIqQl4/XiI4AOiBZrdOGvxDUbb5m8= X-Endpoint-Received: by B4 Relay for dimitri.fedrau@liebherr.com/20241202 with auth_id=290 X-Original-From: Dimitri Fedrau Reply-To: dimitri.fedrau@liebherr.com From: Dimitri Fedrau Add basic driver support for NXPs TJA1145 CAN transceiver which brings the PHY up/down by switching to normal/standby mode using SPI commands. Signed-off-by: Dimitri Fedrau --- drivers/phy/Kconfig | 10 +++ drivers/phy/Makefile | 1 + drivers/phy/phy-nxp-tja1145.c | 185 ++++++++++++++++++++++++++++++++++++++= ++++ 3 files changed, 196 insertions(+) diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 58c911e1b2d20a0398f02550e938ce62633230d4..c47e2b62fa6279ee610493b028d= 3c14f6499ca85 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -101,6 +101,16 @@ config PHY_NXP_PTN3222 schemes. It supports all three USB 2.0 data rates: Low Speed, Full Speed and High Speed. =20 +config PHY_NXP_TJA1145 + tristate "NXP TJA1145 CAN transceiver PHY" + select GENERIC_PHY + select REGMAP_SPI + depends on SPI + help + This option enables support for NXPs TJA1145 CAN transceiver as a PHY. + This driver provides function for putting the transceiver in various + functional modes using SPI commands. + source "drivers/phy/allwinner/Kconfig" source "drivers/phy/amlogic/Kconfig" source "drivers/phy/broadcom/Kconfig" diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index c670a8dac46807863c9ef990beb149082238ad16..16da564c74b0f14befb486366dc= d10cd5fc67741 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_PHY_SNPS_EUSB2) +=3D phy-snps-eusb2.o obj-$(CONFIG_USB_LGM_PHY) +=3D phy-lgm-usb.o obj-$(CONFIG_PHY_AIROHA_PCIE) +=3D phy-airoha-pcie.o obj-$(CONFIG_PHY_NXP_PTN3222) +=3D phy-nxp-ptn3222.o +obj-$(CONFIG_PHY_NXP_TJA1145) +=3D phy-nxp-tja1145.o obj-y +=3D allwinner/ \ amlogic/ \ broadcom/ \ diff --git a/drivers/phy/phy-nxp-tja1145.c b/drivers/phy/phy-nxp-tja1145.c new file mode 100644 index 0000000000000000000000000000000000000000..4d3aa5bfcd88d5755fa37e0d42b= fa8293dee2155 --- /dev/null +++ b/drivers/phy/phy-nxp-tja1145.c @@ -0,0 +1,185 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2025 Liebherr-Electronics and Drives GmbH + */ +#include +#include +#include + +#include +#include + +#define TJA1145_MODE_CTRL 0x01 +#define TJA1145_MODE_CTRL_MC GENMASK(2, 0) +#define TJA1145_MODE_CRTL_STBY BIT(2) +#define TJA1145_MODE_CRTL_NORMAL TJA1145_MODE_CTRL_MC + +#define TJA1145_CAN_CTRL 0x20 +#define TJA1145_CAN_CTRL_CMC GENMASK(1, 0) +#define TJA1145_CAN_CTRL_ACTIVE BIT(1) + +#define TJA1145_IDENT 0x7e +#define TJA1145_IDENT_TJA1145T 0x70 + +#define TJA1145_SPI_READ_BIT BIT(0) +#define TJA1145T_MAX_BITRATE 1000000 + +static int tja1145_phy_power_on(struct phy *phy) +{ + struct regmap *map =3D phy_get_drvdata(phy); + int ret; + + /* + * Switch operating mode to normal which is the active operating mode. + * In this mode, the device is fully operational. + */ + ret =3D regmap_update_bits(map, TJA1145_MODE_CTRL, TJA1145_MODE_CTRL_MC, + TJA1145_MODE_CRTL_NORMAL); + if (ret) + return ret; + + /* + * Switch to CAN operating mode active where the PHY can transmit and + * receive data. + */ + return regmap_update_bits(map, TJA1145_CAN_CTRL, TJA1145_CAN_CTRL_CMC, + TJA1145_CAN_CTRL_ACTIVE); +} + +static int tja1145_phy_power_off(struct phy *phy) +{ + struct regmap *map =3D phy_get_drvdata(phy); + + /* + * Switch to operating mode standby, the PHY is unable to transmit or + * receive data in standby mode. + */ + return regmap_update_bits(map, TJA1145_MODE_CTRL, TJA1145_MODE_CTRL_MC, + TJA1145_MODE_CRTL_STBY); +} + +static const struct phy_ops tja1145_phy_ops =3D { + .power_on =3D tja1145_phy_power_on, + .power_off =3D tja1145_phy_power_off, +}; + +static const struct regmap_range tja1145_wr_holes_ranges[] =3D { + regmap_reg_range(0x00, 0x00), + regmap_reg_range(0x02, 0x03), + regmap_reg_range(0x05, 0x05), + regmap_reg_range(0x0b, 0x1f), + regmap_reg_range(0x21, 0x22), + regmap_reg_range(0x24, 0x25), + regmap_reg_range(0x30, 0x4b), + regmap_reg_range(0x4d, 0x60), + regmap_reg_range(0x62, 0x62), + regmap_reg_range(0x65, 0x67), + regmap_reg_range(0x70, 0xff), +}; + +static const struct regmap_access_table tja1145_wr_table =3D { + .no_ranges =3D tja1145_wr_holes_ranges, + .n_no_ranges =3D ARRAY_SIZE(tja1145_wr_holes_ranges), +}; + +static const struct regmap_range tja1145_rd_holes_ranges[] =3D { + regmap_reg_range(0x00, 0x00), + regmap_reg_range(0x02, 0x02), + regmap_reg_range(0x05, 0x05), + regmap_reg_range(0x0b, 0x1f), + regmap_reg_range(0x21, 0x21), + regmap_reg_range(0x24, 0x25), + regmap_reg_range(0x30, 0x4a), + regmap_reg_range(0x4d, 0x5f), + regmap_reg_range(0x62, 0x62), + regmap_reg_range(0x65, 0x67), + regmap_reg_range(0x70, 0x7d), + regmap_reg_range(0x7f, 0xff), +}; + +static const struct regmap_access_table tja1145_rd_table =3D { + .no_ranges =3D tja1145_rd_holes_ranges, + .n_no_ranges =3D ARRAY_SIZE(tja1145_rd_holes_ranges), +}; + + +static const struct regmap_config tja1145_regmap_config =3D { + .reg_bits =3D 8, + .reg_shift =3D -1, + .val_bits =3D 8, + .wr_table =3D &tja1145_wr_table, + .rd_table =3D &tja1145_rd_table, + .read_flag_mask =3D TJA1145_SPI_READ_BIT, + .max_register =3D TJA1145_IDENT, +}; + +static int tja1145_check_ident(struct device *dev, struct regmap *map) +{ + unsigned int val; + int ret; + + ret =3D regmap_read(map, TJA1145_IDENT, &val); + if (ret) + return ret; + + if (val !=3D TJA1145_IDENT_TJA1145T) { + dev_err(dev, "Expected device id: 0x%02x, got: 0x%02x\n", + TJA1145_IDENT_TJA1145T, val); + return -ENODEV; + } + + return 0; +} + +static int tja1145_probe(struct spi_device *spi) +{ + struct phy_provider *phy_provider; + struct device *dev =3D &spi->dev; + struct regmap *map; + struct phy *phy; + int ret; + + map =3D devm_regmap_init_spi(spi, &tja1145_regmap_config); + if (IS_ERR(map)) + return dev_err_probe(dev, PTR_ERR(map), "failed to init regmap\n"); + + ret =3D tja1145_check_ident(dev, map); + if (ret) + return dev_err_probe(dev, ret, "failed to identify device\n"); + + phy =3D devm_phy_create(dev, dev->of_node, &tja1145_phy_ops); + if (IS_ERR(phy)) + return dev_err_probe(dev, PTR_ERR(phy), "failed to create PHY\n"); + + phy->attrs.max_link_rate =3D TJA1145T_MAX_BITRATE; + phy_set_drvdata(phy, map); + phy_provider =3D devm_of_phy_provider_register(dev, of_phy_simple_xlate); + + return PTR_ERR_OR_ZERO(phy_provider); +} + +static const struct spi_device_id tja1145_spi_id[] =3D { + { "tja1145" }, + { } +}; +MODULE_DEVICE_TABLE(spi, tja1145_spi_id); + +static const struct of_device_id tja1145_of_match[] =3D { + { .compatible =3D "nxp,tja1145-can" }, + { } +}; +MODULE_DEVICE_TABLE(of, tja1145_of_match); + +static struct spi_driver tja1145_driver =3D { + .driver =3D { + .name =3D "tja1145", + .of_match_table =3D tja1145_of_match, + }, + .probe =3D tja1145_probe, + .id_table =3D tja1145_spi_id, +}; +module_spi_driver(tja1145_driver); + +MODULE_DESCRIPTION("NXP TJA1145 CAN transceiver PHY driver"); +MODULE_AUTHOR("Dimitri Fedrau "); +MODULE_LICENSE("GPL"); --=20 2.39.5