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This behavior differs from the standard approach memory branch clocks ops where enabling typically sets the bit. Introducing the mem_enable_invert to allow conditional handling of these sequences of the inverted control logic for memory operations required on those memory clock branches. Signed-off-by: Taniya Das --- drivers/clk/qcom/clk-branch.c | 14 +++++++++++--- drivers/clk/qcom/clk-branch.h | 4 ++++ 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c index 0f10090d4ae681babbdbbb1b6c68ffe77af7a784..90da1c94b4736f65c87aec92303= d511c4aa9a173 100644 --- a/drivers/clk/qcom/clk-branch.c +++ b/drivers/clk/qcom/clk-branch.c @@ -142,8 +142,12 @@ static int clk_branch2_mem_enable(struct clk_hw *hw) u32 val; int ret; =20 - regmap_update_bits(branch.clkr.regmap, mem_br->mem_enable_reg, - mem_br->mem_enable_ack_mask, mem_br->mem_enable_ack_mask); + if (mem_br->mem_enable_invert) + regmap_update_bits(branch.clkr.regmap, mem_br->mem_enable_reg, + mem_br->mem_enable_mask, 0); + else + regmap_update_bits(branch.clkr.regmap, mem_br->mem_enable_reg, + mem_br->mem_enable_ack_mask, mem_br->mem_enable_ack_mask); =20 ret =3D regmap_read_poll_timeout(branch.clkr.regmap, mem_br->mem_ack_reg, val, val & mem_br->mem_enable_ack_mask, 0, 200); @@ -159,7 +163,11 @@ static void clk_branch2_mem_disable(struct clk_hw *hw) { struct clk_mem_branch *mem_br =3D to_clk_mem_branch(hw); =20 - regmap_update_bits(mem_br->branch.clkr.regmap, mem_br->mem_enable_reg, + if (mem_br->mem_enable_invert) + regmap_update_bits(mem_br->branch.clkr.regmap, mem_br->mem_enable_reg, + mem_br->mem_enable_mask, mem_br->mem_enable_mask); + else + regmap_update_bits(mem_br->branch.clkr.regmap, mem_br->mem_enable_reg, mem_br->mem_enable_ack_mask, 0); =20 return clk_branch2_disable(hw); diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h index 292756435f53648640717734af198442a315272e..6bc2ba2b5350554005b7f0c84f9= 33580b7582fc7 100644 --- a/drivers/clk/qcom/clk-branch.h +++ b/drivers/clk/qcom/clk-branch.h @@ -44,6 +44,8 @@ struct clk_branch { * @mem_enable_reg: branch clock memory gating register * @mem_ack_reg: branch clock memory ack register * @mem_enable_ack_mask: branch clock memory enable and ack field in @mem_= ack_reg + * @mem_enable_mask: branch clock memory enable mask + * @mem_enable_invert: branch clock memory enable and disable has invert l= ogic * @branch: branch clock gating handle * * Clock which can gate its memories. @@ -52,6 +54,8 @@ struct clk_mem_branch { u32 mem_enable_reg; u32 mem_ack_reg; u32 mem_enable_ack_mask; + u32 mem_enable_mask; + bool mem_enable_invert; struct clk_branch branch; }; =20 --=20 2.34.1