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Thu, 28 Aug 2025 03:15:25 -0700 (PDT) From: James Clark Date: Thu, 28 Aug 2025 11:14:40 +0100 Subject: [PATCH v2 1/9] spi: spi-fsl-lpspi: Fix transmissions when using CONT Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250828-james-nxp-lpspi-v2-1-6262b9aa9be4@linaro.org> References: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> In-Reply-To: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> To: Frank Li , Mark Brown , Clark Wang , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Larisa Grigore , Larisa Grigore , Ghennadi Procopciuc , Ciprianmarian Costea , s32@nxp.com Cc: James Clark , linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.14.0 From: Larisa Grigore Commit 6a130448498c ("spi: lpspi: Fix wrong transmission when don't use CONT") breaks transmissions when CONT is used. The TDIE interrupt should not be disabled in all cases. If CONT is used and the TX transfer is not yet completed yet, but the interrupt handler is called because there are characters to be received, TDIE is replaced with FCIE. When the transfer is finally completed, SR_TDF is set but the interrupt handler isn't called again. Fixes: 6a130448498c ("spi: lpspi: Fix wrong transmission when don't use CON= T") Signed-off-by: Larisa Grigore Signed-off-by: James Clark Reviewed-by: Frank Li --- drivers/spi/spi-fsl-lpspi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index 313e444a34f3..eaa6bade61a6 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -3,7 +3,7 @@ // Freescale i.MX7ULP LPSPI driver // // Copyright 2016 Freescale Semiconductor, Inc. -// Copyright 2018 NXP Semiconductors +// Copyright 2018, 2023, 2025 NXP =20 #include #include @@ -785,7 +785,7 @@ static irqreturn_t fsl_lpspi_isr(int irq, void *dev_id) if (temp_SR & SR_MBF || readl(fsl_lpspi->base + IMX7ULP_FSR) & FSR_TXCOUNT) { writel(SR_FCF, fsl_lpspi->base + IMX7ULP_SR); - fsl_lpspi_intctrl(fsl_lpspi, IER_FCIE); + fsl_lpspi_intctrl(fsl_lpspi, IER_FCIE | (temp_IER & IER_TDIE)); return IRQ_HANDLED; } =20 --=20 2.34.1 From nobody Fri Oct 3 15:37:47 2025 Received: from mail-wr1-f49.google.com (mail-wr1-f49.google.com [209.85.221.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 77ACE3090C4 for ; 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Thu, 28 Aug 2025 03:15:26 -0700 (PDT) Received: from ho-tower-lan.lan ([185.48.76.109]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45b66f2041fsm49976305e9.5.2025.08.28.03.15.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Aug 2025 03:15:26 -0700 (PDT) From: James Clark Date: Thu, 28 Aug 2025 11:14:41 +0100 Subject: [PATCH v2 2/9] spi: spi-fsl-lpspi: Set correct chip-select polarity bit Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250828-james-nxp-lpspi-v2-2-6262b9aa9be4@linaro.org> References: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> In-Reply-To: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> To: Frank Li , Mark Brown , Clark Wang , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Larisa Grigore , Larisa Grigore , Ghennadi Procopciuc , Ciprianmarian Costea , s32@nxp.com Cc: James Clark , linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.14.0 From: Larisa Grigore The driver currently supports multiple chip-selects, but only sets the polarity for the first one (CS 0). Fix it by setting the PCSPOL bit for the desired chip-select. Fixes: 5314987de5e5 ("spi: imx: add lpspi bus driver") Signed-off-by: Larisa Grigore Signed-off-by: James Clark Reviewed-by: Frank Li --- drivers/spi/spi-fsl-lpspi.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index eaa6bade61a6..5ea4a306ffa6 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -5,6 +5,7 @@ // Copyright 2016 Freescale Semiconductor, Inc. // Copyright 2018, 2023, 2025 NXP =20 +#include #include #include #include @@ -70,7 +71,7 @@ #define DER_TDDE BIT(0) #define CFGR1_PCSCFG BIT(27) #define CFGR1_PINCFG (BIT(24)|BIT(25)) -#define CFGR1_PCSPOL BIT(8) +#define CFGR1_PCSPOL_MASK GENMASK(11, 8) #define CFGR1_NOSTALL BIT(3) #define CFGR1_HOST BIT(0) #define FSR_TXCOUNT (0xFF) @@ -423,7 +424,9 @@ static int fsl_lpspi_config(struct fsl_lpspi_data *fsl_= lpspi) else temp =3D CFGR1_PINCFG; if (fsl_lpspi->config.mode & SPI_CS_HIGH) - temp |=3D CFGR1_PCSPOL; + temp |=3D FIELD_PREP(CFGR1_PCSPOL_MASK, + BIT(fsl_lpspi->config.chip_select)); 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Thu, 28 Aug 2025 03:15:28 -0700 (PDT) From: James Clark Date: Thu, 28 Aug 2025 11:14:42 +0100 Subject: [PATCH v2 3/9] spi: spi-fsl-lpspi: Reset FIFO and disable module on transfer abort Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250828-james-nxp-lpspi-v2-3-6262b9aa9be4@linaro.org> References: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> In-Reply-To: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> To: Frank Li , Mark Brown , Clark Wang , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Larisa Grigore , Larisa Grigore , Ghennadi Procopciuc , Ciprianmarian Costea , s32@nxp.com Cc: James Clark , linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.14.0 From: Larisa Grigore In DMA mode fsl_lpspi_reset() is always called at the end, even when the transfer is aborted. In PIO mode aborts skip the reset leaving the FIFO filled and the module enabled. Fix it by always calling fsl_lpspi_reset(). Fixes: a15dc3d657fa ("spi: lpspi: Fix CLK pin becomes low before one transf= er") Signed-off-by: Larisa Grigore Reviewed-by: Frank Li Signed-off-by: James Clark --- drivers/spi/spi-fsl-lpspi.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index 5ea4a306ffa6..e50261e9a1fa 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -733,12 +733,10 @@ static int fsl_lpspi_pio_transfer(struct spi_controll= er *controller, fsl_lpspi_write_tx_fifo(fsl_lpspi); =20 ret =3D fsl_lpspi_wait_for_completion(controller); - if (ret) - return ret; =20 fsl_lpspi_reset(fsl_lpspi); =20 - return 0; + return ret; } =20 static int fsl_lpspi_transfer_one(struct spi_controller *controller, --=20 2.34.1 From nobody Fri Oct 3 15:37:47 2025 Received: from mail-wr1-f45.google.com (mail-wr1-f45.google.com [209.85.221.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4D71130AD0E for ; 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Thu, 28 Aug 2025 03:15:30 -0700 (PDT) Received: from ho-tower-lan.lan ([185.48.76.109]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45b66f2041fsm49976305e9.5.2025.08.28.03.15.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Aug 2025 03:15:30 -0700 (PDT) From: James Clark Date: Thu, 28 Aug 2025 11:14:43 +0100 Subject: [PATCH v2 4/9] spi: spi-fsl-lpspi: Clear status register after disabling the module Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250828-james-nxp-lpspi-v2-4-6262b9aa9be4@linaro.org> References: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> In-Reply-To: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> To: Frank Li , Mark Brown , Clark Wang , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Larisa Grigore , Larisa Grigore , Ghennadi Procopciuc , Ciprianmarian Costea , s32@nxp.com Cc: James Clark , linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.14.0 From: Larisa Grigore Clear the error flags after disabling the module to avoid the case when a flag is set again between flag clear and module disable. And use SR_CLEAR_MASK to replace hardcoded value for improved readability. Although fsl_lpspi_reset() was only introduced in commit a15dc3d657fa ("spi: lpspi: Fix CLK pin becomes low before one transfer"), the original driver only reset SR in the interrupt handler, making it vulnerable to the same issue. Therefore the fixes commit is set at the introduction of the driver. Fixes: 5314987de5e5 ("spi: imx: add lpspi bus driver") Signed-off-by: Larisa Grigore Signed-off-by: Ciprian Marian Costea Reviewed-by: Frank Li Signed-off-by: James Clark --- drivers/spi/spi-fsl-lpspi.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index e50261e9a1fa..fc4d49f0717e 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -83,6 +83,8 @@ #define TCR_RXMSK BIT(19) #define TCR_TXMSK BIT(18) =20 +#define SR_CLEAR_MASK GENMASK(13, 8) + struct fsl_lpspi_devtype_data { u8 prescale_max; }; @@ -535,14 +537,13 @@ static int fsl_lpspi_reset(struct fsl_lpspi_data *fsl= _lpspi) fsl_lpspi_intctrl(fsl_lpspi, 0); } =20 - /* W1C for all flags in SR */ - temp =3D 0x3F << 8; - writel(temp, fsl_lpspi->base + IMX7ULP_SR); - /* Clear FIFO and disable module */ temp =3D CR_RRF | CR_RTF; writel(temp, fsl_lpspi->base + IMX7ULP_CR); =20 + /* W1C for all flags in SR */ + writel(SR_CLEAR_MASK, fsl_lpspi->base + IMX7ULP_SR); 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Thu, 28 Aug 2025 03:15:31 -0700 (PDT) From: James Clark Date: Thu, 28 Aug 2025 11:14:44 +0100 Subject: [PATCH v2 5/9] dt-bindings: lpspi: Document support for S32G Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250828-james-nxp-lpspi-v2-5-6262b9aa9be4@linaro.org> References: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> In-Reply-To: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> To: Frank Li , Mark Brown , Clark Wang , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Larisa Grigore , Larisa Grigore , Ghennadi Procopciuc , Ciprianmarian Costea , s32@nxp.com Cc: James Clark , linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.14.0 From: Larisa Grigore Add compatible strings 'nxp,s32g2-lpspi' and 'nxp,s32g3-lpspi' for S32G2 and S32G3. Require nxp,s32g3-lpspi to fallback to nxp,s32g2-lpspi since they are currently compatible. Signed-off-by: Larisa Grigore Signed-off-by: James Clark Reviewed-by: Frank Li Reviewed-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml b/Doc= umentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml index a65a42ccaafe..a82360bed188 100644 --- a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml +++ b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml @@ -20,6 +20,7 @@ properties: - enum: - fsl,imx7ulp-spi - fsl,imx8qxp-spi + - nxp,s32g2-lpspi - items: - enum: - fsl,imx8ulp-spi @@ -27,6 +28,10 @@ properties: - fsl,imx94-spi - fsl,imx95-spi - const: fsl,imx7ulp-spi + - items: + - const: nxp,s32g3-lpspi + - const: nxp,s32g2-lpspi + reg: maxItems: 1 =20 --=20 2.34.1 From nobody Fri Oct 3 15:37:47 2025 Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 12F9430BBBB for ; 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Signed-off-by: James Clark Reviewed-by: Frank Li --- drivers/spi/spi-fsl-lpspi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index fc4d49f0717e..f16449cf42bb 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -135,11 +135,11 @@ struct fsl_lpspi_data { * ERR051608 fixed or not: * https://www.nxp.com/docs/en/errata/i.MX93_1P87f.pdf */ -static struct fsl_lpspi_devtype_data imx93_lpspi_devtype_data =3D { +static const struct fsl_lpspi_devtype_data imx93_lpspi_devtype_data =3D { .prescale_max =3D 1, }; =20 -static struct fsl_lpspi_devtype_data imx7ulp_lpspi_devtype_data =3D { +static const struct fsl_lpspi_devtype_data imx7ulp_lpspi_devtype_data =3D { .prescale_max =3D 7, }; =20 --=20 2.34.1 From nobody Fri Oct 3 15:37:47 2025 Received: from mail-wm1-f42.google.com (mail-wm1-f42.google.com [209.85.128.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5986730C37B for ; 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Thu, 28 Aug 2025 03:15:36 -0700 (PDT) Received: from ho-tower-lan.lan ([185.48.76.109]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45b66f2041fsm49976305e9.5.2025.08.28.03.15.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Aug 2025 03:15:35 -0700 (PDT) From: James Clark Date: Thu, 28 Aug 2025 11:14:46 +0100 Subject: [PATCH v2 7/9] spi: spi-fsl-lpspi: Treat prescale_max == 0 as no erratum Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250828-james-nxp-lpspi-v2-7-6262b9aa9be4@linaro.org> References: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> In-Reply-To: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> To: Frank Li , Mark Brown , Clark Wang , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Larisa Grigore , Larisa Grigore , Ghennadi Procopciuc , Ciprianmarian Costea , s32@nxp.com Cc: James Clark , linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.14.0 This erratum only ever results in a max value of 1, otherwise the full 3 bits are available. To avoid repeating the same default prescale value for every new device's devdata, treat 0 as no limit (7) and only set a value when the erratum is present. Change the field to be 3 bits to catch out of range definitions. No functionality change. Signed-off-by: James Clark Reviewed-by: Frank Li --- drivers/spi/spi-fsl-lpspi.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index f16449cf42bb..ea25e8dab0a4 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -86,7 +86,7 @@ #define SR_CLEAR_MASK GENMASK(13, 8) =20 struct fsl_lpspi_devtype_data { - u8 prescale_max; + u8 prescale_max : 3; /* 0 =3D=3D no limit */ }; =20 struct lpspi_config { @@ -132,15 +132,15 @@ struct fsl_lpspi_data { }; =20 /* - * ERR051608 fixed or not: - * https://www.nxp.com/docs/en/errata/i.MX93_1P87f.pdf + * Devices with ERR051608 have a max TCR_PRESCALE value of 1, otherwise th= ere is + * no prescale limit: https://www.nxp.com/docs/en/errata/i.MX93_1P87f.pdf */ static const struct fsl_lpspi_devtype_data imx93_lpspi_devtype_data =3D { .prescale_max =3D 1, }; =20 static const struct fsl_lpspi_devtype_data imx7ulp_lpspi_devtype_data =3D { - .prescale_max =3D 7, + /* All defaults */ }; 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Thu, 28 Aug 2025 03:15:37 -0700 (PDT) Received: from ho-tower-lan.lan ([185.48.76.109]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45b66f2041fsm49976305e9.5.2025.08.28.03.15.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Aug 2025 03:15:37 -0700 (PDT) From: James Clark Date: Thu, 28 Aug 2025 11:14:47 +0100 Subject: [PATCH v2 8/9] spi: spi-fsl-lpspi: Parameterize reading num-cs from hardware Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250828-james-nxp-lpspi-v2-8-6262b9aa9be4@linaro.org> References: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> In-Reply-To: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> To: Frank Li , Mark Brown , Clark Wang , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Larisa Grigore , Larisa Grigore , Ghennadi Procopciuc , Ciprianmarian Costea , s32@nxp.com Cc: James Clark , linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.14.0 Add query_hw_for_num_cs in devtype to avoid directly checking compatible string "fsl,imx93-spi". No functionality change. Signed-off-by: James Clark Reviewed-by: Frank Li --- drivers/spi/spi-fsl-lpspi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index ea25e8dab0a4..ce347cdbb009 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -87,6 +87,7 @@ =20 struct fsl_lpspi_devtype_data { u8 prescale_max : 3; /* 0 =3D=3D no limit */ + bool query_hw_for_num_cs : 1; }; =20 struct lpspi_config { @@ -137,6 +138,7 @@ struct fsl_lpspi_data { */ static const struct fsl_lpspi_devtype_data imx93_lpspi_devtype_data =3D { .prescale_max =3D 1, + .query_hw_for_num_cs =3D true, }; =20 static const struct fsl_lpspi_devtype_data imx7ulp_lpspi_devtype_data =3D { @@ -932,7 +934,7 @@ static int fsl_lpspi_probe(struct platform_device *pdev) fsl_lpspi->rxfifosize =3D 1 << ((temp >> 8) & 0x0f); if (of_property_read_u32((&pdev->dev)->of_node, "num-cs", &num_cs)) { - if (of_device_is_compatible(pdev->dev.of_node, "fsl,imx93-spi")) + if (devtype_data->query_hw_for_num_cs) num_cs =3D ((temp >> 16) & 0xf); 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Thu, 28 Aug 2025 03:15:38 -0700 (PDT) From: James Clark Date: Thu, 28 Aug 2025 11:14:48 +0100 Subject: [PATCH v2 9/9] spi: spi-fsl-lpspi: Add compatible for S32G Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250828-james-nxp-lpspi-v2-9-6262b9aa9be4@linaro.org> References: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> In-Reply-To: <20250828-james-nxp-lpspi-v2-0-6262b9aa9be4@linaro.org> To: Frank Li , Mark Brown , Clark Wang , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Larisa Grigore , Larisa Grigore , Ghennadi Procopciuc , Ciprianmarian Costea , s32@nxp.com Cc: James Clark , linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.14.0 From: Larisa Grigore S32G doesn't have the max prescale erratum (default) and it can query the max number of CS from hardware, so add those settings. Signed-off-by: Larisa Grigore Signed-off-by: Ciprian Marian Costea Signed-off-by: James Clark Reviewed-by: Frank Li --- drivers/spi/spi-fsl-lpspi.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index ce347cdbb009..431439d4cdda 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -145,9 +145,14 @@ static const struct fsl_lpspi_devtype_data imx7ulp_lps= pi_devtype_data =3D { /* All defaults */ }; =20 +static const struct fsl_lpspi_devtype_data s32g_lpspi_devtype_data =3D { + .query_hw_for_num_cs =3D true, +}; + static const struct of_device_id fsl_lpspi_dt_ids[] =3D { { .compatible =3D "fsl,imx7ulp-spi", .data =3D &imx7ulp_lpspi_devtype_dat= a,}, { .compatible =3D "fsl,imx93-spi", .data =3D &imx93_lpspi_devtype_data,}, + { .compatible =3D "nxp,s32g2-lpspi", .data =3D &s32g_lpspi_devtype_data,}, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, fsl_lpspi_dt_ids); --=20 2.34.1