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Thu, 28 Aug 2025 14:55:30 -0700 (PDT) From: David Lechner Date: Thu, 28 Aug 2025 16:54:52 -0500 Subject: [PATCH v3 1/4] dt-bindings: iio: adc: adi,ad7124: fix clocks properties Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250828-iio-adc-ad7124-proper-clock-support-v3-1-0b317b4605e5@baylibre.com> References: <20250828-iio-adc-ad7124-proper-clock-support-v3-0-0b317b4605e5@baylibre.com> In-Reply-To: <20250828-iio-adc-ad7124-proper-clock-support-v3-0-0b317b4605e5@baylibre.com> To: Michael Hennerich , Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, David Lechner X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3149; i=dlechner@baylibre.com; h=from:subject:message-id; bh=ejiW++p+A0I9xjvm23IuPsPQ6EO4iCmJb+R47NFoGFU=; b=owEBbQGS/pANAwAKAcLMIAH/AY/AAcsmYgBosNA1O0KkNBJ9aNcMpiNpN0mL0yWZXDt161WKd V7fJ3SqsHGJATMEAAEKAB0WIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCaLDQNQAKCRDCzCAB/wGP wCbiB/4+PzMxVzV3DSBjQKryiHukMKB7ZFrX8RalKvJGOisgzuD7Prh4Spexa2ufXG7KI7T+KrL 0HgkRQIJB/+/T0e0fcf6E1x9g+xJX3Rsvpnlv7qS7oPwOY/ciuy30+/wo0caKSp7a3JTF53BdxB 0gT7fGFowhXpZCDgJj+tSA7Q84dD+dNCexnLvwXxDe22VrM0ieC8i1NY7LdgfPJ71r16kiqDoZV W3lxQ5ugVV7PjfHMumHQaQyNyHapt8xRTl8Q6JCGlPBDgA4ylm5f478Xbsl1ztt2kSO618XrrFV QObtXUbz30UCRPrghl+sXVBW5iYPUCzLxWx+cQrBwTkyJbkS X-Developer-Key: i=dlechner@baylibre.com; a=openpgp; fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03 Use correct clocks properties for the AD7124 family of ADCs. These ADCs have an internal clock along with an optional external clock that can be connected to the CLK pin. This pin can be wired up 3 ways: 1. Not connected - the internal clock is used. 2. Connected to an external clock (input) - the external clock is used. 3. Connected to the CLK pin on another ADC (output) - the internal clock is used on one and the other is configured for an external clock. The new bindings describe these 3 cases by picking one of the following: 1. Omit both clocks and #clock-cells properties. 2. Include only the clocks property with a phandle to the external clock. 3. Include only the #clock-cells property on the ADC providing the output. The clock-names property is now deprecated and should not be used. The MCLK signal that it refers to is an internal counter in the ADC and therefore does not make sense as a devicetree property as it can't be connected to anything external to the ADC. Since there is only one possible external clock, the clock-names property is not needed anyway. Based on the implementation of the Linux driver, it looks like the "mclk" clock was basically being used as a control to select the power mode of the ADC, which is not something that should be done in the devicetree. Reviewed-by: Rob Herring (Arm) Signed-off-by: David Lechner --- .../devicetree/bindings/iio/adc/adi,ad7124.yaml | 21 ++++++++++++++++-= ---- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Do= cumentation/devicetree/bindings/iio/adc/adi,ad7124.yaml index 4dd5395730c10925c86782116dfd70a75d033bfb..2e3f84db6193b3d8765e2bdbd2d= 3175cf1892ba4 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml @@ -28,12 +28,21 @@ properties: =20 clocks: maxItems: 1 - description: phandle to the master clock (mclk) + description: Optional external clock connected to the CLK pin. =20 clock-names: + deprecated: true + description: + MCLK is an internal counter in the ADC. Do not use this property. items: - const: mclk =20 + '#clock-cells': + description: + The CLK pin can be used as an output. When that is the case, include + this property. + const: 0 + interrupts: description: IRQ line for the ADC maxItems: 1 @@ -67,10 +76,14 @@ properties: required: - compatible - reg - - clocks - - clock-names - interrupts =20 +# Can't have both clock input and output at the same time. +not: + required: + - '#clock-cells' + - clocks + patternProperties: "^channel@([0-9]|1[0-5])$": $ref: adc.yaml @@ -136,8 +149,6 @@ examples: interrupt-parent =3D <&gpio>; rdy-gpios =3D <&gpio 25 GPIO_ACTIVE_LOW>; refin1-supply =3D <&adc_vref>; - clocks =3D <&ad7124_mclk>; - clock-names =3D "mclk"; =20 #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.43.0