From nobody Fri Oct 3 16:44:21 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC147266B6C for ; Thu, 28 Aug 2025 04:50:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756356623; cv=none; b=t/IL+AiJE/yxaXJRITrkbzOjuQudSmLT26Lo1WdsskxLqcbGRaD0u9IRBXKom2ULlPVJTgSTdBABCvEdHD/QFBn70Lxv7/eSxT8KE5nmfjQo6Uob1QjI3XP2/lNosuPyvzK94C/08F5Dch+orQaa5wGoMQW2f5MBoI9N6sDRtCc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756356623; c=relaxed/simple; bh=ES0C/eHUJ0vZMSiE7e9k3eopudAsRoEFpDfAJn+GlGw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=AjlLeAkoZy5k6soQdcy7zbzvSPnubjaN8+ifHR+PAXsXaHQuO4FhrZLHLpEDHTvSTL7zOp84M+v8YEGnj0kwYbD6uPyi/2TPlHEPa41O28BU606nCd0SnzohQhYsNgzGmYuydggnL3oD56YLfgKVKR7fjoGcaZKdsgg4Pz56l6Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=OMb/CLOe; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="OMb/CLOe" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 57RG79u2031479 for ; Thu, 28 Aug 2025 04:50:20 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= jWgEnfKM2T8SN4ZowpfF7xlxhdEVJCQ/+pQl9CKBY4Q=; b=OMb/CLOeXxsCkRQ5 21C7NeYcs4c4kEs6zDOsBXUZOq8+7HSCHi9Klva7mjSzhGnOLNhX4mwPRk2aRLxh 8Sj7O/Yba4aHnTdUG/lxISLhflktpexHBJlE2hKJMtFUMUS5QeTe+bA0jS7XyaYv 2Euw/VV8CzG7eEGscDfrhhqhhdrHnH8weUUYinIvE5DcGhp4C1BLDEf5bvcsWPoM QCLeH9rpicPMiYKYkTzaft49cCTtIqW+Pz2W+ezNQ5K5NnK1wAtZPFKzfZaLe+uO FNbJBqUJUavcGKE6LDbTljD4qnUi9E0kZpjfk7QeyhCCISnY/ubQvkZb5di/f9Wb xcb6xw== Received: from mail-pf1-f198.google.com (mail-pf1-f198.google.com [209.85.210.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 48q5xpy4ga-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Thu, 28 Aug 2025 04:50:20 +0000 (GMT) Received: by mail-pf1-f198.google.com with SMTP id d2e1a72fcca58-7720f231103so599243b3a.0 for ; Wed, 27 Aug 2025 21:50:20 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756356619; x=1756961419; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jWgEnfKM2T8SN4ZowpfF7xlxhdEVJCQ/+pQl9CKBY4Q=; b=XpVJdiGOj5WWaV+n9hzCgyN9ypU+J6NHn0AZNtC2gob1V6WL2ng5+bNDoHPXo4jZOy yPV+BL9+3sPDQ7EXczAtcwsR/TMf3gxbFVCC9ZcUFFQLOqd+QMmDigQeWylsXuZspeAp FKK28s05wABfx1MyAAMI6NIs8NtZySnIh5EdA7SzBofK9JKvtYdnS06SYSA/Xn8mEzrU jfle9fnVfdl2dkpsMecRpqfBxJFEYAkH9kp3Oh7svbtDHsJ5bFuaqeMDZ+zesrjH6U7l Y4CydwNlwBgehLqrtGOIe46pDgt1a2b2f55l8qTSUnCz+TRFSGP956at+YPrewXj0EHN 87Aw== X-Forwarded-Encrypted: i=1; AJvYcCW+2HugMEkP7nDkfy9YFz8w88RkXEZFcKFD4SZIFQrsTZ8cljlq0sQoBeWnw9Wi/dft5+Xap3VkrjEKBFA=@vger.kernel.org X-Gm-Message-State: AOJu0YwdOodmc9zmdPOYbq5yfSpDbnnitcfQdl8lKAgR6sXMMYWNTHid pajP08bP/4tDWqF7b++UkQOob4i7zX2FGTHEtHAHw4EKqWKbNUVywgIt8CPdQ257Tkmi+Vg5pAy K3/DikrzEjECgZK3LkcVORcQZb4fC6ATD0Vs8ApRWmXXY7JdEOA5+zDNZxZiiRwLdTbc= X-Gm-Gg: ASbGncv8q5L/vEsvrxgdU7z8r1u+/JvOwI3vW1Ov1TqkmW9xYm4Lmxp1Jnd7q7ihEBu EEq561sJIoiGT4pwNT+2udjb0+CZAiVUoTKJRZec33uowTz7bA2HXtui5LA079sNyml8Fl6nmXa koK/iqehqbMfvfCMbow+3XYP1//qPJwxl6R1z8hzup9F+/hfZAKOO2Yx3wGByosoKyILtQ4ncoe WbIsj0bAezKntQkEjZXMw3nSgcbV6oYajkO48M7zcke5aH/H5JydH6fclpdADXxrLos+I+l0BUQ JQMCwV8lHpvbiIX7U78Fkfz4cKnvzEv8jX5laPzpoEmKyi4O9tREDDdpdxUl2yJ+CpOuS7jAd0u uxNjClkRlN2svVMvrQ1YfpsTUq06O3xU/pw== X-Received: by 2002:a05:6a20:2450:b0:243:b38b:eb8e with SMTP id adf61e73a8af0-243b38beeaemr153784637.49.1756356619083; Wed, 27 Aug 2025 21:50:19 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGIsIeKy5fSUIi8sXFWz5JGR8nHUoOGJKLNVbVoy+Jb7LDobgGaONdb20TwG/V/hYVHruIpRA== X-Received: by 2002:a05:6a20:2450:b0:243:b38b:eb8e with SMTP id adf61e73a8af0-243b38beeaemr153756637.49.1756356618599; Wed, 27 Aug 2025 21:50:18 -0700 (PDT) Received: from yijiyang-gv.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-327ab094f00sm986699a91.6.2025.08.27.21.50.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 21:50:18 -0700 (PDT) From: Yijie Yang Date: Thu, 28 Aug 2025 12:48:45 +0800 Subject: [PATCH v8 1/3] dt-bindings: arm: qcom: Document HAMOA-IOT-EVK board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250828-hamoa_initial-v8-1-c9d173072a5c@oss.qualcomm.com> References: <20250828-hamoa_initial-v8-0-c9d173072a5c@oss.qualcomm.com> In-Reply-To: <20250828-hamoa_initial-v8-0-c9d173072a5c@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Yijie Yang , Krzysztof Kozlowski X-Mailer: b4 0.15-dev-5bbf5 X-Developer-Signature: v=1; a=ed25519-sha256; t=1756356611; l=1177; i=yijie.yang@oss.qualcomm.com; s=20240408; h=from:subject:message-id; bh=ES0C/eHUJ0vZMSiE7e9k3eopudAsRoEFpDfAJn+GlGw=; b=N7c+oevrGdfKj/Zk4E4BbRJHiVXqzyQUlC6CYshevs2QpIjo7sqqV0S75SR3Ts9ysuzC3LExQ tdQMrpAcG54BpG1WMgAcZRxhgzWir2GZBurYXOR05McWnD1atz5wrdB X-Developer-Key: i=yijie.yang@oss.qualcomm.com; a=ed25519; pk=XvMv0rxjrXLYFdBXoFjTdOdAwDT5SPbQ5uAKGESDihk= X-Authority-Analysis: v=2.4 cv=KOlaDEFo c=1 sm=1 tr=0 ts=68afe00c cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=Bh1HEMNN3wmc11-eFpoA:9 a=QEXdDO2ut3YA:10 a=IoOABgeZipijB_acs4fv:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: o-bjm5QkZ90NVSj2KBaczSteMq4obKfw X-Proofpoint-ORIG-GUID: o-bjm5QkZ90NVSj2KBaczSteMq4obKfw X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODIzMDAzMyBTYWx0ZWRfX2IQdDSfdxmRV P2tWJ2VljYHXe8izYsbu4nEVSkbUC0POPW6afiOkZtmHkcIYcCAttPUsjozOGD9koebEoC4/qn9 22ggAp0u0jjrnQMLgN7i+sTCZWBIsVWQuLRBgrcR1SRBffkqQ/SoChCfAzO/UfPpbFeAdGIeh7G n8AiecOpkL2OhZkKFbDbuTfNo5gd7Zx3ePs6g+zysfizZoGKhl3OUt3DMc5W7VYP7B3ouKGoceI wzZwx6+op7fwrBlkGlPAv6OoaDeA+fGYgYPR5n2aKS6PRyuk885bO5fLIFPnv/7XyRwzJUdSsF0 8htMpK5cImUFlrQIKj74F0HrGnnMO9gz2xXUfi2R+gWZo/uzCBaIPlZ4sVpwTuEAD6NzkI3EIC0 7H0pQh8V X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-28_01,2025-08-26_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 bulkscore=0 adultscore=0 phishscore=0 impostorscore=0 spamscore=0 suspectscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508230033 Document the device tree binding for the HAMOA-IOT-EVK board, which uses the Qualcomm X1E80100 SoC. The EVK consists of a carrier board and a modular System-on-Module (SoM). The SoM integrates the SoC, PMICs, and essential GPIOs, while the EVK carrier board provides additional peripherals such as UART and USB interfaces. Acked-by: Krzysztof Kozlowski Signed-off-by: Yijie Yang --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index 55e5eb75af89..6b6503181ad6 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1069,6 +1069,12 @@ properties: - qcom,x1e80100-qcp - const: qcom,x1e80100 =20 + - items: + - enum: + - qcom,hamoa-iot-evk + - const: qcom,hamoa-iot-som + - const: qcom,x1e80100 + - items: - enum: - asus,zenbook-a14-ux3407qa --=20 2.34.1 From nobody Fri Oct 3 16:44:21 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6342A26A0B3 for ; Thu, 28 Aug 2025 04:50:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756356627; cv=none; b=ukb4G/MF6Wg9n0SerAnhQrVJrXVuALaRLgPU3sdEnGEuNfXUGeZk7a31PW3DT6VY636Ob5HnuNaiKI2Dj3RW62bV8/BV3htOYuUglKhF7JPOK5ssHyqGytolXh+H+36m5QaZNy+/JN0KTmyVLy8LqvzxB0tQRUz1lOXc96QnQ8M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756356627; c=relaxed/simple; bh=pgVVVMjpvVArcwiIK6gyPmMX22ytKd/GexamSpAH3B4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=H7DHKeEzW4Wf1tC7Q62ZAj4l++SGYGv8qu6GWUBVg8Vx3Jv631aJPwTIaxC61acSiF4564w06zEn2gpDtNOsr6Uys4YzGjLGMfl5vFl2iRUg3Zj1HSwH2gt0PxZWuzBfCagMGZ45kBAEf9u0gsgpWsGrV6qrNCGpsRAR8nHlsfQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=WpPIHgCl; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="WpPIHgCl" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 57S2ppV9001292 for ; Thu, 28 Aug 2025 04:50:24 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= X3Ui3Vkf0spYCbldewu1FM2ntQ4I89aGRM72h0RzQUk=; b=WpPIHgCl8pF+fJvX 0qt1i6H2ceXLTjyPFs4g34DOhUM2Tc92xdKmkvYLSMuPxXhqzDnzpWJEVB+qWfyB 41wYJjIiohZ23zDzK0GRvRK4B5IArIOvaJCsXZo3CPFIYxrM23y8LsVOcaPvMsqf dysQrx2r/VdUCXuIvSmaf6BPZloqFgdWlG/C+MJ6u8GBaiXtNfaF+3Be6YTKsfiz cJ+T2ZlnKLCqbWenMjEymY3BosLrtYIzgWOsNIciRa3eodBzGEdELhMWo++21jPM Na2SxwWjA69hQV0LgX6aKIWtcf7Qk/IFGdXAKCuiCGFVEa9Fiqx1QmT3wdejEAZ8 zL0UEA== Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 48t47b9xqs-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Thu, 28 Aug 2025 04:50:24 +0000 (GMT) Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-3274f7e6c1fso575751a91.0 for ; Wed, 27 Aug 2025 21:50:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756356623; x=1756961423; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=X3Ui3Vkf0spYCbldewu1FM2ntQ4I89aGRM72h0RzQUk=; b=QNJ6clblt3hFjQks5BUzFrV9uI6zI5dvbTQ6k9wJRXt43jQOs3OGjJnBEZrhnXGByw TQsFp3Ni83PZanRP9P6rbZIAeiwAAUElDCOqOytNJf2NwBk02DJJ2mzje2wMbef8XP85 9ui9toRQ2ZrJ7Ot9yp0TEvNDiz1ZF5naL659BiVdAQ1iAI8zkGvLq81/1SriLoK5s9od 2pzMyM3+gm+4GS/fFOMwL8ugJhp3ssHlf+QWYI/lzigTNivs/UHJhJbwuWV8k91Wlmil Ui9OX9Znzt4CMy1tuSgd5t/N2XRoYbiOksDfFXOxuqZpHZoBn98EMxfvaU1CaGHeGs9Y ojAw== X-Forwarded-Encrypted: i=1; AJvYcCUT8KYMJJh1lAAOZHHMSmYBsQsknsgM6VWSPXRbB1OurEVPeC7nX58ch0phovPvvVJ2dc80gKpx1sNQex4=@vger.kernel.org X-Gm-Message-State: AOJu0Yzxz+d2D2EWcOuwS0gfrZaDvO2hxdAUIRCeFndVo7IbYmrWnGLj CdKZ+uRSmocJAgfWBbjZaK5H3A07PLexKQEEEqmlKeb98/nqNfYCGu+Q5lHziL7wFo+9ed7ElJV s61xp9HgBCQg9NLn+IVA3asjzh/N+WvJfRsP3vOPRDrLu9w7tRnONc2mGePdJe31WMN8= X-Gm-Gg: ASbGncu5IXVuPhOxv1uSBP7iIgXbI5IcIoLdjrguCmdpt4OsD52hm1JZiHa1PzdekvQ /ZnlQxEuRqWSEhS2aWw+fS/tdfObGoMMjh9z+z0umuUInccbyENHlbeT9qWynOlJdc8CENuoDQa tKeTkrysSvKPtbGhSjyX4/G5ykqRCbUPpzWqw+aCdOdxUwTToTzUjBF4WP+/j1XDUnB8/cqCucg I3l6VIiuuzBXg7uhy2+IVkC389oj1IeXAnsrHl3vS8bCyE8gRVlHND0OacYzXDtbUFLgVmlDzSf 0EUUDhktTkkp4pDk/YB/uwLJHWqbbMFvxRxCw0iLwiOg6o461E3QBTMUFRRgEg5jd8nAiBiA/7+ eLzCt4N3gfJGzIX7F8T0k0RnIg8crGJNNbw== X-Received: by 2002:a17:90b:3a90:b0:327:712c:be1d with SMTP id 98e67ed59e1d1-327712cc062mr6131723a91.21.1756356623168; Wed, 27 Aug 2025 21:50:23 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFO14KnoE97XA/HyeWDvBEmJG6Q0zZLdsSw15XGNaiCl4JEysIZL9I11/3xr79BkUCB7IJMQg== X-Received: by 2002:a17:90b:3a90:b0:327:712c:be1d with SMTP id 98e67ed59e1d1-327712cc062mr6131689a91.21.1756356622624; Wed, 27 Aug 2025 21:50:22 -0700 (PDT) Received: from yijiyang-gv.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-327ab094f00sm986699a91.6.2025.08.27.21.50.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 21:50:22 -0700 (PDT) From: Yijie Yang Date: Thu, 28 Aug 2025 12:48:46 +0800 Subject: [PATCH v8 2/3] arm64: dts: qcom: Add HAMOA-IOT-SOM platform Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250828-hamoa_initial-v8-2-c9d173072a5c@oss.qualcomm.com> References: <20250828-hamoa_initial-v8-0-c9d173072a5c@oss.qualcomm.com> In-Reply-To: <20250828-hamoa_initial-v8-0-c9d173072a5c@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Yijie Yang , Konrad Dybcio X-Mailer: b4 0.15-dev-5bbf5 X-Developer-Signature: v=1; a=ed25519-sha256; t=1756356611; l=15891; i=yijie.yang@oss.qualcomm.com; s=20240408; h=from:subject:message-id; bh=pgVVVMjpvVArcwiIK6gyPmMX22ytKd/GexamSpAH3B4=; b=v3eSyrdnwYcsL591e/jY0CYsvx34VrsFWZJ423DpQEoZ9VmCQIJGAqapILKXqiV22x/cQW1po 9N1om5/mPn5ByxYw7UBr+dr6AeIYwyCrOGT3mAtf7tzr10Wal+z5CeC X-Developer-Key: i=yijie.yang@oss.qualcomm.com; a=ed25519; pk=XvMv0rxjrXLYFdBXoFjTdOdAwDT5SPbQ5uAKGESDihk= X-Proofpoint-GUID: 6bLrL5IZO0AIgUeXIiYwSvNfgus6ZRsh X-Authority-Analysis: v=2.4 cv=CYoI5Krl c=1 sm=1 tr=0 ts=68afe010 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=kJpOf-JYLzBZDkfq8aYA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: 6bLrL5IZO0AIgUeXIiYwSvNfgus6ZRsh X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODI3MDEyOCBTYWx0ZWRfX/Yzdoqv5kaKK apnJxCUfIQsXhbDnr8T7YKnHgGaV+92iOBTdwL8HAudOY74yLcQdHLgEjsKLBFvoz7zkrQx1tWV U+cOORnI8b5Bg1gnkvyO8u9oGUqV1u/J6mOiObcQrhUi50jYyCJz7MAn8pvsPGqNPqOcGSHmZEq Ci54JmgeBP658ztQcSErGIijd8osAVD1656VjoKTjRNbqLW7Swd9pV2hhQ4lJ50SQDrVpUZSoz9 FA39GN83mwRmv1vUA0pBsY5HEuQS8bSPzwFeSs1ci8sewhbSCFbePksQXvleoFbvWbzI2oQXBHt HVtZBaWw48dSMmWHbg6thpxGFbSMeMmV5YZXDqXOdXnKVvBV/4pEV/khmuYkx2+nVNvew3zfKnt BfUWZdoP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-28_01,2025-08-26_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 adultscore=0 clxscore=1015 phishscore=0 priorityscore=1501 impostorscore=0 suspectscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508270128 The HAMOA-IOT-SOM is a compact computing module that integrates a System on Chip (SoC) =E2=80=94 specifically the x1e80100 =E2=80=94 along with esse= ntial components optimized for IoT applications. It is designed to be mounted on carrier boards, enabling the development of complete embedded systems. This change enables the following components: - Regulators on the SOM - Reserved memory regions - PCIe6a and its PHY - PCIe4 and its PHY - USB0 through USB6 and their PHYs - ADSP, CDSP - WLAN, Bluetooth (M.2 interface) Written in collaboration with Yingying Tang (PCIe4 and WLAN) . Reviewed-by: Konrad Dybcio Signed-off-by: Yijie Yang --- arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 609 ++++++++++++++++++++++++= ++++ 1 file changed, 609 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi b/arch/arm64/boot/= dts/qcom/hamoa-iot-som.dtsi new file mode 100644 index 000000000000..5facc5544c3d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi @@ -0,0 +1,609 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "x1e80100.dtsi" +#include "x1e80100-pmics.dtsi" +#include +#include + +/ { + compatible =3D "hamoa-iot-som", "qcom,x1e80100"; + + reserved-memory { + linux,cma { + compatible =3D "shared-dma-pool"; + size =3D <0x0 0x8000000>; + reusable; + linux,cma-default; + }; + }; +}; + +&apps_rsc { + /* PMC8380C_B */ + regulators-0 { + compatible =3D "qcom,pm8550-rpmh-regulators"; + qcom,pmic-id =3D "b"; + + vdd-bob1-supply =3D <&vph_pwr>; + vdd-bob2-supply =3D <&vph_pwr>; + vdd-l1-l4-l10-supply =3D <&vreg_s4c_1p8>; + vdd-l2-l13-l14-supply =3D <&vreg_bob1>; + vdd-l5-l16-supply =3D <&vreg_bob1>; + vdd-l6-l7-supply =3D <&vreg_bob2>; + vdd-l8-l9-supply =3D <&vreg_bob1>; + vdd-l12-supply =3D <&vreg_s5j_1p2>; + vdd-l15-supply =3D <&vreg_s4c_1p8>; + vdd-l17-supply =3D <&vreg_bob2>; + + vreg_bob1: bob1 { + regulator-name =3D "vreg_bob1"; + regulator-min-microvolt =3D <3008000>; + regulator-max-microvolt =3D <3960000>; + regulator-initial-mode =3D ; + }; + + vreg_bob2: bob2 { + regulator-name =3D "vreg_bob2"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + }; + + vreg_l1b_1p8: ldo1 { + regulator-name =3D "vreg_l1b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2b_3p0: ldo2 { + regulator-name =3D "vreg_l2b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3100000>; + regulator-initial-mode =3D ; + }; + + vreg_l4b_1p8: ldo4 { + regulator-name =3D "vreg_l4b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l5b_3p0: ldo5 { + regulator-name =3D "vreg_l5b_3p0"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-initial-mode =3D ; + }; + + vreg_l6b_1p8: ldo6 { + regulator-name =3D "vreg_l6b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l7b_2p8: ldo7 { + regulator-name =3D "vreg_l7b_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + regulator-initial-mode =3D ; + }; + + vreg_l8b_3p0: ldo8 { + regulator-name =3D "vreg_l8b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l9b_2p9: ldo9 { + regulator-name =3D "vreg_l9b_2p9"; + regulator-min-microvolt =3D <2960000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l10b_1p8: ldo10 { + regulator-name =3D "vreg_l10b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l12b_1p2: ldo12 { + regulator-name =3D "vreg_l12b_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + + vreg_l13b_3p0: ldo13 { + regulator-name =3D "vreg_l13b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3100000>; + regulator-initial-mode =3D ; + }; + + vreg_l14b_3p0: ldo14 { + regulator-name =3D "vreg_l14b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l15b_1p8: ldo15 { + regulator-name =3D "vreg_l15b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + + vreg_l16b_2p9: ldo16 { + regulator-name =3D "vreg_l16b_2p9"; + regulator-min-microvolt =3D <2912000>; + regulator-max-microvolt =3D <2912000>; + regulator-initial-mode =3D ; + }; + + vreg_l17b_2p5: ldo17 { + regulator-name =3D "vreg_l17b_2p5"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <2504000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380VE_C */ + regulators-1 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vdd-l1-supply =3D <&vreg_s5j_1p2>; + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s4-supply =3D <&vph_pwr>; + + vreg_s4c_1p8: smps4 { + regulator-name =3D "vreg_s4c_1p8"; + regulator-min-microvolt =3D <1856000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + }; + + vreg_l1c_1p2: ldo1 { + regulator-name =3D "vreg_l1c_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l2c_0p8: ldo2 { + regulator-name =3D "vreg_l2c_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3c_0p8: ldo3 { + regulator-name =3D "vreg_l3c_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380_D */ + regulators-2 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "d"; + + vdd-l1-supply =3D <&vreg_s1f_0p7>; + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s4c_1p8>; + vdd-s1-supply =3D <&vph_pwr>; + + vreg_l1d_0p8: ldo1 { + regulator-name =3D "vreg_l1d_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l2d_0p9: ldo2 { + regulator-name =3D "vreg_l2d_0p9"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3d_1p8: ldo3 { + regulator-name =3D "vreg_l3d_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380_E */ + regulators-3 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "e"; + + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s5j_1p2>; + + vreg_l2e_0p8: ldo2 { + regulator-name =3D "vreg_l2e_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3e_1p2: ldo3 { + regulator-name =3D "vreg_l3e_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380_F */ + regulators-4 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "f"; + + vdd-l1-supply =3D <&vreg_s5j_1p2>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s5j_1p2>; + vdd-s1-supply =3D <&vph_pwr>; + + vreg_s1f_0p7: smps1 { + regulator-name =3D "vreg_s1f_0p7"; + regulator-min-microvolt =3D <700000>; + regulator-max-microvolt =3D <1100000>; + regulator-initial-mode =3D ; + }; + + vreg_l1f_1p0: ldo1 { + regulator-name =3D "vreg_l1f_1p0"; + regulator-min-microvolt =3D <1024000>; + regulator-max-microvolt =3D <1024000>; + regulator-initial-mode =3D ; + }; + + vreg_l2f_1p0: ldo2 { + regulator-name =3D "vreg_l2f_1p0"; + regulator-min-microvolt =3D <1024000>; + regulator-max-microvolt =3D <1024000>; + regulator-initial-mode =3D ; + }; + + vreg_l3f_1p0: ldo3 { + regulator-name =3D "vreg_l3f_1p0"; + regulator-min-microvolt =3D <1024000>; + regulator-max-microvolt =3D <1024000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380VE_I */ + regulators-6 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "i"; + + vdd-l1-supply =3D <&vreg_s4c_1p8>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s1-supply =3D <&vph_pwr>; + vdd-s2-supply =3D <&vph_pwr>; + + vreg_s1i_0p9: smps1 { + regulator-name =3D "vreg_s1i_0p9"; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_s2i_1p0: smps2 { + regulator-name =3D "vreg_s2i_1p0"; + regulator-min-microvolt =3D <1000000>; + regulator-max-microvolt =3D <1100000>; + regulator-initial-mode =3D ; + }; + + vreg_l1i_1p8: ldo1 { + regulator-name =3D "vreg_l1i_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2i_1p2: ldo2 { + regulator-name =3D "vreg_l2i_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l3i_0p8: ldo3 { + regulator-name =3D "vreg_l3i_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380VE_J */ + regulators-7 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "j"; + + vdd-l1-supply =3D <&vreg_s1f_0p7>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s5-supply =3D <&vph_pwr>; + + vreg_s5j_1p2: smps5 { + regulator-name =3D "vreg_s5j_1p2"; + regulator-min-microvolt =3D <1256000>; + regulator-max-microvolt =3D <1304000>; + regulator-initial-mode =3D ; + }; + + vreg_l1j_0p8: ldo1 { + regulator-name =3D "vreg_l1j_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l2j_1p2: ldo2 { + regulator-name =3D "vreg_l2j_1p2"; + regulator-min-microvolt =3D <1256000>; + regulator-max-microvolt =3D <1256000>; + regulator-initial-mode =3D ; + }; + + vreg_l3j_0p8: ldo3 { + regulator-name =3D "vreg_l3j_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; +}; + +&pcie4 { + perst-gpios =3D <&tlmm 146 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 148 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&pcie4_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie4_phy { + vdda-phy-supply =3D <&vreg_l3i_0p8>; + vdda-pll-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&pcie6a { + perst-gpios =3D <&tlmm 152 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 154 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&pcie6a_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie6a_phy { + vdda-phy-supply =3D <&vreg_l1d_0p8>; + vdda-pll-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&qupv3_0 { + status =3D "okay"; +}; + +&qupv3_1 { + status =3D "okay"; +}; + +&qupv3_2 { + status =3D "okay"; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/x1e80100/adsp.mbn", + "qcom/x1e80100/adsp_dtb.mbn"; + + status =3D "okay"; +}; + +&remoteproc_cdsp { + firmware-name =3D "qcom/x1e80100/cdsp.mbn", + "qcom/x1e80100/cdsp_dtb.mbn"; + + status =3D "okay"; +}; + +&tlmm { + gpio-reserved-ranges =3D <34 2>, /* TPM LP & INT */ + <44 4>; /* SPI (TPM) */ + + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins =3D "gpio147"; + function =3D "pcie4_clk"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio146"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio148"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + pcie6a_default: pcie6a-default-state { + clkreq-n-pins { + pins =3D "gpio153"; + function =3D "pcie6a_clk"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio152"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio154"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + + }; + }; +}; + +&usb_1_ss0 { + status =3D "okay"; +}; + +&usb_1_ss0_dwc3 { + dr_mode =3D "otg"; + usb-role-switch; +}; + +&usb_1_ss0_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&usb_1_ss0_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l1j_0p8>; + + status =3D "okay"; +}; + +&usb_1_ss1 { + status =3D "okay"; +}; + +&usb_1_ss1_dwc3 { + dr_mode =3D "otg"; + usb-role-switch; +}; + +&usb_1_ss1_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&usb_1_ss1_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l2d_0p9>; + + status =3D "okay"; +}; + +&usb_1_ss2 { + status =3D "okay"; +}; + +&usb_1_ss2_dwc3 { + dr_mode =3D "otg"; + usb-role-switch; +}; + +&usb_1_ss2_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&usb_1_ss2_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l2d_0p9>; + + status =3D "okay"; +}; + +&usb_2 { + status =3D "okay"; +}; + +&usb_2_dwc3 { + dr_mode =3D "host"; +}; + +&usb_2_hsphy { + vdd-supply =3D <&vreg_l2e_0p8>; + vdda12-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&usb_mp { + status =3D "okay"; +}; + +&usb_mp_hsphy0 { + vdd-supply =3D <&vreg_l2e_0p8>; + vdda12-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&usb_mp_hsphy1 { + vdd-supply =3D <&vreg_l2e_0p8>; + vdda12-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&usb_mp_qmpphy0 { + vdda-phy-supply =3D <&vreg_l3e_1p2>; + vdda-pll-supply =3D <&vreg_l3c_0p8>; + + status =3D "okay"; +}; + +&usb_mp_qmpphy1 { + vdda-phy-supply =3D <&vreg_l3e_1p2>; + vdda-pll-supply =3D <&vreg_l3c_0p8>; + + status =3D "okay"; +}; --=20 2.34.1 From nobody Fri Oct 3 16:44:21 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7D8F26A0D5 for ; Thu, 28 Aug 2025 04:50:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756356631; cv=none; b=Oa2L+z4wsRFJ38rn5T/LdXEmoLEa+XgbVhh8KYAaC/5DhVJ31sCPlZ9lSHo+JxpSxPL91ahzXb2tKJpoNVzPPgHWIbCIbMk+Jg7px6n9QWQqVakLgjOpSGo0AUDvKMQBEDrmpZ1TowZ9yqx+loc6dcfL+5JSg7hUtfdayVS8cSk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756356631; c=relaxed/simple; bh=lz1d+Bme8qYs2GaidBEUIgeMqvmU6dZDnAuhXzb2qgo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OLMC4VkyRdYImUydhwyqikGkyAmM6uMnjyAp23smcYESSxDqvcpt5ZNJwz2EHVNNd3k0uSWCf1xHLf+Om4O8UXnH2SeLjZhI+v2gw7KVlXDNILGWj8pId/IynLpO1Xh10qUFV8IEZXMyJP23TTmgzS8KObQSyvj0Pcuq038AVlM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=fHEj7NRt; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="fHEj7NRt" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 57RGKU2H029319 for ; Thu, 28 Aug 2025 04:50:28 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= tWh4Oy2ufngGV58cUX4VLp1hmFSKVMtZ1kybqCh/zfk=; b=fHEj7NRtEHBkWqd3 q7VYtAJE5F3fDon43fp26dP7z8/E0dukW/eeQr8J30czLRWccKIdq1zN8jBtA/VZ 6BcTtYGG2/HY5z78XHzEWVSZQE7LRZgL02abUeWk5vZLI4/bIucgb2ScVRSjoJcN kCYgq/PPO07rSaE6O2qfCnU+D54EG7aY3wAo28Qf7/aza659r0WXFa39iL9n5+dT lvdz9c+GJ6vsYbKQFgtBYMVwxvBNCtzG+14yISJ40gCTIbXp8C5UurFEEzXm8Urf buRPJfz7MbYDg3ykguzHt9QQ12CcUogGYsarRQy5i1iWGO/Km0M5CnzarMY2b431 i6OI7Q== Received: from mail-pj1-f71.google.com (mail-pj1-f71.google.com [209.85.216.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 48q5w2y3je-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Thu, 28 Aug 2025 04:50:28 +0000 (GMT) Received: by mail-pj1-f71.google.com with SMTP id 98e67ed59e1d1-3278bb34a68so550981a91.0 for ; Wed, 27 Aug 2025 21:50:28 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756356627; x=1756961427; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tWh4Oy2ufngGV58cUX4VLp1hmFSKVMtZ1kybqCh/zfk=; b=T7PmN0tjXYZAt7tTnz4iaYRPqiMaQT+7SSDenf3imuVHb0dD4sRRh4j9giB4RZckSD 2Re7pUCgtr5Few+jAIvqLlBhmewWq5I4Bd6qb/qa6HzZHl+obRKjDhYeCFlFLDaIZ3aH ws2supp/uHUoQ8UkxKptREULH3uxc+/CUYG9t6Th4HHn+PXU1HS8TDI5oPN+VsuCOdhg L6S2HvjJN0ZsUazW0kdLimrOYsNrEwVGgGYt7jFBjIlUrGivwMDB9MRPDJUdEw75ofLX GSB2bx5JS+OK134kWpiW8lsSYo7HY2JdWU8VTfagof5F4YR4eZRUA+uVNGNvr7X07sTl gB7w== X-Forwarded-Encrypted: i=1; AJvYcCW6FWtiqnR4pOJHSfoeG1oYymNahp82NwIkahd5sddJeSqtaDtxXTD3qTZMxpzLyfhuel+HThp3bEnAMiU=@vger.kernel.org X-Gm-Message-State: AOJu0YzpgzATTnYU9Qum59ao831LR2RIcb/Fnp1kHkf+iQRvnLo2I1wp bKG0fA7CoOJ7Blu6qJ1XSP27rIpqb0aHQOI4Ey82MqNvDZrA8Kt69Y2rzD41Cfj0HcNzbx6+7ld cUJ+IIX9EqATsfn6i2hs44JcYekOpnw568+V/1cz/12f7CpUs5HZFLeM0cTQroroCE5w= X-Gm-Gg: ASbGncsKa8BVT/cA11+BLr9+xjOWNALyaNsyYNCoQTEzWJYKo8Rcf+ealNGFaBBdM7H Z+FyBNtiRGK7GoX3Uf+uIPy17xzYNkkrbj9ofmo/IT3n/1dfDYsd8SkLzzHGX7NRRO79CzQiuAU XY6MPbXb6czVa64uMiKM9rnhup6fjB3/DBZ9M1g64k3nCFCqXxZPZd/5984dOOoIGmHPiCOmFdZ jSM3FfzBH1NG8LVdTHk3RaXWqugOzjZ6G7DwtW35OzLDyC1N19XpLoLWmabl64OaCbQebqb3z24 lUAiRF6zgPH7E0QsTNEtvOCGEgp0HhFWsMeV1pwW2H14a6SNW2pslv3XeDndzeO3wYOsbEUXlnX hC86XA1gMeGnTbzr51qVBgh8C0yfdaJgD6Q== X-Received: by 2002:a17:90b:384d:b0:325:5df8:ecb9 with SMTP id 98e67ed59e1d1-3255df8f0a3mr24553778a91.16.1756356626685; Wed, 27 Aug 2025 21:50:26 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHKXthqSl0L7e6fVqoTz6OHFzAL/M6itln8Ul6fgltIbWCJaEOyzns1yw1o3pX16z6LzhrQ/g== X-Received: by 2002:a17:90b:384d:b0:325:5df8:ecb9 with SMTP id 98e67ed59e1d1-3255df8f0a3mr24553738a91.16.1756356625963; Wed, 27 Aug 2025 21:50:25 -0700 (PDT) Received: from yijiyang-gv.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-327ab094f00sm986699a91.6.2025.08.27.21.50.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 21:50:25 -0700 (PDT) From: Yijie Yang Date: Thu, 28 Aug 2025 12:48:47 +0800 Subject: [PATCH v8 3/3] arm64: dts: qcom: Add base HAMOA-IOT-EVK board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250828-hamoa_initial-v8-3-c9d173072a5c@oss.qualcomm.com> References: <20250828-hamoa_initial-v8-0-c9d173072a5c@oss.qualcomm.com> In-Reply-To: <20250828-hamoa_initial-v8-0-c9d173072a5c@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Yijie Yang X-Mailer: b4 0.15-dev-5bbf5 X-Developer-Signature: v=1; a=ed25519-sha256; t=1756356611; l=28046; i=yijie.yang@oss.qualcomm.com; s=20240408; h=from:subject:message-id; bh=lz1d+Bme8qYs2GaidBEUIgeMqvmU6dZDnAuhXzb2qgo=; b=lukIxR1OJHfgELA9kf8VO412GE8LCt6lJTeLmsWXSCUzIzioVVU50jTrqbsc3vmU57BTATjzp CgjesJXYQtEDAJC9s6tTOm/GNZaH0DReG4vZlEuqD22KBpv0lZv5bNz X-Developer-Key: i=yijie.yang@oss.qualcomm.com; a=ed25519; pk=XvMv0rxjrXLYFdBXoFjTdOdAwDT5SPbQ5uAKGESDihk= X-Authority-Analysis: v=2.4 cv=Z/vsHGRA c=1 sm=1 tr=0 ts=68afe014 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=0tVnaCvAkXLXzvIwGYMA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODIzMDAzMyBTYWx0ZWRfX+s/xYBP3itaD fRlNy7bqyJKt3+EySMpgsyIqrS23diJfIWmn1HyRdWnf7MSkWW1oogpf3WzJ3zvD6kLF0LbWsTy hs+847NBfft4wJoBj1XGBe/jrGu/3dAFergS39DSuZlg7sWzPw+fTdEboeIdolAj7SUvLuwRz/y 9QLKn4vxkw8ab2KIvCiqsLOg0w+TysfKBDmkQL7SIQwiDSaTIO22f+uv5zDTuoSB6PN2TQxa3Hh ChmzcLkM2q9ReomsCZ8LB46gcoTqJJbHoWUeWlxxwBkF3TpjaFFrWo9oPKSLRBpkBeutoIPhJpb fF7Ov9ufykv5meZn3PQaXfENBD5KSPeV/8eDlsKd3TPRqbpqNuqlD2wDDmd1DHiekiIS0ropR2c WdabpwCd X-Proofpoint-GUID: Y-je-252EbqXP1vcbuXVjnAdECGxRxQy X-Proofpoint-ORIG-GUID: Y-je-252EbqXP1vcbuXVjnAdECGxRxQy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-28_01,2025-08-26_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 malwarescore=0 phishscore=0 clxscore=1015 suspectscore=0 impostorscore=0 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508230033 The HAMOA-IOT-EVK is an evaluation platform for IoT products, composed of the Hamoa IoT SoM and a carrier board. Together, they form a complete embedded system capable of booting to UART. This change enables the following peripherals on the carrier board: - UART - On-board regulators - USB Type-C mux - Pinctrl - Embedded USB (EUSB) repeaters - NVMe - pmic-glink - USB DisplayPorts - Bluetooth - Graphic - Audio Written in collaboration with Quill Qi (Audio) , Jie Zhang (Graphics) , Shuai Zhang (Bluetooth) , and Yongxing Mou (USB DisplayPorts) . Signed-off-by: Yijie Yang --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 1247 ++++++++++++++++++++++++= ++++ 2 files changed, 1248 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 94a84770b080..5e19535ad63d 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D apq8039-t2.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D apq8094-sony-xperia-kitakami-karin_windy.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D apq8096-db820c.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D apq8096-ifc6640.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D hamoa-iot-evk.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5018-rdp432-c2.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5018-tplink-archer-ax55-v1.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5332-rdp441.dtb diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts b/arch/arm64/boot/d= ts/qcom/hamoa-iot-evk.dts new file mode 100644 index 000000000000..b1a8380d6639 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts @@ -0,0 +1,1247 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "hamoa-iot-som.dtsi" + +/ { + model =3D "Qualcomm Technologies, Inc. Hamoa IoT EVK"; + compatible =3D "qcom,hamoa-iot-evk", "qcom,hamoa-iot-som", "qcom,x1e80100= "; + chassis-type =3D "embedded"; + + aliases { + serial0 =3D &uart21; + serial1 =3D &uart14; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + pmic-glink { + compatible =3D "qcom,x1e80100-pmic-glink", + "qcom,sm8550-pmic-glink", + "qcom,pmic-glink"; + #address-cells =3D <1>; + #size-cells =3D <0>; + orientation-gpios =3D <&tlmm 121 GPIO_ACTIVE_HIGH>, + <&tlmm 123 GPIO_ACTIVE_HIGH>, + <&tlmm 125 GPIO_ACTIVE_HIGH>; + + connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss0_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss0_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss0_sbu: endpoint { + remote-endpoint =3D <&usb_1_ss0_sbu_mux>; + }; + }; + }; + }; + + connector@1 { + compatible =3D "usb-c-connector"; + reg =3D <1>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss1_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss1_ss_in: endpoint { + remote-endpoint =3D <&retimer_ss1_ss_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss1_con_sbu_in: endpoint { + remote-endpoint =3D <&retimer_ss1_con_sbu_out>; + }; + }; + }; + }; + + connector@2 { + compatible =3D "usb-c-connector"; + reg =3D <2>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss2_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss2_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss2_ss_in: endpoint { + remote-endpoint =3D <&retimer_ss2_ss_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss2_con_sbu_in: endpoint { + remote-endpoint =3D <&retimer_ss2_con_sbu_out>; + }; + }; + }; + }; + }; + + vreg_edp_3p3: regulator-edp-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_EDP_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 70 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&edp_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + sound { + compatible =3D "qcom,x1e80100-sndcard"; + model =3D "X1E80100-EVK"; + audio-routing =3D "WooferLeft IN", + "WSA WSA_SPK1 OUT", + "TweeterLeft IN", + "WSA WSA_SPK2 OUT", + "WooferRight IN", + "WSA2 WSA_SPK2 OUT", + "TweeterRight IN", + "WSA2 WSA_SPK2 OUT", + "IN1_HPHL", + "HPHL_OUT", + "IN2_HPHR", + "HPHR_OUT", + "AMIC2", + "MIC BIAS2", + "VA DMIC0", + "MIC BIAS3", + "VA DMIC1", + "MIC BIAS3", + "VA DMIC2", + "MIC BIAS1", + "VA DMIC3", + "MIC BIAS1", + "VA DMIC0", + "VA MIC BIAS3", + "VA DMIC1", + "VA MIC BIAS3", + "VA DMIC2", + "VA MIC BIAS1", + "VA DMIC3", + "VA MIC BIAS1", + "TX SWR_INPUT1", + "ADC2_OUTPUT"; + + wcd-playback-dai-link { + link-name =3D "WCD Playback"; + + codec { + sound-dai =3D <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai RX_CODEC_DMA_RX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + wcd-capture-dai-link { + link-name =3D "WCD Capture"; + + codec { + sound-dai =3D <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai TX_CODEC_DMA_TX_3>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + wsa-dai-link { + link-name =3D "WSA Playback"; + + codec { + sound-dai =3D <&left_woofer>, + <&left_tweeter>, + <&swr0 0>, + <&lpass_wsamacro 0>, + <&right_woofer>, + <&right_tweeter>, + <&swr3 0>, + <&lpass_wsa2macro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai WSA_CODEC_DMA_RX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + va-dai-link { + link-name =3D "VA Capture"; + + codec { + sound-dai =3D <&lpass_vamacro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai VA_CODEC_DMA_TX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + }; + + vph_pwr: regulator-vph-pwr { + compatible =3D "regulator-fixed"; + + regulator-name =3D "vph_pwr"; + regulator-min-microvolt =3D <3700000>; + regulator-max-microvolt =3D <3700000>; + + regulator-always-on; + regulator-boot-on; + }; + + vreg_nvme: regulator-nvme { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_NVME_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 18 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&nvme_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + /* Left unused as the retimer is not used on this board. */ + vreg_rtmr0_1p15: regulator-rtmr0-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_1P15"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb0_pwr_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_1p8: regulator-rtmr0-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_1P8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb0_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_3p3: regulator-rtmr0-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb0_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p15: regulator-rtmr1-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_1P15"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&tlmm 188 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb1_pwr_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p8: regulator-rtmr1-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_1P8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&tlmm 175 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb1_pwr_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_3p3: regulator-rtmr1-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 186 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb1_pwr_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr2_1p15: regulator-rtmr2-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR2_1P15"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&tlmm 189 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb2_pwr_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr2_1p8: regulator-rtmr2-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR2_1P8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&tlmm 126 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb2_pwr_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr2_3p3: regulator-rtmr2-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR2_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 187 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb2_pwr_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_wcn_3p3: regulator-wcn-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 214 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&wcn_sw_en>; + pinctrl-names =3D "default"; + + regulator-always-on; + }; + + usb-1-ss0-sbu-mux { + compatible =3D "onnn,fsusb42", "gpio-sbu-mux"; + + enable-gpios =3D <&tlmm 168 GPIO_ACTIVE_LOW>; + select-gpios =3D <&tlmm 167 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&usb_1_ss0_sbu_default>; + pinctrl-names =3D "default"; + + mode-switch; + orientation-switch; + + port { + usb_1_ss0_sbu_mux: endpoint { + remote-endpoint =3D <&pmic_glink_ss0_sbu>; + }; + }; + }; + + /* + * TODO: These two regulators are actually part of the removable M.2 + * card and not the CRD mainboard. Need to describe this differently. + * Functionally it works correctly, because all we need to do is to + * turn on the actual 3.3V supply above. + */ + vreg_wcn_0p95: regulator-wcn-0p95 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_0P95"; + regulator-min-microvolt =3D <950000>; + regulator-max-microvolt =3D <950000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + vreg_wcn_1p9: regulator-wcn-1p9 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_1P9"; + regulator-min-microvolt =3D <1900000>; + regulator-max-microvolt =3D <1900000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + vreg_wwan: regulator-wwan { + compatible =3D "regulator-fixed"; + + regulator-name =3D "SDX_VPH_PWR"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 221 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&wwan_sw_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + wcd938x: audio-codec { + compatible =3D "qcom,wcd9385-codec"; + + pinctrl-0 =3D <&wcd_default>; + pinctrl-names =3D "default"; + + reset-gpios =3D <&tlmm 191 GPIO_ACTIVE_LOW>; + + qcom,micbias1-microvolt =3D <1800000>; + qcom,micbias2-microvolt =3D <1800000>; + qcom,micbias3-microvolt =3D <1800000>; + qcom,micbias4-microvolt =3D <1800000>; + qcom,mbhc-buttons-vthreshold-microvolt =3D <75000 150000 237000 500000 + 500000 500000 500000 500000>; + qcom,mbhc-headset-vthreshold-microvolt =3D <1700000>; + qcom,mbhc-headphone-vthreshold-microvolt =3D <50000>; + qcom,rx-device =3D <&wcd_rx>; + qcom,tx-device =3D <&wcd_tx>; + + vdd-buck-supply =3D <&vreg_l15b_1p8>; + vdd-rxtx-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l15b_1p8>; + vdd-mic-bias-supply =3D <&vreg_bob1>; + + #sound-dai-cells =3D <1>; + }; + + wcn7850-pmu { + compatible =3D "qcom,wcn7850-pmu"; + + vdd-supply =3D <&vreg_wcn_0p95>; + vddio-supply =3D <&vreg_l15b_1p8>; + vddaon-supply =3D <&vreg_wcn_0p95>; + vdddig-supply =3D <&vreg_wcn_0p95>; + vddrfa1p2-supply =3D <&vreg_wcn_1p9>; + vddrfa1p8-supply =3D <&vreg_wcn_1p9>; + + bt-enable-gpios =3D <&tlmm 116 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&wcn_bt_en>; + pinctrl-names =3D "default"; + + regulators { + vreg_pmu_rfa_cmn: ldo0 { + regulator-name =3D "vreg_pmu_rfa_cmn"; + }; + + vreg_pmu_aon_0p59: ldo1 { + regulator-name =3D "vreg_pmu_aon_0p59"; + }; + + vreg_pmu_wlcx_0p8: ldo2 { + regulator-name =3D "vreg_pmu_wlcx_0p8"; + }; + + vreg_pmu_wlmx_0p85: ldo3 { + regulator-name =3D "vreg_pmu_wlmx_0p85"; + }; + + vreg_pmu_btcmx_0p85: ldo4 { + regulator-name =3D "vreg_pmu_btcmx_0p85"; + }; + + vreg_pmu_rfa_0p8: ldo5 { + regulator-name =3D "vreg_pmu_rfa_0p8"; + }; + + vreg_pmu_rfa_1p2: ldo6 { + regulator-name =3D "vreg_pmu_rfa_1p2"; + }; + + vreg_pmu_rfa_1p8: ldo7 { + regulator-name =3D "vreg_pmu_rfa_1p8"; + }; + + vreg_pmu_pcie_0p9: ldo8 { + regulator-name =3D "vreg_pmu_pcie_0p9"; + }; + + vreg_pmu_pcie_1p8: ldo9 { + regulator-name =3D "vreg_pmu_pcie_1p8"; + }; + }; + }; +}; + +&gpu { + status =3D "okay"; +}; + +&gpu_zap_shader { + firmware-name =3D "qcom/x1e80100/gen70500_zap.mbn"; +}; + +&i2c1 { + clock-frequency =3D <400000>; + status =3D "okay"; + + typec-mux@8 { + compatible =3D "parade,ps8830"; + reg =3D <0x08>; + + clocks =3D <&rpmhcc RPMH_RF_CLK5>; + + vdd-supply =3D <&vreg_rtmr2_1p15>; + vdd33-supply =3D <&vreg_rtmr2_3p3>; + vdd33-cap-supply =3D <&vreg_rtmr2_3p3>; + vddar-supply =3D <&vreg_rtmr2_1p15>; + vddat-supply =3D <&vreg_rtmr2_1p15>; + vddio-supply =3D <&vreg_rtmr2_1p8>; + + reset-gpios =3D <&tlmm 185 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&rtmr2_default>; + pinctrl-names =3D "default"; + + orientation-switch; + retimer-switch; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + retimer_ss2_ss_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss2_ss_in>; + }; + }; + + port@1 { + reg =3D <1>; + + retimer_ss2_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss2_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + retimer_ss2_con_sbu_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss2_con_sbu_in>; + }; + }; + }; + }; +}; + +&i2c5 { + clock-frequency =3D <400000>; + status =3D "okay"; + + eusb3_repeater: redriver@47 { + compatible =3D "nxp,ptn3222"; + reg =3D <0x47>; + #phy-cells =3D <0>; + + vdd3v3-supply =3D <&vreg_l13b_3p0>; + vdd1v8-supply =3D <&vreg_l4b_1p8>; + + reset-gpios =3D <&tlmm 6 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&eusb3_reset_n>; + pinctrl-names =3D "default"; + }; + + eusb5_repeater: redriver@43 { + compatible =3D "nxp,ptn3222"; + reg =3D <0x43>; + #phy-cells =3D <0>; + + vdd3v3-supply =3D <&vreg_l13b_3p0>; + vdd1v8-supply =3D <&vreg_l4b_1p8>; + + reset-gpios =3D <&tlmm 7 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&eusb5_reset_n>; + pinctrl-names =3D "default"; + }; + + eusb6_repeater: redriver@4f { + compatible =3D "nxp,ptn3222"; + reg =3D <0x4f>; + #phy-cells =3D <0>; + + vdd3v3-supply =3D <&vreg_l13b_3p0>; + vdd1v8-supply =3D <&vreg_l4b_1p8>; + + reset-gpios =3D <&tlmm 184 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&eusb6_reset_n>; + pinctrl-names =3D "default"; + }; +}; + +&i2c7 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + typec-mux@8 { + compatible =3D "parade,ps8830"; + reg =3D <0x8>; + + clocks =3D <&rpmhcc RPMH_RF_CLK4>; + + vdd-supply =3D <&vreg_rtmr1_1p15>; + vdd33-supply =3D <&vreg_rtmr1_3p3>; + vdd33-cap-supply =3D <&vreg_rtmr1_3p3>; + vddar-supply =3D <&vreg_rtmr1_1p15>; + vddat-supply =3D <&vreg_rtmr1_1p15>; + vddio-supply =3D <&vreg_rtmr1_1p8>; + + reset-gpios =3D <&tlmm 176 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&rtmr1_default>; + pinctrl-names =3D "default"; + + retimer-switch; + orientation-switch; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + retimer_ss1_ss_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_ss_in>; + }; + }; + + port@1 { + reg =3D <1>; + + retimer_ss1_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + retimer_ss1_con_sbu_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_con_sbu_in>; + }; + }; + }; + }; +}; + +&lpass_tlmm { + spkr_01_sd_n_active: spkr-01-sd-n-active-state { + pins =3D "gpio12"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + output-low; + }; + + spkr_23_sd_n_active: spkr-23-sd-n-active-state { + pins =3D "gpio13"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + output-low; + }; +}; + +&lpass_vamacro { + pinctrl-0 =3D <&dmic01_default>, <&dmic23_default>; + pinctrl-names =3D "default"; + + vdd-micb-supply =3D <&vreg_l1b_1p8>; + qcom,dmic-sample-rate =3D <4800000>; +}; + +&mdss { + status =3D "okay"; +}; + +&mdss_dp0 { + status =3D "okay"; +}; + +&mdss_dp0_out { + data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp1 { + status =3D "okay"; +}; + +&mdss_dp1_out { + data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp2 { + status =3D "okay"; +}; + +&mdss_dp2_out { + data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp3 { + /delete-property/ #sound-dai-cells; + + status =3D "okay"; + + aux-bus { + panel { + compatible =3D "edp-panel"; + power-supply =3D <&vreg_edp_3p3>; + + port { + edp_panel_in: endpoint { + remote-endpoint =3D <&mdss_dp3_out>; + }; + }; + }; + }; +}; + +&mdss_dp3_out { + data-lanes =3D <0 1 2 3>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; + + remote-endpoint =3D <&edp_panel_in>; +}; + +&mdss_dp3_phy { + vdda-phy-supply =3D <&vreg_l3j_0p8>; + vdda-pll-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&pcie6a { + vddpe-3v3-supply =3D <&vreg_nvme>; +}; + +&pm8550_gpios { + rtmr0_default: rtmr0-reset-n-active-state { + pins =3D "gpio10"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; + + usb0_3p3_reg_en: usb0-3p3-reg-en-state { + pins =3D "gpio11"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; +}; + +&pm8550ve_9_gpios { + usb0_1p8_reg_en: usb0-1p8-reg-en-state { + pins =3D "gpio8"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; +}; + +&pmc8380_5_gpios { + usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state { + pins =3D "gpio8"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; +}; + +&smb2360_0 { + status =3D "okay"; +}; + +&smb2360_0_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l2b_3p0>; +}; + +&smb2360_1 { + status =3D "okay"; +}; + +&smb2360_1_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l14b_3p0>; +}; + +&smb2360_2 { + status =3D "okay"; +}; + +&smb2360_2_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l8b_3p0>; +}; + +&swr0 { + status =3D "okay"; + + pinctrl-0 =3D <&wsa_swr_active>, <&spkr_01_sd_n_active>; + pinctrl-names =3D "default"; + + /* WSA8845, Left Woofer */ + left_woofer: speaker@0,0 { + compatible =3D "sdw20217020400"; + reg =3D <0 0>; + reset-gpios =3D <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "WooferLeft"; + vdd-1p8-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l12b_1p2>; + qcom,port-mapping =3D <1 2 3 7 10 13>; + }; + + /* WSA8845, Left Tweeter */ + left_tweeter: speaker@0,1 { + compatible =3D "sdw20217020400"; + reg =3D <0 1>; + reset-gpios =3D <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "TweeterLeft"; + vdd-1p8-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l12b_1p2>; + qcom,port-mapping =3D <4 5 6 7 11 13>; + }; +}; + +&swr1 { + status =3D "okay"; + + /* WCD9385 RX */ + wcd_rx: codec@0,4 { + compatible =3D "sdw20217010d00"; + reg =3D <0 4>; + qcom,rx-port-mapping =3D <1 2 3 4 5>; + }; +}; + +&swr2 { + status =3D "okay"; + + /* WCD9385 TX */ + wcd_tx: codec@0,3 { + compatible =3D "sdw20217010d00"; + reg =3D <0 3>; + qcom,tx-port-mapping =3D <2 2 3 4>; + }; +}; + +&swr3 { + status =3D "okay"; + + pinctrl-0 =3D <&wsa2_swr_active>, <&spkr_23_sd_n_active>; + pinctrl-names =3D "default"; + + /* WSA8845, Right Woofer */ + right_woofer: speaker@0,0 { + compatible =3D "sdw20217020400"; + reg =3D <0 0>; + reset-gpios =3D <&lpass_tlmm 13 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "WooferRight"; + vdd-1p8-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l12b_1p2>; + qcom,port-mapping =3D <1 2 3 7 10 13>; + }; + + /* WSA8845, Right Tweeter */ + right_tweeter: speaker@0,1 { + compatible =3D "sdw20217020400"; + reg =3D <0 1>; + reset-gpios =3D <&lpass_tlmm 13 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "TweeterRight"; + vdd-1p8-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l12b_1p2>; + qcom,port-mapping =3D <4 5 6 7 11 13>; + }; +}; + +&tlmm { + edp_reg_en: edp-reg-en-state { + pins =3D "gpio70"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + }; + + eusb3_reset_n: eusb3-reset-n-state { + pins =3D "gpio6"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + output-low; + }; + + eusb5_reset_n: eusb5-reset-n-state { + pins =3D "gpio7"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + output-low; + }; + + eusb6_reset_n: eusb6-reset-n-state { + pins =3D "gpio184"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + output-low; + }; + + nvme_reg_en: nvme-reg-en-state { + pins =3D "gpio18"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + rtmr1_default: rtmr1-reset-n-active-state { + pins =3D "gpio176"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + rtmr2_default: rtmr2-reset-n-active-state { + pins =3D "gpio185"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb1_pwr_1p15_reg_en: usb1-pwr-1p15-reg-en-state { + pins =3D "gpio188"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb1_pwr_1p8_reg_en: usb1-pwr-1p8-reg-en-state { + pins =3D "gpio175"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb1_pwr_3p3_reg_en: usb1-pwr-3p3-reg-en-state { + pins =3D "gpio186"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb2_pwr_1p15_reg_en: usb2-pwr-1p15-reg-en-state { + pins =3D "gpio189"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb2_pwr_1p8_reg_en: usb2-pwr-1p8-reg-en-state { + pins =3D "gpio126"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb2_pwr_3p3_reg_en: usb2-pwr-3p3-reg-en-state { + pins =3D "gpio187"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb_1_ss0_sbu_default: usb-1-ss0-sbu-state { + mode-pins { + pins =3D "gpio166"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + output-high; + }; + + oe-n-pins { + pins =3D "gpio168"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + + sel-pins { + pins =3D "gpio167"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + }; + + wcd_default: wcd-reset-n-active-state { + pins =3D "gpio191"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + output-low; + }; + + wcn_bt_en: wcn-bt-en-state { + pins =3D "gpio116"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wwan_sw_en: wwan-sw-en-state { + pins =3D "gpio221"; + function =3D "gpio"; + drive-strength =3D <4>; + bias-disable; + }; + + wcn_sw_en: wcn-sw-en-state { + pins =3D "gpio214"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + /* Switches USB signal routing between the USB connector and the Wi-Fi ca= rd. */ + wcn_usb_sw_n: wcn-usb-sw-n-state { + pins =3D "gpio225"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + output-high; + }; +}; + +&uart14 { + status =3D "okay"; + + bluetooth { + compatible =3D "qcom,wcn7850-bt"; + max-speed =3D <3200000>; + + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p8>; + }; +}; + +&uart21 { + compatible =3D "qcom,geni-debug-uart"; + + status =3D "okay"; +}; + +&usb_1_ss0_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss0_hs_in>; +}; + +&usb_1_ss0_hsphy { + phys =3D <&smb2360_0_eusb2_repeater>; +}; + +&usb_1_ss0_qmpphy_out { + remote-endpoint =3D <&pmic_glink_ss0_ss_in>; +}; + +&usb_1_ss1_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss1_hs_in>; +}; + +&usb_1_ss1_hsphy { + phys =3D <&smb2360_1_eusb2_repeater>; +}; + +&usb_1_ss1_qmpphy_out { + remote-endpoint =3D <&retimer_ss1_ss_in>; +}; + +&usb_1_ss2_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss2_hs_in>; +}; + +&usb_1_ss2_hsphy { + phys =3D <&smb2360_2_eusb2_repeater>; +}; + +&usb_1_ss2_qmpphy_out { + remote-endpoint =3D <&retimer_ss2_ss_in>; +}; + +&usb_2_hsphy { + phys =3D <&eusb5_repeater>; + + pinctrl-0 =3D <&wcn_usb_sw_n>; + pinctrl-names =3D "default"; +}; + +&usb_mp_hsphy0 { + phys =3D <&eusb6_repeater>; +}; + +&usb_mp_hsphy1 { + phys =3D <&eusb3_repeater>; +}; --=20 2.34.1