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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-771f4072ac4sm4323076b3a.34.2025.08.26.21.20.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Aug 2025 21:20:57 -0700 (PDT) From: Jie Gan To: Suzuki K Poulose , Mike Leach , James Clark , Alexander Shishkin , Tingwei Zhang Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 3/3] coresight: tpda: add sysfs node to flush specific port Date: Wed, 27 Aug 2025 12:20:42 +0800 Message-Id: <20250827042042.6786-4-jie.gan@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250827042042.6786-1-jie.gan@oss.qualcomm.com> References: <20250827042042.6786-1-jie.gan@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODIzMDAzNCBTYWx0ZWRfXx0P4ImRJEnHN nzKpL8U83xC/K82/iAC7ddhS+hTteRk0Y1g/0mbzbrPmaxNkouPxW/MtVtdS/Kew19QTMV6Lm9R ttMhVjkVV1zkrGhum1skmGj+OrR2Y1jg/2aZ/VNiXzNS9Q/gzsOvOksizuXtqCMqqUYDye6ohZz 2AkGRzi+DNbqC9EcjYLzkegMZ8/TCBgSE6OhRN2M8QgMCyW8xMNPH66+ZRGKLs+FCE5UGFBLD7Z gV7Mec/jBPI8Fp3bqB4x3dKjq7eW39f9z6/3/WJMUQWWdzrIdgynIVqmUsXttJWG0+8Z5ePfQbb 1S2RIRAin76eTgOrnMxLorEEaA0cCOKioQz57BzUmrN5wiqtp1GYItPEaD2KxJFDRrh7klT1Z0i MqCgOPLX X-Proofpoint-GUID: Ac0iCg-0YYQO7uApZoeasRAri5ls8ndX X-Authority-Analysis: v=2.4 cv=K+AiHzWI c=1 sm=1 tr=0 ts=68ae87ab cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=2OwXVqhp2XgA:10 a=EUspDBNiAAAA:8 a=l6kBNUb3cY0M__Xq7_0A:9 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-ORIG-GUID: Ac0iCg-0YYQO7uApZoeasRAri5ls8ndX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-26_02,2025-08-26_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 bulkscore=0 clxscore=1015 adultscore=0 impostorscore=0 priorityscore=1501 phishscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508230034 Content-Type: text/plain; charset="utf-8" From: Tao Zhang Setting bit i in the TPDA_FLUSH_CR register initiates a flush request for port i, forcing the data to synchronize and be transmitted to the sink device. Signed-off-by: Tao Zhang Co-developed-by: Jie Gan Signed-off-by: Jie Gan --- .../testing/sysfs-bus-coresight-devices-tpda | 7 ++++ drivers/hwtracing/coresight/coresight-tpda.c | 42 +++++++++++++++++++ drivers/hwtracing/coresight/coresight-tpda.h | 2 + 3 files changed, 51 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda b/D= ocumentation/ABI/testing/sysfs-bus-coresight-devices-tpda index fb651aebeb31..2cf2dcfc13c8 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda @@ -41,3 +41,10 @@ Contact: Jinlong Mao , Tao= Zhang /port_flush_req +Date: August 2025 +KernelVersion: 6.17 +Contact: Jinlong Mao , Tao Zhang , Jie Gan +Description: + (RW) Configure the bit i to requests a flush operation of port i on the = TPDA. diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtraci= ng/coresight/coresight-tpda.c index 430f76c559f2..8b1fe128881d 100644 --- a/drivers/hwtracing/coresight/coresight-tpda.c +++ b/drivers/hwtracing/coresight/coresight-tpda.c @@ -487,6 +487,47 @@ static ssize_t cmbchan_mode_store(struct device *dev, } static DEVICE_ATTR_RW(cmbchan_mode); =20 +static ssize_t port_flush_req_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct tpda_drvdata *drvdata =3D dev_get_drvdata(dev->parent); + unsigned long val; + + if (!drvdata->csdev->refcnt) + return -EINVAL; + + guard(spinlock)(&drvdata->spinlock); + CS_UNLOCK(drvdata->base); + val =3D readl_relaxed(drvdata->base + TPDA_FLUSH_CR); + CS_LOCK(drvdata->base); + return sysfs_emit(buf, "%lx\n", val); +} + +static ssize_t port_flush_req_store(struct device *dev, + struct device_attribute *attr, + const char *buf, + size_t size) +{ + struct tpda_drvdata *drvdata =3D dev_get_drvdata(dev->parent); + unsigned long val; + + if (kstrtoul(buf, 0, &val)) + return -EINVAL; + + if (!drvdata->csdev->refcnt || !val) + return -EINVAL; + + val |=3D FIELD_PREP(TPDA_MAX_INPORTS_MASK, val); + guard(spinlock)(&drvdata->spinlock); + CS_UNLOCK(drvdata->base); + writel_relaxed(val, drvdata->base + TPDA_FLUSH_CR); + CS_LOCK(drvdata->base); + + return size; +} +static DEVICE_ATTR_RW(port_flush_req); + static struct attribute *tpda_attrs[] =3D { &dev_attr_trig_async_enable.attr, &dev_attr_trig_flag_ts_enable.attr, @@ -494,6 +535,7 @@ static struct attribute *tpda_attrs[] =3D { &dev_attr_freq_ts_enable.attr, &dev_attr_global_flush_req.attr, &dev_attr_cmbchan_mode.attr, + &dev_attr_port_flush_req.attr, NULL, }; =20 diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtraci= ng/coresight/coresight-tpda.h index 8e1b66115ad1..56d3ad293e46 100644 --- a/drivers/hwtracing/coresight/coresight-tpda.h +++ b/drivers/hwtracing/coresight/coresight-tpda.h @@ -10,6 +10,7 @@ #define TPDA_Pn_CR(n) (0x004 + (n * 4)) #define TPDA_FPID_CR (0x084) #define TPDA_SYNCR (0x08C) +#define TPDA_FLUSH_CR (0x090) =20 /* Cross trigger FREQ packets timestamp bit */ #define TPDA_CR_FREQTS BIT(2) @@ -35,6 +36,7 @@ #define TPDA_SYNCR_MAX_COUNTER_VAL (0xFFF) =20 #define TPDA_MAX_INPORTS 32 +#define TPDA_MAX_INPORTS_MASK GENMASK(31, 0) =20 /* Bits 6 ~ 12 is for atid value */ #define TPDA_CR_ATID GENMASK(12, 6) --=20 2.34.1