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client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SJ1PEPF00001CE5.mail.protection.outlook.com (10.167.242.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.9073.11 via Frontend Transport; Wed, 27 Aug 2025 01:36:07 +0000 Received: from ethanolx7ea3host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 26 Aug 2025 20:36:06 -0500 From: Terry Bowman To: , , , , , , , , , , , , , , , , , CC: , Subject: [PATCH v11 02/23] CXL/AER: Remove CONFIG_PCIEAER_CXL and replace with CONFIG_CXL_RAS Date: Tue, 26 Aug 2025 20:35:17 -0500 Message-ID: <20250827013539.903682-3-terry.bowman@amd.com> X-Mailer: git-send-email 2.51.0.rc2.21.ge5ab6b3e5a In-Reply-To: <20250827013539.903682-1-terry.bowman@amd.com> References: <20250827013539.903682-1-terry.bowman@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CE5:EE_|CH3PR12MB7572:EE_ X-MS-Office365-Filtering-Correlation-Id: 9cf547ee-3428-42cc-76e4-08dde50a1888 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|82310400026|36860700013|1800799024|921020|13003099007; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Aug 2025 01:36:07.9154 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9cf547ee-3428-42cc-76e4-08dde50a1888 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CE5.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7572 Content-Type: text/plain; charset="utf-8" CXL RAS compilation is enabled using CONFIG_CXL_RAS while the AER CXL logic uses CONFIG_PCIEAER_CXL. The 2 share the same dependencies and can be combined. The 2 kernel configs are unnecessary and are problematic for the user because of the duplication. Replace occurrences of CONFIG_PCIEAER_CXL to be CONFIG_CXL_RAS. Update the CONFIG_CXL_RAS Kconfig definition to include dependencies 'PCIEA= ER && CXL_PCI' taken from the CONFIG_PCIEAER_CXL definition. Remove the Kconfig CONFIG_PCIEAER_CXL definition. Signed-off-by: Terry Bowman Reviewed-by: Kuppuswamy Sathyanarayanan --- Changes in v10 -> v11: - New patch --- drivers/pci/pcie/Kconfig | 9 --------- drivers/pci/pcie/aer.c | 2 +- 2 files changed, 1 insertion(+), 10 deletions(-) diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig index 17919b99fa66..207c2deae35f 100644 --- a/drivers/pci/pcie/Kconfig +++ b/drivers/pci/pcie/Kconfig @@ -49,15 +49,6 @@ config PCIEAER_INJECT gotten from: https://github.com/intel/aer-inject.git =20 -config PCIEAER_CXL - bool "PCI Express CXL RAS support" - default y - depends on PCIEAER && CXL_PCI - help - Enables CXL error handling. - - If unsure, say Y. - # # PCI Express ECRC # diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index 70ac66188367..7fe9f883f5c5 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -1086,7 +1086,7 @@ static bool find_source_device(struct pci_dev *parent, return true; } =20 -#ifdef CONFIG_PCIEAER_CXL +#ifdef CONFIG_CXL_RAS =20 /** * pci_aer_unmask_internal_errors - unmask internal errors --=20 2.51.0.rc2.21.ge5ab6b3e5a