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Silva" CC: , , , , , Jorge Marques X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1756297517; l=3377; i=jorge.marques@analog.com; s=20250303; h=from:subject:message-id; bh=juN5SXBzGk5T122jBXFeEPh7Fo9Ytv7XvYPMM6KID7Q=; b=vPJ9YtU6fxX5Pc8p2v8fjRviTMq8nQnv1W9S+Pwhswo61axRLhZ82zEfNE6SxIQWggkpRwvsY nrNtgHhTtLtCVH+MxAgvom/D95LLDDPqBZC/ZV2dH0wPco42l3n8Z+v X-Developer-Key: i=jorge.marques@analog.com; a=ed25519; pk=NUR1IZZMH0Da3QbJ2tBSznSPVfRpuoWdhBzKGSpAdbg= X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODI1MDA3NSBTYWx0ZWRfX2R0Djnj54WPK 4x0h3/MJTF6N6Hg9wL1NkyugTeg4Fyz8XgZUzApzZK7MvLca2rXRWZWiGMJ1zn8uTYftdKo4QH0 I48yyMJ1eZbr/3iogGWeKN3GAwXCb5d+FFdPuYf+fRGcj6rO0f71D9L3uq7EL6lN+8qKQy+SwpZ rrIGxVzh+lGONCCtdSrc19H9MWIrwxJ7LQalQnd5bMnLuRq80IZCRkh3AOLyblmOno5ObnqrumU U4bjmzCddUPQH1UVnoe2RCRL8C+5QQgEjz/zlKWKWKfWmfP8IDOKV11AXTszB3y0fn959+U+NMN ZNdr3AlexmfJLJ50xchg0CWFxeAQx/9qj/Nq5v755fHOxVhStFiB4YP/784XlC9XneX5UpyCIxq 4YCoiuFC X-Proofpoint-ORIG-GUID: vjEFf5yehsyYOUZeaO4Vy_eWLKhfoTNf X-Proofpoint-GUID: vjEFf5yehsyYOUZeaO4Vy_eWLKhfoTNf X-Authority-Analysis: v=2.4 cv=AoXu3P9P c=1 sm=1 tr=0 ts=68aef941 cx=c_pps a=3WNzaoukacrqR9RwcOSAdA==:117 a=3WNzaoukacrqR9RwcOSAdA==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=gEfo2CItAAAA:8 a=wI1k2SEZAAAA:8 a=gAnH3GRIAAAA:8 a=Br2UW1UjAAAA:8 a=cxqr8dddGolBAesk1vsA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=sptkURWiP4Gy88Gu7hUp:22 a=6HWbV-4b7c7AdzY24d_u:22 a=WmXOPjafLNExVIMTj843:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-27_02,2025-08-26_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 priorityscore=1501 malwarescore=0 clxscore=1015 adultscore=0 bulkscore=0 phishscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508250075 Add bindings doc for ADI I3C Controller IP core, a FPGA synthesizable IP core that implements the MIPI I3C Basic controller specification. The IP Core is versioned following Semantic Versioning 2.0.0 and ADI's open-source HDL guidelines for devicetree bindings and drivers. Signed-off-by: Jorge Marques --- .../devicetree/bindings/i3c/adi,i3c-master.yaml | 72 ++++++++++++++++++= ++++ MAINTAINERS | 5 ++ 2 files changed, 77 insertions(+) diff --git a/Documentation/devicetree/bindings/i3c/adi,i3c-master.yaml b/Do= cumentation/devicetree/bindings/i3c/adi,i3c-master.yaml new file mode 100644 index 0000000000000000000000000000000000000000..2498672d2654888525120c44f4f= b74d505535891 --- /dev/null +++ b/Documentation/devicetree/bindings/i3c/adi,i3c-master.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i3c/adi,i3c-master.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices I3C Controller + +description: + FPGA-based I3C controller designed to interface with I3C and I2C periphe= rals, + implementing a subset of the I3C-basic specification. The IP core is tes= ted + on arm, microblaze, and arm64 architectures. + + https://analogdevicesinc.github.io/hdl/library/i3c_controller + +maintainers: + - Jorge Marques + +properties: + compatible: + const: adi,i3c-master-v1 + + reg: + maxItems: 1 + + clocks: + minItems: 1 + items: + - description: The AXI interconnect clock, drives the register map. + - description: + The secondary clock, drives the internal logic asynchronously to= the + register map. The presence of this entry states that the IP Core= was + synthesized with a second clock input, and the absence of this e= ntry + indicates a topology where a single clock input drives all the + internal logic. + + clock-names: + minItems: 1 + items: + - const: axi + - const: i3c + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + +allOf: + - $ref: i3c.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + + i3c@44a00000 { + compatible =3D "adi,i3c-master-v1"; + reg =3D <0x44a00000 0x1000>; + interrupts =3D <3 IRQ_TYPE_LEVEL_HIGH>; + clocks =3D <&clkc 15>, <&clkc 15>; + clock-names =3D "axi", "i3c"; + #address-cells =3D <3>; + #size-cells =3D <0>; + + /* I3C and I2C devices */ + }; diff --git a/MAINTAINERS b/MAINTAINERS index 35ed8498ab1e9b92b4bce5db9bb64004d80e4b1a..faa50535b514037ddf97309874e= c64aac2013cb6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11452,6 +11452,11 @@ S: Maintained F: Documentation/devicetree/bindings/i3c/aspeed,ast2600-i3c.yaml F: drivers/i3c/master/ast2600-i3c-master.c =20 +I3C DRIVER FOR ANALOG DEVICES I3C CONTROLLER IP +M: Jorge Marques +S: Maintained +F: Documentation/devicetree/bindings/i3c/adi,i3c-master.yaml + I3C DRIVER FOR CADENCE I3C MASTER IP M: Przemys=C5=82aw Gaj S: Maintained --=20 2.49.0