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Tue, 26 Aug 2025 14:24:18 -0700 (PDT) From: Rosen Penev To: linux-spi@vger.kernel.org Cc: Mark Brown , j4g8y7@gmail.com, linux-kernel@vger.kernel.org (open list) Subject: [PATCHv2 2/3] spi: rb4xx: add COMPILE_TEST support Date: Tue, 26 Aug 2025 14:24:12 -0700 Message-ID: <20250826212413.15065-3-rosenp@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250826212413.15065-1-rosenp@gmail.com> References: <20250826212413.15065-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Copy macros from ath79 SPI driver to allow compilation on all platforms and remove ath79 specific header. Signed-off-by: Rosen Penev --- drivers/spi/Kconfig | 2 +- drivers/spi/spi-rb4xx.c | 19 ++++++++++++++----- 2 files changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index cdeaa8e711fd..f7020d35b3a5 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -916,7 +916,7 @@ config SPI_ROCKCHIP_SFC =20 config SPI_RB4XX tristate "Mikrotik RB4XX SPI master" - depends on SPI_MASTER && ATH79 + depends on SPI_MASTER && (ATH79 || COMPILE_TEST) depends on OF help SPI controller driver for the Mikrotik RB4xx series boards. diff --git a/drivers/spi/spi-rb4xx.c b/drivers/spi/spi-rb4xx.c index a795e263299e..bae802e94226 100644 --- a/drivers/spi/spi-rb4xx.c +++ b/drivers/spi/spi-rb4xx.c @@ -16,7 +16,16 @@ #include #include =20 -#include +#define AR71XX_SPI_REG_FS 0x00 /* Function Select */ +#define AR71XX_SPI_REG_CTRL 0x04 /* SPI Control */ +#define AR71XX_SPI_REG_IOC 0x08 /* SPI I/O Control */ +#define AR71XX_SPI_REG_RDS 0x0c /* Read Data Shift */ + +#define AR71XX_SPI_FS_GPIO BIT(0) /* Enable GPIO mode */ + +#define AR71XX_SPI_IOC_DO BIT(0) /* Data Out pin */ +#define AR71XX_SPI_IOC_CLK BIT(8) /* CLK pin */ +#define AR71XX_SPI_IOC_CS(n) BIT(16 + (n)) =20 struct rb4xx_spi { void __iomem *base; @@ -63,7 +72,7 @@ static inline void do_spi_clk_two(struct rb4xx_spi *rbspi= , u32 spi_ioc, if (value & BIT(1)) regval |=3D AR71XX_SPI_IOC_DO; if (value & BIT(0)) - regval |=3D AR71XX_SPI_IOC_CS2; + regval |=3D AR71XX_SPI_IOC_CS(2); =20 rb4xx_write(rbspi, AR71XX_SPI_REG_IOC, regval); rb4xx_write(rbspi, AR71XX_SPI_REG_IOC, regval | AR71XX_SPI_IOC_CLK); @@ -89,7 +98,7 @@ static void rb4xx_set_cs(struct spi_device *spi, bool ena= ble) */ if (enable) rb4xx_write(rbspi, AR71XX_SPI_REG_IOC, - AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1); + AR71XX_SPI_IOC_CS(0) | AR71XX_SPI_IOC_CS(1)); } =20 static int rb4xx_transfer_one(struct spi_controller *host, @@ -109,10 +118,10 @@ static int rb4xx_transfer_one(struct spi_controller *= host, */ if (spi_get_chipselect(spi, 0) =3D=3D 2) /* MMC */ - spi_ioc =3D AR71XX_SPI_IOC_CS0; + spi_ioc =3D AR71XX_SPI_IOC_CS(0); else /* Boot flash and CPLD */ - spi_ioc =3D AR71XX_SPI_IOC_CS1; + spi_ioc =3D AR71XX_SPI_IOC_CS(1); =20 tx_buf =3D t->tx_buf; rx_buf =3D t->rx_buf; --=20 2.50.1