From nobody Fri Oct 3 20:27:24 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 32C5B2F7475; Tue, 26 Aug 2025 07:18:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756192718; cv=none; b=DZD/qRTj2aA7ww0EQAN18+Dg2crjNkw2qqubxMhHE0JG96z1DMHe8+CnJyvPg4gPXeFcuaz5BW6n9LFJREiQDrXRDIMUpWcGLRDewm6wfNIdk5CzovggE8PgSP9qiaLxz7FVE/UVHuUSOcOa9rV0vczNR/VOh+pB/huBbhnkj/Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756192718; c=relaxed/simple; bh=/xvWwbXNZdVdd8LbcSqP/I7FgHVp4m5GJ6D0r5nbaTo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Kg59VlHqUNMi22VKSffDqIHsSLUrqerzDCVmNY4bK7UEZNqw9bU01uG1pCRnvvsswnEdTKkzLrcKUt3moROMa8TfRLRoDb/tk9+YAEu91Hcoca7i4Hmjq023k6Wvky7rXLROhcOkx2r3p9RaltCnb6pTcfkWBvRqz0Ss+2bJoXs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=E/4ibi8z; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="E/4ibi8z" Received: by smtp.kernel.org (Postfix) with ESMTPS id 8E5CEC2BCB9; Tue, 26 Aug 2025 07:18:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1756192717; bh=/xvWwbXNZdVdd8LbcSqP/I7FgHVp4m5GJ6D0r5nbaTo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=E/4ibi8zL2z74uGhw3+LfDXmVgp6QxhMW5CcUKFGiznOcxwhgJrPfnEWRLppyvU+C ADggs7+IpKAYVocOmEGVweSR020K2KUnnLfP+3N6cMI20XQSom7gUKSFYnMFRP+aDT qjr5Mt91bvxIP9quSNz0rXwm4jeWMAeYYRyNpKUlCbkpf9xcu+cxx72ymMQOyABgpR +HPmBoUZ4PYjHmG57ojs/f9it+2E0UaKdfgjRRWBb/VJ83hJwUIWRbOU/Xlrdw4Tjj gyGSRCG4Utev2Lh2Iv/UI1oYAArS3rHp1RG5+/7ZxvqAw5dT3AbzcAldg6L5gSuHWP F/3QwxbpGV9zA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84C59CA0FF0; Tue, 26 Aug 2025 07:18:37 +0000 (UTC) From: Fenglin Wu via B4 Relay Date: Tue, 26 Aug 2025 15:18:34 +0800 Subject: [PATCH v3 7/8] power: supply: qcom_battmgr: Add charge control support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250826-qcom_battmgr_update-v3-7-74ea410ef146@oss.qualcomm.com> References: <20250826-qcom_battmgr_update-v3-0-74ea410ef146@oss.qualcomm.com> In-Reply-To: <20250826-qcom_battmgr_update-v3-0-74ea410ef146@oss.qualcomm.com> To: Sebastian Reichel , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heikki Krogerus , Greg Kroah-Hartman , Dmitry Baryshkov , Bryan O'Donoghue , Konrad Dybcio Cc: Subbaraman Narayanamurthy , David Collins , =?utf-8?q?Gy=C3=B6rgy_Kurucz?= , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, kernel@oss.qualcomm.com, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, Fenglin Wu X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1756192715; l=16265; i=fenglin.wu@oss.qualcomm.com; s=20240327; h=from:subject:message-id; bh=XLZOvcmHE6RROkhLWhnjCbOoiqF7//GLRnH4lRYpZYs=; b=ZNlYBz7/oigSGbX9g34JWCAUwfrfpZq7WFs6gdeh+Fqcbpb69hIzPPRaIPtl8N8nhUVuYOzJg 733DkvBS9EHBB5hpMXL2VaFB+cldw7nxZ+VYUGtFYXISIUjjsXoky14 X-Developer-Key: i=fenglin.wu@oss.qualcomm.com; a=ed25519; pk=BF8SA4IVDk8/EBCwlBehKtn2hp6kipuuAuDAHh9s+K4= X-Endpoint-Received: by B4 Relay for fenglin.wu@oss.qualcomm.com/20240327 with auth_id=406 X-Original-From: Fenglin Wu Reply-To: fenglin.wu@oss.qualcomm.com From: Fenglin Wu Add charge control support for SM8550 and X1E80100. It's supported with below two power supply properties: charge_control_end_threshold: The battery SoC (State of Charge) threshold at which the charging should be terminated. charge_control_start_threshold: The battery SoC threshold at which the charging should be resumed. Signed-off-by: Fenglin Wu Reviewed-by: Neil Armstrong --- drivers/power/supply/qcom_battmgr.c | 290 ++++++++++++++++++++++++++++++++= +++- 1 file changed, 283 insertions(+), 7 deletions(-) diff --git a/drivers/power/supply/qcom_battmgr.c b/drivers/power/supply/qco= m_battmgr.c index 174d3f83ac2b070bb90c21a498686e91cc629ebe..23c68eb942f1b213f634e31a454= 20b3e113e2764 100644 --- a/drivers/power/supply/qcom_battmgr.c +++ b/drivers/power/supply/qcom_battmgr.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -68,6 +69,9 @@ enum qcom_battmgr_variant { #define BATT_RESISTANCE 21 #define BATT_POWER_NOW 22 #define BATT_POWER_AVG 23 +#define BATT_CHG_CTRL_EN 24 +#define BATT_CHG_CTRL_START_THR 25 +#define BATT_CHG_CTRL_END_THR 26 =20 #define BATTMGR_USB_PROPERTY_GET 0x32 #define BATTMGR_USB_PROPERTY_SET 0x33 @@ -92,6 +96,13 @@ enum qcom_battmgr_variant { #define WLS_TYPE 5 #define WLS_BOOST_EN 6 =20 +#define BATTMGR_CHG_CTRL_LIMIT_EN 0x48 +#define CHARGE_CTRL_START_THR_MIN 50 +#define CHARGE_CTRL_START_THR_MAX 95 +#define CHARGE_CTRL_END_THR_MIN 55 +#define CHARGE_CTRL_END_THR_MAX 100 +#define CHARGE_CTRL_DELTA_SOC 5 + struct qcom_battmgr_enable_request { struct pmic_glink_hdr hdr; __le32 battery_id; @@ -126,6 +137,13 @@ struct qcom_battmgr_discharge_time_request { __le32 reserved; }; =20 +struct qcom_battmgr_charge_ctrl_request { + struct pmic_glink_hdr hdr; + __le32 enable; + __le32 target_soc; + __le32 delta_soc; +}; + struct qcom_battmgr_message { struct pmic_glink_hdr hdr; union { @@ -238,6 +256,8 @@ struct qcom_battmgr_info { unsigned int capacity_warning; unsigned int cycle_count; unsigned int charge_count; + unsigned int charge_ctrl_start; + unsigned int charge_ctrl_end; char model_number[BATTMGR_STRING_LEN]; char serial_number[BATTMGR_STRING_LEN]; char oem_info[BATTMGR_STRING_LEN]; @@ -426,6 +446,8 @@ static const u8 sm8350_bat_prop_map[] =3D { [POWER_SUPPLY_PROP_INTERNAL_RESISTANCE] =3D BATT_RESISTANCE, [POWER_SUPPLY_PROP_STATE_OF_HEALTH] =3D BATT_SOH, [POWER_SUPPLY_PROP_POWER_NOW] =3D BATT_POWER_NOW, + [POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD] =3D BATT_CHG_CTRL_STAR= T_THR, + [POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD] =3D BATT_CHG_CTRL_END_TH= R, }; =20 static int qcom_battmgr_bat_sm8350_update(struct qcom_battmgr *battmgr, @@ -496,7 +518,8 @@ static int qcom_battmgr_bat_get_property(struct power_s= upply *psy, if (!battmgr->service_up) return -EAGAIN; =20 - if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP) + if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP || + battmgr->variant =3D=3D QCOM_BATTMGR_X1E80100) ret =3D qcom_battmgr_bat_sc8280xp_update(battmgr, psp); else ret =3D qcom_battmgr_bat_sm8350_update(battmgr, psp); @@ -601,6 +624,12 @@ static int qcom_battmgr_bat_get_property(struct power_= supply *psy, case POWER_SUPPLY_PROP_TIME_TO_FULL_AVG: val->intval =3D battmgr->status.charge_time; break; + case POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD: + val->intval =3D battmgr->info.charge_ctrl_start; + break; + case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD: + val->intval =3D battmgr->info.charge_ctrl_end; + break; case POWER_SUPPLY_PROP_MANUFACTURE_YEAR: val->intval =3D battmgr->info.year; break; @@ -626,6 +655,149 @@ static int qcom_battmgr_bat_get_property(struct power= _supply *psy, return 0; } =20 +static int qcom_battmgr_set_charge_control(struct qcom_battmgr *battmgr, + u32 target_soc, u32 delta_soc) +{ + struct qcom_battmgr_charge_ctrl_request request =3D { + .hdr.owner =3D cpu_to_le32(PMIC_GLINK_OWNER_BATTMGR), + .hdr.type =3D cpu_to_le32(PMIC_GLINK_REQ_RESP), + .hdr.opcode =3D cpu_to_le32(BATTMGR_CHG_CTRL_LIMIT_EN), + .enable =3D cpu_to_le32(1), + .target_soc =3D cpu_to_le32(target_soc), + .delta_soc =3D cpu_to_le32(delta_soc), + }; + + return qcom_battmgr_request(battmgr, &request, sizeof(request)); +} + +static int qcom_battmgr_set_charge_start_threshold(struct qcom_battmgr *ba= ttmgr, int start_soc) +{ + u32 target_soc, delta_soc; + int ret; + + if (start_soc < CHARGE_CTRL_START_THR_MIN || + start_soc > CHARGE_CTRL_START_THR_MAX) { + dev_err(battmgr->dev, "charge control start threshold exceed range: [%u = - %u]\n", + CHARGE_CTRL_START_THR_MIN, CHARGE_CTRL_START_THR_MAX); + return -EINVAL; + } + + /* + * If the new start threshold is larger than the old end threshold, + * move the end threshold one step (DELTA_SOC) after the new start + * threshold. + */ + if (start_soc > battmgr->info.charge_ctrl_end) { + target_soc =3D start_soc + CHARGE_CTRL_DELTA_SOC; + target_soc =3D min_t(u32, target_soc, CHARGE_CTRL_END_THR_MAX); + delta_soc =3D target_soc - start_soc; + delta_soc =3D min_t(u32, delta_soc, CHARGE_CTRL_DELTA_SOC); + } else { + target_soc =3D battmgr->info.charge_ctrl_end; + delta_soc =3D battmgr->info.charge_ctrl_end - start_soc; + } + + mutex_lock(&battmgr->lock); + ret =3D qcom_battmgr_set_charge_control(battmgr, target_soc, delta_soc); + mutex_unlock(&battmgr->lock); + if (!ret) { + battmgr->info.charge_ctrl_start =3D start_soc; + battmgr->info.charge_ctrl_end =3D target_soc; + } + + return 0; +} + +static int qcom_battmgr_set_charge_end_threshold(struct qcom_battmgr *batt= mgr, int end_soc) +{ + u32 delta_soc =3D CHARGE_CTRL_DELTA_SOC; + int ret; + + if (end_soc < CHARGE_CTRL_END_THR_MIN || + end_soc > CHARGE_CTRL_END_THR_MAX) { + dev_err(battmgr->dev, "charge control end threshold exceed range: [%u - = %u]\n", + CHARGE_CTRL_END_THR_MIN, CHARGE_CTRL_END_THR_MAX); + return -EINVAL; + } + + if (battmgr->info.charge_ctrl_start && end_soc > battmgr->info.charge_ctr= l_start) + delta_soc =3D end_soc - battmgr->info.charge_ctrl_start; + + mutex_lock(&battmgr->lock); + ret =3D qcom_battmgr_set_charge_control(battmgr, end_soc, delta_soc); + mutex_unlock(&battmgr->lock); + if (!ret) { + battmgr->info.charge_ctrl_start =3D end_soc - delta_soc; + battmgr->info.charge_ctrl_end =3D end_soc; + } + + return 0; +} + +static int qcom_battmgr_charge_control_thresholds_init(struct qcom_battmgr= *battmgr) +{ + int ret; + u8 en, end_soc, start_soc, delta_soc; + + ret =3D nvmem_cell_read_u8(battmgr->dev->parent, "charge_limit_en", &en); + if (!ret && en !=3D 0) { + ret =3D nvmem_cell_read_u8(battmgr->dev->parent, "charge_limit_end", &en= d_soc); + if (ret < 0) + return ret; + + ret =3D nvmem_cell_read_u8(battmgr->dev->parent, "charge_limit_delta", &= delta_soc); + if (ret < 0) + return ret; + + if (delta_soc >=3D end_soc) + return -EINVAL; + + start_soc =3D end_soc - delta_soc; + end_soc =3D clamp(end_soc, CHARGE_CTRL_END_THR_MIN, CHARGE_CTRL_END_THR_= MAX); + start_soc =3D clamp(start_soc, CHARGE_CTRL_START_THR_MIN, CHARGE_CTRL_ST= ART_THR_MAX); + + battmgr->info.charge_ctrl_start =3D start_soc; + battmgr->info.charge_ctrl_end =3D end_soc; + } + + return 0; +} + +static int qcom_battmgr_bat_is_writeable(struct power_supply *psy, + enum power_supply_property psp) +{ + switch (psp) { + case POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD: + case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD: + return 1; + default: + return 0; + } + + return 0; +} + +static int qcom_battmgr_bat_set_property(struct power_supply *psy, + enum power_supply_property psp, + const union power_supply_propval *pval) +{ + struct qcom_battmgr *battmgr =3D power_supply_get_drvdata(psy); + + if (!battmgr->service_up) + return -EAGAIN; + + switch (psp) { + case POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD: + return qcom_battmgr_set_charge_start_threshold(battmgr, pval->intval); + case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD: + return qcom_battmgr_set_charge_end_threshold(battmgr, pval->intval); + default: + return -EINVAL; + } + + return 0; +} + static const enum power_supply_property sc8280xp_bat_props[] =3D { POWER_SUPPLY_PROP_STATUS, POWER_SUPPLY_PROP_PRESENT, @@ -659,6 +831,43 @@ static const struct power_supply_desc sc8280xp_bat_psy= _desc =3D { .get_property =3D qcom_battmgr_bat_get_property, }; =20 +static const enum power_supply_property x1e80100_bat_props[] =3D { + POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_PRESENT, + POWER_SUPPLY_PROP_TECHNOLOGY, + POWER_SUPPLY_PROP_CYCLE_COUNT, + POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, + POWER_SUPPLY_PROP_VOLTAGE_NOW, + POWER_SUPPLY_PROP_POWER_NOW, + POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, + POWER_SUPPLY_PROP_CHARGE_FULL, + POWER_SUPPLY_PROP_CHARGE_EMPTY, + POWER_SUPPLY_PROP_CHARGE_NOW, + POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN, + POWER_SUPPLY_PROP_ENERGY_FULL, + POWER_SUPPLY_PROP_ENERGY_EMPTY, + POWER_SUPPLY_PROP_ENERGY_NOW, + POWER_SUPPLY_PROP_TEMP, + POWER_SUPPLY_PROP_MANUFACTURE_YEAR, + POWER_SUPPLY_PROP_MANUFACTURE_MONTH, + POWER_SUPPLY_PROP_MANUFACTURE_DAY, + POWER_SUPPLY_PROP_MODEL_NAME, + POWER_SUPPLY_PROP_MANUFACTURER, + POWER_SUPPLY_PROP_SERIAL_NUMBER, + POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD, + POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD, +}; + +static const struct power_supply_desc x1e80100_bat_psy_desc =3D { + .name =3D "qcom-battmgr-bat", + .type =3D POWER_SUPPLY_TYPE_BATTERY, + .properties =3D x1e80100_bat_props, + .num_properties =3D ARRAY_SIZE(x1e80100_bat_props), + .get_property =3D qcom_battmgr_bat_get_property, + .set_property =3D qcom_battmgr_bat_set_property, + .property_is_writeable =3D qcom_battmgr_bat_is_writeable, +}; + static const enum power_supply_property sm8350_bat_props[] =3D { POWER_SUPPLY_PROP_STATUS, POWER_SUPPLY_PROP_HEALTH, @@ -691,6 +900,42 @@ static const struct power_supply_desc sm8350_bat_psy_d= esc =3D { .get_property =3D qcom_battmgr_bat_get_property, }; =20 +static const enum power_supply_property sm8550_bat_props[] =3D { + POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_HEALTH, + POWER_SUPPLY_PROP_PRESENT, + POWER_SUPPLY_PROP_CHARGE_TYPE, + POWER_SUPPLY_PROP_CAPACITY, + POWER_SUPPLY_PROP_VOLTAGE_OCV, + POWER_SUPPLY_PROP_VOLTAGE_NOW, + POWER_SUPPLY_PROP_VOLTAGE_MAX, + POWER_SUPPLY_PROP_CURRENT_NOW, + POWER_SUPPLY_PROP_TEMP, + POWER_SUPPLY_PROP_TECHNOLOGY, + POWER_SUPPLY_PROP_CHARGE_COUNTER, + POWER_SUPPLY_PROP_CYCLE_COUNT, + POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, + POWER_SUPPLY_PROP_CHARGE_FULL, + POWER_SUPPLY_PROP_MODEL_NAME, + POWER_SUPPLY_PROP_TIME_TO_FULL_AVG, + POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG, + POWER_SUPPLY_PROP_INTERNAL_RESISTANCE, + POWER_SUPPLY_PROP_STATE_OF_HEALTH, + POWER_SUPPLY_PROP_POWER_NOW, + POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD, + POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD, +}; + +static const struct power_supply_desc sm8550_bat_psy_desc =3D { + .name =3D "qcom-battmgr-bat", + .type =3D POWER_SUPPLY_TYPE_BATTERY, + .properties =3D sm8550_bat_props, + .num_properties =3D ARRAY_SIZE(sm8550_bat_props), + .get_property =3D qcom_battmgr_bat_get_property, + .set_property =3D qcom_battmgr_bat_set_property, + .property_is_writeable =3D qcom_battmgr_bat_is_writeable, +}; + static int qcom_battmgr_ac_get_property(struct power_supply *psy, enum power_supply_property psp, union power_supply_propval *val) @@ -766,7 +1011,8 @@ static int qcom_battmgr_usb_get_property(struct power_= supply *psy, if (!battmgr->service_up) return -EAGAIN; =20 - if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP) + if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP || + battmgr->variant =3D=3D QCOM_BATTMGR_X1E80100) ret =3D qcom_battmgr_bat_sc8280xp_update(battmgr, psp); else ret =3D qcom_battmgr_usb_sm8350_update(battmgr, psp); @@ -888,7 +1134,8 @@ static int qcom_battmgr_wls_get_property(struct power_= supply *psy, if (!battmgr->service_up) return -EAGAIN; =20 - if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP) + if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP || + battmgr->variant =3D=3D QCOM_BATTMGR_X1E80100) ret =3D qcom_battmgr_bat_sc8280xp_update(battmgr, psp); else ret =3D qcom_battmgr_wls_sm8350_update(battmgr, psp); @@ -1085,6 +1332,9 @@ static void qcom_battmgr_sc8280xp_callback(struct qco= m_battmgr *battmgr, case BATTMGR_BAT_CHARGE_TIME: battmgr->status.charge_time =3D le32_to_cpu(resp->time); break; + case BATTMGR_CHG_CTRL_LIMIT_EN: + battmgr->error =3D 0; + break; default: dev_warn(battmgr->dev, "unknown message %#x\n", opcode); break; @@ -1198,6 +1448,12 @@ static void qcom_battmgr_sm8350_callback(struct qcom= _battmgr *battmgr, case BATT_POWER_NOW: battmgr->status.power_now =3D le32_to_cpu(resp->intval.value); break; + case BATT_CHG_CTRL_START_THR: + battmgr->info.charge_ctrl_start =3D le32_to_cpu(resp->intval.value); + break; + case BATT_CHG_CTRL_END_THR: + battmgr->info.charge_ctrl_end =3D le32_to_cpu(resp->intval.value); + break; default: dev_warn(battmgr->dev, "unknown property %#x\n", property); break; @@ -1280,6 +1536,7 @@ static void qcom_battmgr_sm8350_callback(struct qcom_= battmgr *battmgr, } break; case BATTMGR_REQUEST_NOTIFICATION: + case BATTMGR_CHG_CTRL_LIMIT_EN: battmgr->error =3D 0; break; default: @@ -1299,7 +1556,8 @@ static void qcom_battmgr_callback(const void *data, s= ize_t len, void *priv) =20 if (opcode =3D=3D BATTMGR_NOTIFICATION) qcom_battmgr_notification(battmgr, data, len); - else if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP) + else if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP || + battmgr->variant =3D=3D QCOM_BATTMGR_X1E80100) qcom_battmgr_sc8280xp_callback(battmgr, data, len); else qcom_battmgr_sm8350_callback(battmgr, data, len); @@ -1346,11 +1604,13 @@ static char *qcom_battmgr_battery[] =3D { "battery"= }; static int qcom_battmgr_probe(struct auxiliary_device *adev, const struct auxiliary_device_id *id) { + const struct power_supply_desc *psy_desc; struct power_supply_config psy_cfg_supply =3D {}; struct power_supply_config psy_cfg =3D {}; const struct of_device_id *match; struct qcom_battmgr *battmgr; struct device *dev =3D &adev->dev; + int ret; =20 battmgr =3D devm_kzalloc(dev, sizeof(*battmgr), GFP_KERNEL); if (!battmgr) @@ -1376,8 +1636,19 @@ static int qcom_battmgr_probe(struct auxiliary_devic= e *adev, else battmgr->variant =3D QCOM_BATTMGR_SM8350; =20 - if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP) { - battmgr->bat_psy =3D devm_power_supply_register(dev, &sc8280xp_bat_psy_d= esc, &psy_cfg); + ret =3D qcom_battmgr_charge_control_thresholds_init(battmgr); + if (ret < 0) + return dev_err_probe(dev, ret, + "failed to init battery charge control thresholds\n"); + + if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP || + battmgr->variant =3D=3D QCOM_BATTMGR_X1E80100) { + if (battmgr->variant =3D=3D QCOM_BATTMGR_X1E80100) + psy_desc =3D &x1e80100_bat_psy_desc; + else + psy_desc =3D &sc8280xp_bat_psy_desc; + + battmgr->bat_psy =3D devm_power_supply_register(dev, psy_desc, &psy_cfg); if (IS_ERR(battmgr->bat_psy)) return dev_err_probe(dev, PTR_ERR(battmgr->bat_psy), "failed to register battery power supply\n"); @@ -1397,7 +1668,12 @@ static int qcom_battmgr_probe(struct auxiliary_devic= e *adev, return dev_err_probe(dev, PTR_ERR(battmgr->wls_psy), "failed to register wireless charing power supply\n"); } else { - battmgr->bat_psy =3D devm_power_supply_register(dev, &sm8350_bat_psy_des= c, &psy_cfg); + if (battmgr->variant =3D=3D QCOM_BATTMGR_SM8550) + psy_desc =3D &sm8550_bat_psy_desc; + else + psy_desc =3D &sm8350_bat_psy_desc; + + battmgr->bat_psy =3D devm_power_supply_register(dev, psy_desc, &psy_cfg); if (IS_ERR(battmgr->bat_psy)) return dev_err_probe(dev, PTR_ERR(battmgr->bat_psy), "failed to register battery power supply\n"); --=20 2.34.1