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It is loaded on the sec2 falcon core and is responsible for loading and running the RISC-V GSP bootloader into the GSP core. Add support for parsing the Booter firmware loaded from userspace, patch its signatures, and store it into a form that is ready to be loaded and executed on the sec2 falcon. We do not run it yet, as its own payload (the GSP bootloader and firmware image) still need to be prepared. Signed-off-by: Alexandre Courbot --- drivers/gpu/nova-core/falcon.rs | 4 +- drivers/gpu/nova-core/firmware.rs | 25 ++- drivers/gpu/nova-core/firmware/booter.rs | 356 +++++++++++++++++++++++++++= ++++ drivers/gpu/nova-core/gpu.rs | 11 +- 4 files changed, 386 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon= .rs index 2dbcdf26697beb7e52083675fc9ea62a6167fef8..7bd13481a6a37783309c2d2621a= 6b67b81d55cc5 100644 --- a/drivers/gpu/nova-core/falcon.rs +++ b/drivers/gpu/nova-core/falcon.rs @@ -293,7 +293,7 @@ pub(crate) trait FalconEngine: } =20 /// Represents a portion of the firmware to be loaded into a particular me= mory (e.g. IMEM or DMEM). -#[derive(Debug)] +#[derive(Debug, Clone)] pub(crate) struct FalconLoadTarget { /// Offset from the start of the source object to copy from. pub(crate) src_start: u32, @@ -304,7 +304,7 @@ pub(crate) struct FalconLoadTarget { } =20 /// Parameters for the falcon boot ROM. -#[derive(Debug)] +#[derive(Debug, Clone)] pub(crate) struct FalconBromParams { /// Offset in `DMEM`` of the firmware's signature. pub(crate) pkc_data_offset: u32, diff --git a/drivers/gpu/nova-core/firmware.rs b/drivers/gpu/nova-core/firm= ware.rs index ccb4d19f8fa76b0e844252dede5f50b37c590571..be190af1e11aec26c18c85324a1= 85d135a16eabe 100644 --- a/drivers/gpu/nova-core/firmware.rs +++ b/drivers/gpu/nova-core/firmware.rs @@ -6,6 +6,7 @@ use core::marker::PhantomData; use core::mem::size_of; =20 +use booter::BooterFirmware; use kernel::device; use kernel::firmware; use kernel::prelude::*; @@ -13,10 +14,13 @@ use kernel::transmute::FromBytes; =20 use crate::dma::DmaObject; +use crate::driver::Bar0; use crate::falcon::FalconFirmware; +use crate::falcon::{sec2::Sec2, Falcon}; use crate::gpu; use crate::gpu::Chipset; =20 +pub(crate) mod booter; pub(crate) mod fwsec; =20 pub(crate) const FIRMWARE_VERSION: &str =3D "535.113.01"; @@ -24,14 +28,22 @@ /// Structure encapsulating the firmware blobs required for the GPU to ope= rate. #[expect(dead_code)] pub(crate) struct Firmware { - booter_load: firmware::Firmware, - booter_unload: firmware::Firmware, + /// Runs on the sec2 falcon engine to load and start the GSP bootloade= r. + booter_loader: BooterFirmware, + /// Runs on the sec2 falcon engine to stop and unload a running GSP fi= rmware. + booter_unloader: BooterFirmware, bootloader: firmware::Firmware, gsp: firmware::Firmware, } =20 impl Firmware { - pub(crate) fn new(dev: &device::Device, chipset: Chipset, ver: &str) -= > Result { + pub(crate) fn new( + dev: &device::Device, + sec2: &Falcon, + bar: &Bar0, + chipset: Chipset, + ver: &str, + ) -> Result { let mut chip_name =3D CString::try_from_fmt(fmt!("{chipset}"))?; chip_name.make_ascii_lowercase(); let chip_name =3D &*chip_name; @@ -42,8 +54,10 @@ pub(crate) fn new(dev: &device::Device, chipset: Chipset= , ver: &str) -> Result { fw: &'a [u8], } =20 -#[expect(dead_code)] impl<'a> BinFirmware<'a> { /// Interpret `fw` as a firmware image starting with a [`BinHdr`], and= returns the /// corresponding [`BinFirmware`] that can be used to extract its payl= oad. diff --git a/drivers/gpu/nova-core/firmware/booter.rs b/drivers/gpu/nova-co= re/firmware/booter.rs new file mode 100644 index 0000000000000000000000000000000000000000..108649bdf716eeacaae3098b3c2= 9b2de2813c6ee --- /dev/null +++ b/drivers/gpu/nova-core/firmware/booter.rs @@ -0,0 +1,356 @@ +// SPDX-License-Identifier: GPL-2.0 + +//! Support for loading and patching the `Booter` firmware. `Booter` is a = Heavy Secured firmware +//! running on [`Sec2`], that is used on Turing/Ampere to load the GSP fir= mware into the GSP falcon +//! (and optionally unload it through a separate firmware image). + +use core::marker::PhantomData; +use core::mem::size_of; +use core::ops::Deref; + +use kernel::device; +use kernel::firmware::Firmware; +use kernel::prelude::*; +use kernel::transmute::FromBytes; + +use crate::dma::DmaObject; +use crate::driver::Bar0; +use crate::falcon::sec2::Sec2; +use crate::falcon::{Falcon, FalconBromParams, FalconFirmware, FalconLoadPa= rams, FalconLoadTarget}; +use crate::firmware::{BinFirmware, FirmwareDmaObject, FirmwareSignature, S= igned, Unsigned}; + +/// Local convenience function to return a copy of `S` by reinterpreting t= he bytes starting at +/// `offset` in `slice`. +fn frombytes_at(slice: &[u8], offset: usize) -> Resu= lt { + slice + .get(offset..offset + size_of::()) + .and_then(S::from_bytes_copy) + .ok_or(EINVAL) +} + +/// Heavy-Secured firmware header. +/// +/// Such firmwares have an application-specific payload that needs to be p= atched with a given +/// signature. +#[repr(C)] +#[derive(Debug, Clone)] +struct HsHeaderV2 { + /// Offset to the start of the signatures. + sig_prod_offset: u32, + /// Size in bytes of the signatures. + sig_prod_size: u32, + /// Offset to a `u32` containing the location at which to patch the si= gnature in the microcode + /// image. + patch_loc: u32, + /// Offset to a `u32` containing the index of the signature to patch. + patch_sig: u32, + /// Start offset to the signature metadata. + meta_data_offset: u32, + /// Size in bytes of the signature metadata. + meta_data_size: u32, + /// Offset to a `u32` containing the number of signatures in the signa= tures section. + num_sig: u32, + /// Offset of the application-specific header. + header_offset: u32, + /// Size in bytes of the application-specific header. + header_size: u32, +} + +// SAFETY: all bit patterns are valid for this type, and it doesn't use in= terior mutability. +unsafe impl FromBytes for HsHeaderV2 {} + +/// Heavy-Secured Firmware image container. +/// +/// This provides convenient access to the fields of [`HsHeaderV2`] that a= re actually indices to +/// read from in the firmware data. +struct HsFirmwareV2<'a> { + hdr: HsHeaderV2, + fw: &'a [u8], +} + +impl<'a> HsFirmwareV2<'a> { + /// Interprets the header of `bin_fw` as a [`HsHeaderV2`] and returns = an instance of + /// `HsFirmwareV2` for further parsing. + /// + /// Fails if the header pointed at by `bin_fw` is not within the bound= s of the firmware image. + fn new(bin_fw: &BinFirmware<'a>) -> Result { + frombytes_at::(bin_fw.fw, bin_fw.hdr.header_offset as = usize) + .map(|hdr| Self { hdr, fw: bin_fw.fw }) + } + + /// Returns the location at which the signatures should be patched in = the microcode image. + /// + /// Fails if the offset of the patch location is outside the bounds of= the firmware + /// image. + fn patch_location(&self) -> Result { + frombytes_at::(self.fw, self.hdr.patch_loc as usize) + } + + /// Returns an iterator to the signatures of the firmware. The iterato= r can be empty if the + /// firmware is unsigned. + /// + /// Fails if the pointed signatures are outside the bounds of the firm= ware image. + fn signatures_iter(&'a self) -> Result>> { + let num_sig =3D frombytes_at::(self.fw, self.hdr.num_sig as u= size)?; + let iter =3D match self.hdr.sig_prod_size.checked_div(num_sig) { + // If there are no signatures, return an iterator that will yi= eld zero elements. + None =3D> (&[] as &[u8]).chunks_exact(1), + Some(sig_size) =3D> { + let patch_sig =3D frombytes_at::(self.fw, self.hdr.pa= tch_sig as usize)?; + let signatures_start =3D (self.hdr.sig_prod_offset + patch= _sig) as usize; + + self.fw + // Get signatures range. + .get(signatures_start..signatures_start + self.hdr.sig= _prod_size as usize) + .ok_or(EINVAL)? + .chunks_exact(sig_size as usize) + } + }; + + // Map the byte slices into signatures. + Ok(iter.map(BooterSignature)) + } +} + +/// Signature parameters, as defined in the firmware. +#[repr(C)] +struct HsSignatureParams { + // Fuse version to use. + fuse_ver: u32, + // Mask of engine IDs this firmware applies to. + engine_id_mask: u32, + // ID of the microcode. + ucode_id: u32, +} + +// SAFETY: all bit patterns are valid for this type, and it doesn't use in= terior mutability. +unsafe impl FromBytes for HsSignatureParams {} + +impl HsSignatureParams { + /// Returns the signature parameters contained in `hs_fw`. + /// + /// Fails if the meta data parameter of `hs_fw` is outside the bounds = of the firmware image, or + /// if its size doesn't match that of [`HsSignatureParams`]. + fn new(hs_fw: &HsFirmwareV2<'_>) -> Result { + let start =3D hs_fw.hdr.meta_data_offset as usize; + let end =3D start + .checked_add(hs_fw.hdr.meta_data_size as usize) + .ok_or(EINVAL)?; + + hs_fw + .fw + .get(start..end) + .and_then(Self::from_bytes_copy) + .ok_or(EINVAL) + } +} + +/// Header for code and data load offsets. +#[repr(C)] +#[derive(Debug, Clone)] +struct HsLoadHeaderV2 { + // Offset at which the code starts. + os_code_offset: u32, + // Total size of the code, for all apps. + os_code_size: u32, + // Offset at which the data starts. + os_data_offset: u32, + // Size of the data. + os_data_size: u32, + // Number of apps following this header. Each app is described by a [`= HsLoadHeaderV2App`]. + num_apps: u32, +} + +// SAFETY: all bit patterns are valid for this type, and it doesn't use in= terior mutability. +unsafe impl FromBytes for HsLoadHeaderV2 {} + +impl HsLoadHeaderV2 { + /// Returns the load header contained in `hs_fw`. + /// + /// Fails if the header pointed at by `hs_fw` is not within the bounds= of the firmware image. + fn new(hs_fw: &HsFirmwareV2<'_>) -> Result { + frombytes_at::(hs_fw.fw, hs_fw.hdr.header_offset as usize) + } +} + +/// Header for app code loader. +#[repr(C)] +#[derive(Debug, Clone)] +struct HsLoadHeaderV2App { + /// Offset at which to load the app code. + offset: u32, + /// Length in bytes of the app code. + len: u32, +} + +// SAFETY: all bit patterns are valid for this type, and it doesn't use in= terior mutability. +unsafe impl FromBytes for HsLoadHeaderV2App {} + +impl HsLoadHeaderV2App { + /// Returns the [`HsLoadHeaderV2App`] for app `idx` of `hs_fw`. + /// + /// Fails if `idx` is larger than the number of apps declared in `hs_f= w`, or if the header is + /// not within the bounds of the firmware image. + fn new(hs_fw: &HsFirmwareV2<'_>, idx: u32) -> Result { + let load_hdr =3D HsLoadHeaderV2::new(hs_fw)?; + if idx >=3D load_hdr.num_apps { + Err(EINVAL) + } else { + frombytes_at::( + hs_fw.fw, + (hs_fw.hdr.header_offset as usize) + // Skip the load header... + .checked_add(size_of::()) + // ... and jump to app header `idx`. + .and_then(|offset| { + offset.checked_add((idx as usize).checked_mul(size= _of::())?) + }) + .ok_or(EINVAL)?, + ) + } + } +} + +/// Signature for Booter firmware. Their size is encoded into the header a= nd not known a compile +/// time, so we just wrap a byte slices on which we can implement [`Firmwa= reSignature`]. +struct BooterSignature<'a>(&'a [u8]); + +impl<'a> AsRef<[u8]> for BooterSignature<'a> { + fn as_ref(&self) -> &[u8] { + self.0 + } +} + +impl<'a> FirmwareSignature for BooterSignature<'a> {} + +/// The `Booter` loader firmware, responsible for loading the GSP. +pub(crate) struct BooterFirmware { + // Load parameters for `IMEM` falcon memory. + imem_load_target: FalconLoadTarget, + // Load parameters for `DMEM` falcon memory. + dmem_load_target: FalconLoadTarget, + // BROM falcon parameters. + brom_params: FalconBromParams, + // Device-mapped firmware image. + ucode: FirmwareDmaObject, +} + +impl FirmwareDmaObject { + fn new_booter(dev: &device::Device, data: &[u8]) -> Res= ult { + DmaObject::from_data(dev, data).map(|ucode| Self(ucode, PhantomDat= a)) + } +} + +impl BooterFirmware { + /// Parses the Booter firmware contained in `fw`, and patches the corr= ect signature so it is + /// ready to be loaded and run on `falcon`. + pub(crate) fn new( + dev: &device::Device, + fw: &Firmware, + falcon: &Falcon<::Target>, + bar: &Bar0, + ) -> Result { + let bin_fw =3D BinFirmware::new(fw)?; + // The binary firmware embeds a Heavy-Secured firmware. + let hs_fw =3D HsFirmwareV2::new(&bin_fw)?; + // The Heavy-Secured firmware embeds a firmware load descriptor. + let load_hdr =3D HsLoadHeaderV2::new(&hs_fw)?; + // Offset in `ucode` where to patch the signature. + let patch_loc =3D hs_fw.patch_location()?; + let sig_params =3D HsSignatureParams::new(&hs_fw)?; + let brom_params =3D FalconBromParams { + // `load_hdr.os_data_offset` is an absolute index, but `pkc_da= ta_offset` is from the + // signature patch location. + pkc_data_offset: patch_loc + .checked_sub(load_hdr.os_data_offset) + .ok_or(EINVAL)?, + engine_id_mask: u16::try_from(sig_params.engine_id_mask).map_e= rr(|_| EINVAL)?, + ucode_id: u8::try_from(sig_params.ucode_id).map_err(|_| EINVAL= )?, + }; + let app0 =3D HsLoadHeaderV2App::new(&hs_fw, 0)?; + + // Object containing the firmware microcode to be signature-patche= d. + let ucode =3D bin_fw + .data() + .ok_or(EINVAL) + .and_then(|data| FirmwareDmaObject::::new_booter(dev,= data))?; + + let ucode_signed =3D { + let mut signatures =3D hs_fw.signatures_iter()?.peekable(); + + if signatures.peek().is_none() { + // If there are no signatures, then the firmware is unsign= ed. + ucode.no_patch_signature() + } else { + // Obtain the version from the fuse register, and extract = the corresponding + // signature. + let reg_fuse_version =3D falcon.signature_reg_fuse_version( + bar, + brom_params.engine_id_mask, + brom_params.ucode_id, + )?; + + let signature =3D match reg_fuse_version { + // `0` means the last signature should be used. + 0 =3D> signatures.last(), + // Otherwise hardware fuse version needs to be substra= cted to obtain the index. + reg_fuse_version =3D> { + let Some(idx) =3D sig_params.fuse_ver.checked_sub(= reg_fuse_version) else { + dev_err!(dev, "invalid fuse version for Booter= firmware\n"); + return Err(EINVAL); + }; + signatures.nth(idx as usize) + } + } + .ok_or(EINVAL)?; + + ucode.patch_signature(&signature, patch_loc as usize)? + } + }; + + Ok(Self { + imem_load_target: FalconLoadTarget { + src_start: app0.offset, + dst_start: 0, + len: app0.len, + }, + dmem_load_target: FalconLoadTarget { + src_start: load_hdr.os_data_offset, + dst_start: 0, + len: load_hdr.os_data_size, + }, + brom_params, + ucode: ucode_signed, + }) + } +} + +impl FalconLoadParams for BooterFirmware { + fn imem_load_params(&self) -> FalconLoadTarget { + self.imem_load_target.clone() + } + + fn dmem_load_params(&self) -> FalconLoadTarget { + self.dmem_load_target.clone() + } + + fn brom_params(&self) -> FalconBromParams { + self.brom_params.clone() + } + + fn boot_addr(&self) -> u32 { + self.imem_load_target.src_start + } +} + +impl Deref for BooterFirmware { + type Target =3D DmaObject; + + fn deref(&self) -> &Self::Target { + &self.ucode.0 + } +} + +impl FalconFirmware for BooterFirmware { + type Target =3D Sec2; +} diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs index 8caecaf7dfb4820a96a568a05653dbdf808a3719..54f0e9fd587ae5c4c045096930c= 0548fb1ef1b86 100644 --- a/drivers/gpu/nova-core/gpu.rs +++ b/drivers/gpu/nova-core/gpu.rs @@ -269,7 +269,6 @@ pub(crate) fn new( ) -> Result> { let bar =3D devres_bar.access(pdev.as_ref())?; let spec =3D Spec::new(bar)?; - let fw =3D Firmware::new(pdev.as_ref(), spec.chipset, FIRMWARE_VER= SION)?; =20 dev_info!( pdev.as_ref(), @@ -293,7 +292,15 @@ pub(crate) fn new( )?; gsp_falcon.clear_swgen0_intr(bar); =20 - let _sec2_falcon =3D Falcon::::new(pdev.as_ref(), spec.chips= et, bar, true)?; + let sec2_falcon =3D Falcon::::new(pdev.as_ref(), spec.chipse= t, bar, true)?; + + let fw =3D Firmware::new( + pdev.as_ref(), + &sec2_falcon, + bar, + spec.chipset, + FIRMWARE_VERSION, + )?; =20 let fb_layout =3D FbLayout::new(spec.chipset, bar)?; dev_dbg!(pdev.as_ref(), "{:#x?}\n", fb_layout); --=20 2.50.1