From nobody Fri Oct 3 19:11:38 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 897BB259CB6; Tue, 26 Aug 2025 07:39:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756193982; cv=none; b=kuGn1hqTZqUwOPfRAN6DJnLjoTVszImvfbVIwt/7IrFC8EieZDR587zxa8Rn/MHhLL8xQ7mR4BONLMMAJtj+1s+gkm8aK4/TE0xxZDXuvFSbBKv/bs3JvWnCQhv9p54uRhcMHD/3EhIz6yFYcCGE4FjRUNdHV/qbpbSYK2/IApQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756193982; c=relaxed/simple; bh=RxFt5IVTUDQtMRnz+kIvAEi3r6lg/xIgb5vkotIBCak=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fKh5rm6rMlqGtHbkWTgSX9y1nIVsvcfU5FINmrd69VNM5QKAT66zCPEzLZCliobxVulPuLyxA3GW28LI5NrlKbktfiGC+dEjAWHRB0XVMRkaJIAotP72jwfUDdAm2PpY2QoLROfKxTwexuNF2yXkazJPZq/BC8/JbzHOLW9BYMk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=JlRvaWF6; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="JlRvaWF6" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1756193978; bh=RxFt5IVTUDQtMRnz+kIvAEi3r6lg/xIgb5vkotIBCak=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=JlRvaWF6aIZXqncQh3CJPV3C3H5m3WZfJcpGKgsXjNd1gu8WmqMicUqj00wMkpkAF 1Z2TKtTGL7m+WGARPg07OglJ/MX2wGQLpOo8ieJXVHm3aRmCPGSyczEhtvpMguLAfg PPCD3XouAI0Nc4mGWNMlw2V/L0MjzeMQkb0okyA0HiMLs0UUuOsrMZV3JGGqo8YavG 06WPCls+umGNsZDr2mAlHxXeMbJd2rpOACOlfIZ32xb5CbYoXwDFj6kE2bxzzI6kp4 PHY5rDwgd5vZ0yvVRKeZyCznRY+HkhQrT5AINjb2z+z8neQ8ZUaZeLz6nQA2qRwpbo gf40/dW2tzW9w== Received: from 2a01cb0892f2d600c8f85cf092d4af51.ipv6.abo.wanadoo.fr (2a01cb0892F2D600C8F85cF092d4AF51.ipv6.abo.wanadoo.fr [IPv6:2a01:cb08:92f2:d600:c8f8:5cf0:92d4:af51]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: jmassot) by bali.collaboradmins.com (Postfix) with ESMTPSA id CF04217E0A28; Tue, 26 Aug 2025 09:39:37 +0200 (CEST) From: Julien Massot Date: Tue, 26 Aug 2025 09:39:34 +0200 Subject: [PATCH v3 1/6] dt-bindings: clock: mediatek: Add power-domains property Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250826-mtk-dtb-warnings-v3-1-20e89886a20e@collabora.com> References: <20250826-mtk-dtb-warnings-v3-0-20e89886a20e@collabora.com> In-Reply-To: <20250826-mtk-dtb-warnings-v3-0-20e89886a20e@collabora.com> To: kernel@collabora.com, Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Ikjoon Jang , Enric Balletbo i Serra , Chen-Yu Tsai , Weiyi Lu , Eugen Hristev , Liam Girdwood , Mark Brown , Julien Massot , Sean Wang , Linus Walleij Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, Julien Massot X-Mailer: b4 0.14.2 The mt8183-mfgcfg node uses a power domain in its device tree node. To prevent schema validation warnings, add the optional `power-domains` property to the binding schema for mediatek syscon clocks. Fixes: 1781f2c46180 ("arm64: dts: mediatek: mt8183: Add power-domains prope= rity to mfgcfg") Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Julien Massot Acked-by: Rob Herring (Arm) --- .../devicetree/bindings/clock/mediatek,syscon.yaml | 15 +++++++++++= ++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/mediatek,syscon.yaml b= /Documentation/devicetree/bindings/clock/mediatek,syscon.yaml index a86a64893c675ac134af609b3a49242565db6ad8..a52f90bfc9f92b52feb9f488db5= 550630ac55f0a 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,syscon.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,syscon.yaml @@ -76,6 +76,9 @@ properties: - const: mediatek,mt2701-vdecsys - const: syscon =20 + power-domains: + maxItems: 1 + reg: maxItems: 1 =20 @@ -86,6 +89,18 @@ required: - compatible - '#clock-cells' =20 +if: + properties: + compatible: + contains: + const: mediatek,mt8183-mfgcfg +then: + properties: + power-domains: true +else: + properties: + power-domains: false + additionalProperties: false =20 examples: --=20 2.50.1 From nobody Fri Oct 3 19:11:38 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB9A22F49FB; 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Tue, 26 Aug 2025 09:39:39 +0200 (CEST) From: Julien Massot Date: Tue, 26 Aug 2025 09:39:35 +0200 Subject: [PATCH v3 2/6] ASoC: dt-binding: Convert mt8183-afe-pcm to dt-schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250826-mtk-dtb-warnings-v3-2-20e89886a20e@collabora.com> References: <20250826-mtk-dtb-warnings-v3-0-20e89886a20e@collabora.com> In-Reply-To: <20250826-mtk-dtb-warnings-v3-0-20e89886a20e@collabora.com> To: kernel@collabora.com, Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Ikjoon Jang , Enric Balletbo i Serra , Chen-Yu Tsai , Weiyi Lu , Eugen Hristev , Liam Girdwood , Mark Brown , Julien Massot , Sean Wang , Linus Walleij Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, Julien Massot X-Mailer: b4 0.14.2 Convert the MediaTek MT8183 AFE PCM Device Tree binding from the old .txt format to dt-schema format to improve validation. While converting, also document all clock inputs and memory-region used by the AFE block. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Signed-off-by: Julien Massot --- .../bindings/sound/mediatek,mt8183-audio.yaml | 228 +++++++++++++++++= ++++ .../devicetree/bindings/sound/mt8183-afe-pcm.txt | 42 ---- 2 files changed, 228 insertions(+), 42 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8183-audio.= yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8183-audio.yaml new file mode 100644 index 0000000000000000000000000000000000000000..031b0fa7b4dc1bcb9e258be1801= d4bbe4c02af84 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/mediatek,mt8183-audio.yaml @@ -0,0 +1,228 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/mediatek,mt8183-audio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek AFE PCM controller for mt8183 + +maintainers: + - Julien Massot + +properties: + compatible: + const: mediatek,mt8183-audio + + interrupts: + maxItems: 1 + + resets: + maxItems: 1 + + reset-names: + const: audiosys + + power-domains: + maxItems: 1 + + memory-region: + maxItems: 1 + + clocks: + items: + - description: AFE clock + - description: ADDA DAC clock + - description: ADDA DAC pre-distortion clock + - description: ADDA ADC clock + - description: ADDA6 ADC clock + - description: Audio low-jitter 22.5792m clock + - description: Audio low-jitter 24.576m clock + - description: Audio PLL1 tuner clock + - description: Audio PLL2 tuner clock + - description: I2S1 bit clock + - description: I2S2 bit clock + - description: I2S3 bit clock + - description: I2S4 bit clock + - description: Audio Time-Division Multiplexing interface clock + - description: Powerdown Audio test model clock + - description: Audio infra sys clock + - description: Audio infra 26M clock + - description: Mux for audio clock + - description: Mux for audio internal bus clock + - description: Mux main divider by 4 + - description: Primary audio mux + - description: Primary audio PLL + - description: Secondary audio mux + - description: Secondary audio PLL + - description: Primary audio en-generator clock + - description: Primary PLL divider by 4 for IEC + - description: Secondary audio en-generator clock + - description: Secondary PLL divider by 8 for IEC + - description: Mux selector for I2S port 0 + - description: Mux selector for I2S port 1 + - description: Mux selector for I2S port 2 + - description: Mux selector for I2S port 3 + - description: Mux selector for I2S port 4 + - description: Mux selector for I2S port 5 + - description: APLL1 and APLL2 divider for I2S port 0 + - description: APLL1 and APLL2 divider for I2S port 1 + - description: APLL1 and APLL2 divider for I2S port 2 + - description: APLL1 and APLL2 divider for I2S port 3 + - description: APLL1 and APLL2 divider for I2S port 4 + - description: APLL1 and APLL2 divider for IEC + - description: 26MHz clock for audio subsystem + + clock-names: + items: + - const: aud_afe_clk + - const: aud_dac_clk + - const: aud_dac_predis_clk + - const: aud_adc_clk + - const: aud_adc_adda6_clk + - const: aud_apll22m_clk + - const: aud_apll24m_clk + - const: aud_apll1_tuner_clk + - const: aud_apll2_tuner_clk + - const: aud_i2s1_bclk_sw + - const: aud_i2s2_bclk_sw + - const: aud_i2s3_bclk_sw + - const: aud_i2s4_bclk_sw + - const: aud_tdm_clk + - const: aud_tml_clk + - const: aud_infra_clk + - const: mtkaif_26m_clk + - const: top_mux_audio + - const: top_mux_aud_intbus + - const: top_syspll_d2_d4 + - const: top_mux_aud_1 + - const: top_apll1_ck + - const: top_mux_aud_2 + - const: top_apll2_ck + - const: top_mux_aud_eng1 + - const: top_apll1_d8 + - const: top_mux_aud_eng2 + - const: top_apll2_d8 + - const: top_i2s0_m_sel + - const: top_i2s1_m_sel + - const: top_i2s2_m_sel + - const: top_i2s3_m_sel + - const: top_i2s4_m_sel + - const: top_i2s5_m_sel + - const: top_apll12_div0 + - const: top_apll12_div1 + - const: top_apll12_div2 + - const: top_apll12_div3 + - const: top_apll12_div4 + - const: top_apll12_divb + - const: top_clk26m_clk + +required: + - compatible + - interrupts + - resets + - reset-names + - power-domains + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + audio-controller { + compatible =3D "mediatek,mt8183-audio"; + interrupts =3D ; + resets =3D <&watchdog MT8183_TOPRGU_AUDIO_SW_RST>; + reset-names =3D "audiosys"; + power-domains =3D <&spm MT8183_POWER_DOMAIN_AUDIO>; + clocks =3D <&audiosys CLK_AUDIO_AFE>, + <&audiosys CLK_AUDIO_DAC>, + <&audiosys CLK_AUDIO_DAC_PREDIS>, + <&audiosys CLK_AUDIO_ADC>, + <&audiosys CLK_AUDIO_PDN_ADDA6_ADC>, + <&audiosys CLK_AUDIO_22M>, + <&audiosys CLK_AUDIO_24M>, + <&audiosys CLK_AUDIO_APLL_TUNER>, + <&audiosys CLK_AUDIO_APLL2_TUNER>, + <&audiosys CLK_AUDIO_I2S1>, + <&audiosys CLK_AUDIO_I2S2>, + <&audiosys CLK_AUDIO_I2S3>, + <&audiosys CLK_AUDIO_I2S4>, + <&audiosys CLK_AUDIO_TDM>, + <&audiosys CLK_AUDIO_TML>, + <&infracfg CLK_INFRA_AUDIO>, + <&infracfg CLK_INFRA_AUDIO_26M_BCLK>, + <&topckgen CLK_TOP_MUX_AUDIO>, + <&topckgen CLK_TOP_MUX_AUD_INTBUS>, + <&topckgen CLK_TOP_SYSPLL_D2_D4>, + <&topckgen CLK_TOP_MUX_AUD_1>, + <&topckgen CLK_TOP_APLL1_CK>, + <&topckgen CLK_TOP_MUX_AUD_2>, + <&topckgen CLK_TOP_APLL2_CK>, + <&topckgen CLK_TOP_MUX_AUD_ENG1>, + <&topckgen CLK_TOP_APLL1_D8>, + <&topckgen CLK_TOP_MUX_AUD_ENG2>, + <&topckgen CLK_TOP_APLL2_D8>, + <&topckgen CLK_TOP_MUX_APLL_I2S0>, + <&topckgen CLK_TOP_MUX_APLL_I2S1>, + <&topckgen CLK_TOP_MUX_APLL_I2S2>, + <&topckgen CLK_TOP_MUX_APLL_I2S3>, + <&topckgen CLK_TOP_MUX_APLL_I2S4>, + <&topckgen CLK_TOP_MUX_APLL_I2S5>, + <&topckgen CLK_TOP_APLL12_DIV0>, + <&topckgen CLK_TOP_APLL12_DIV1>, + <&topckgen CLK_TOP_APLL12_DIV2>, + <&topckgen CLK_TOP_APLL12_DIV3>, + <&topckgen CLK_TOP_APLL12_DIV4>, + <&topckgen CLK_TOP_APLL12_DIVB>, + <&clk26m>; + clock-names =3D "aud_afe_clk", + "aud_dac_clk", + "aud_dac_predis_clk", + "aud_adc_clk", + "aud_adc_adda6_clk", + "aud_apll22m_clk", + "aud_apll24m_clk", + "aud_apll1_tuner_clk", + "aud_apll2_tuner_clk", + "aud_i2s1_bclk_sw", + "aud_i2s2_bclk_sw", + "aud_i2s3_bclk_sw", + "aud_i2s4_bclk_sw", + "aud_tdm_clk", + "aud_tml_clk", + "aud_infra_clk", + "mtkaif_26m_clk", + "top_mux_audio", + "top_mux_aud_intbus", + "top_syspll_d2_d4", + "top_mux_aud_1", + "top_apll1_ck", + "top_mux_aud_2", + "top_apll2_ck", + "top_mux_aud_eng1", + "top_apll1_d8", + "top_mux_aud_eng2", + "top_apll2_d8", + "top_i2s0_m_sel", + "top_i2s1_m_sel", + "top_i2s2_m_sel", + "top_i2s3_m_sel", + "top_i2s4_m_sel", + "top_i2s5_m_sel", + "top_apll12_div0", + "top_apll12_div1", + "top_apll12_div2", + "top_apll12_div3", + "top_apll12_div4", + "top_apll12_divb", + "top_clk26m_clk"; + }; + +... diff --git a/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt b/D= ocumentation/devicetree/bindings/sound/mt8183-afe-pcm.txt deleted file mode 100644 index 1f1cba4152ceecbe61d0db0b972f98df7d5d91ac..000000000000000000000000000= 0000000000000 --- a/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt +++ /dev/null @@ -1,42 +0,0 @@ -Mediatek AFE PCM controller for mt8183 - -Required properties: -- compatible =3D "mediatek,mt68183-audio"; -- reg: register location and size -- interrupts: should contain AFE interrupt -- resets: Must contain an entry for each entry in reset-names - See ../reset/reset.txt for details. -- reset-names: should have these reset names: - "audiosys"; -- power-domains: should define the power domain -- clocks: Must contain an entry for each entry in clock-names -- clock-names: should have these clock names: - "infra_sys_audio_clk", - "mtkaif_26m_clk", - "top_mux_audio", - "top_mux_aud_intbus", - "top_sys_pll3_d4", - "top_clk26m_clk"; - -Example: - - afe: mt8183-afe-pcm@11220000 { - compatible =3D "mediatek,mt8183-audio"; - reg =3D <0 0x11220000 0 0x1000>; - interrupts =3D ; - resets =3D <&watchdog MT8183_TOPRGU_AUDIO_SW_RST>; - reset-names =3D "audiosys"; - power-domains =3D <&scpsys MT8183_POWER_DOMAIN_AUDIO>; - clocks =3D <&infrasys CLK_INFRA_AUDIO>, - <&infrasys CLK_INFRA_AUDIO_26M_BCLK>, - <&topckgen CLK_TOP_MUX_AUDIO>, - <&topckgen CLK_TOP_MUX_AUD_INTBUS>, - <&topckgen CLK_TOP_SYSPLL_D2_D4>, - <&clk26m>; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250826-mtk-dtb-warnings-v3-3-20e89886a20e@collabora.com> References: <20250826-mtk-dtb-warnings-v3-0-20e89886a20e@collabora.com> In-Reply-To: <20250826-mtk-dtb-warnings-v3-0-20e89886a20e@collabora.com> To: kernel@collabora.com, Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Ikjoon Jang , Enric Balletbo i Serra , Chen-Yu Tsai , Weiyi Lu , Eugen Hristev , Liam Girdwood , Mark Brown , Julien Massot , Sean Wang , Linus Walleij Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, Julien Massot X-Mailer: b4 0.14.2 Update the mediatek,audsys binding to support the mt8183-audiosys compatible, which uses a different audio controller (mediatek,mt8183-audio.yaml) compared to the legacy mt2701-audio controller. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Signed-off-by: Julien Massot --- .../bindings/arm/mediatek/mediatek,audsys.yaml | 16 ++++++++++++= +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys= .yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml index 45d4a6620041b11cf6e943de49a42f3fcd91e1b9..f3a761cbd0fd44e2f7ff35c274d= d170bbb177e96 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml @@ -23,6 +23,7 @@ properties: - mediatek,mt7622-audsys - mediatek,mt8167-audsys - mediatek,mt8173-audsys + - mediatek,mt8183-audiosys - mediatek,mt8183-audsys - mediatek,mt8186-audsys - mediatek,mt8192-audsys @@ -41,13 +42,26 @@ properties: const: 1 =20 audio-controller: - $ref: /schemas/sound/mediatek,mt2701-audio.yaml# type: object =20 required: - compatible - '#clock-cells' =20 +if: + properties: + compatible: + contains: + const: mediatek,mt8183-audiosys +then: + properties: + audio-controller: + $ref: /schemas/sound/mediatek,mt8183-audio.yaml# +else: + properties: + audio-controller: + $ref: /schemas/sound/mediatek,mt2701-audio.yaml# + additionalProperties: false =20 examples: --=20 2.50.1 From nobody Fri Oct 3 19:11:38 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 622782F83B7; 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Tue, 26 Aug 2025 09:39:41 +0200 (CEST) From: Julien Massot Date: Tue, 26 Aug 2025 09:39:37 +0200 Subject: [PATCH v3 4/6] arm64: dts: mt8183: Rename nodes to match audiosys DT schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250826-mtk-dtb-warnings-v3-4-20e89886a20e@collabora.com> References: <20250826-mtk-dtb-warnings-v3-0-20e89886a20e@collabora.com> In-Reply-To: <20250826-mtk-dtb-warnings-v3-0-20e89886a20e@collabora.com> To: kernel@collabora.com, Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Ikjoon Jang , Enric Balletbo i Serra , Chen-Yu Tsai , Weiyi Lu , Eugen Hristev , Liam Girdwood , Mark Brown , Julien Massot , Sean Wang , Linus Walleij Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, Julien Massot X-Mailer: b4 0.14.2 The DT schema for "mediatek,mt8183-audiosys" expects an audio-controller node inside the audiosys block. Rename the nested AFE node from "mt8183-afe-pcm" to "audio-controller" accordingly. Also rename the audiosys node itself from "audio-controller" to "clock-controller" to better reflect its function. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Julien Massot --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts= /mediatek/mt8183.dtsi index 3c1fe80e64b9c5e32703f1e8663942a24543cf23..e2500e3c3f66d12a6fd19f29fa9= fd63a6f04821f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1445,11 +1445,11 @@ usb_host: usb@11200000 { }; }; =20 - audiosys: audio-controller@11220000 { + audiosys: clock-controller@11220000 { compatible =3D "mediatek,mt8183-audiosys", "syscon"; reg =3D <0 0x11220000 0 0x1000>; #clock-cells =3D <1>; - afe: mt8183-afe-pcm { + afe: audio-controller { compatible =3D "mediatek,mt8183-audio"; interrupts =3D ; resets =3D <&watchdog MT8183_TOPRGU_AUDIO_SW_RST>; --=20 2.50.1 From nobody Fri Oct 3 19:11:38 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 94C9C2F99A9; Tue, 26 Aug 2025 07:39:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756193988; cv=none; b=eQEblE4EoxXIvVQryL2kji6ej4vmoB8Cq/10Gt4d/2WM5veo5qidjdo9R/ZT/QJQbvHScTpnxy0RX2XsMo8zyFYFYU2HZt7cR2yOvtROMTAez1RGtIkO6G2v0jphdBiSWQY1BcOJduEXqftJIMfge4jKm8X2KC5bZBlncQi+3a8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756193988; c=relaxed/simple; bh=ZzK0YMyw8Cz7e8uao/AQQ99iaeD+bkVcWkBHzn18opA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kR/H8mcuQxj6fc7mBnTX6jGCj/fn25ZdRc4oHINJQBgdM6V5YNRgGfZFhSa7SDOkPSLojTWPLUozCX70JSlFtCapCoGvI2VH6gtu/YGICnYQC10gzJXqw1klRaLZZUbDm3pcsSsZoEbLlxSMLj1+uYYc5LmyqvdvEfwXvZ009M0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=A74t7wdu; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="A74t7wdu" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1756193984; bh=ZzK0YMyw8Cz7e8uao/AQQ99iaeD+bkVcWkBHzn18opA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=A74t7wduMGyeW6R+BrlrYiawQEj1SIwPi+HHZajGBls91RooeouHe9k6sTXza6mrZ SYNWZv+MINSgdHBwjVAqbMU51KxC1fH2tnYihduaKVZwtLLkJbaELqNLMZcs6UoLvi Moc+X9wB7xZPMSME2+n6slHo6L3V9wxon4RdfScZyZqR9eLtpJwxFEtlaiKq2OF2US bzz5chtacYCFSAjB0fbkzCcrVAkEEpFd8GZ33q0hU2tpCG1YA67yYh+UyZplXjjhsR 2kmOJL4KeEoqzRIQsbwB8gRFRKF3dzdJyTeGHWhQJCo4FfmSExKluE9Loee2BZULet 1rVATimsKHCtw== Received: from 2a01cb0892f2d600c8f85cf092d4af51.ipv6.abo.wanadoo.fr (2a01cb0892F2D600C8F85cF092d4AF51.ipv6.abo.wanadoo.fr [IPv6:2a01:cb08:92f2:d600:c8f8:5cf0:92d4:af51]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: jmassot) by bali.collaboradmins.com (Postfix) with ESMTPSA id DDF2917E0985; Tue, 26 Aug 2025 09:39:42 +0200 (CEST) From: Julien Massot Date: Tue, 26 Aug 2025 09:39:38 +0200 Subject: [PATCH v3 5/6] dt-bindings: sound: Convert MT8183 DA7219 sound card to DT schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250826-mtk-dtb-warnings-v3-5-20e89886a20e@collabora.com> References: <20250826-mtk-dtb-warnings-v3-0-20e89886a20e@collabora.com> In-Reply-To: <20250826-mtk-dtb-warnings-v3-0-20e89886a20e@collabora.com> To: kernel@collabora.com, Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Ikjoon Jang , Enric Balletbo i Serra , Chen-Yu Tsai , Weiyi Lu , Eugen Hristev , Liam Girdwood , Mark Brown , Julien Massot , Sean Wang , Linus Walleij Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, Julien Massot X-Mailer: b4 0.14.2 Convert the Device Tree binding for MT8183-based boards using the DA7219 headset codec and optional MAX98357, RT1015 or RT1015P speaker amplifiers from the legacy .txt format to DT schema. This improves binding validation and removes DT schema warnings for boards using these audio components. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Signed-off-by: Julien Massot --- .../bindings/sound/mediatek,mt8183_da7219.yaml | 49 ++++++++++++++++++= ++++ .../bindings/sound/mt8183-da7219-max98357.txt | 21 ---------- 2 files changed, 49 insertions(+), 21 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8183_da7219= .yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8183_da7219.yaml new file mode 100644 index 0000000000000000000000000000000000000000..b526e8123182bce87a8996928c4= cf5f1f60264a6 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/mediatek,mt8183_da7219.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/mediatek,mt8183_da7219.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT8183 sound card with external codecs + +maintainers: + - Julien Massot + +description: + MediaTek MT8183 SoC-based sound cards with DA7219 as headset codec, + and MAX98357A, RT1015 or RT1015P as speaker amplifiers. Optionally inclu= des HDMI codec. + +properties: + compatible: + enum: + - mediatek,mt8183_da7219_max98357 + - mediatek,mt8183_da7219_rt1015 + - mediatek,mt8183_da7219_rt1015p + + mediatek,headset-codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to the DA7219 headset codec. + + mediatek,platform: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to the MT8183 ASoC platform (e.g., AFE node). + + mediatek,hdmi-codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: Optional phandle to the HDMI codec (e.g., IT6505). + +required: + - compatible + - mediatek,headset-codec + - mediatek,platform + +additionalProperties: false + +examples: + - | + sound { + compatible =3D "mediatek,mt8183_da7219_max98357"; + mediatek,headset-codec =3D <&da7219>; + mediatek,hdmi-codec =3D <&it6505dptx>; + mediatek,platform =3D <&afe>; + }; diff --git a/Documentation/devicetree/bindings/sound/mt8183-da7219-max98357= .txt b/Documentation/devicetree/bindings/sound/mt8183-da7219-max98357.txt deleted file mode 100644 index f276dfc74b4654deb0867f830e17a92638b39e23..000000000000000000000000000= 0000000000000 --- a/Documentation/devicetree/bindings/sound/mt8183-da7219-max98357.txt +++ /dev/null @@ -1,21 +0,0 @@ -MT8183 with MT6358, DA7219, MAX98357, and RT1015 CODECS - -Required properties: -- compatible : "mediatek,mt8183_da7219_max98357" for MAX98357A codec - "mediatek,mt8183_da7219_rt1015" for RT1015 codec - "mediatek,mt8183_da7219_rt1015p" for RT1015P codec -- mediatek,headset-codec: the phandles of da7219 codecs -- mediatek,platform: the phandle of MT8183 ASoC platform - -Optional properties: -- mediatek,hdmi-codec: the phandles of HDMI codec - -Example: - - sound { - compatible =3D "mediatek,mt8183_da7219_max98357"; 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Tue, 26 Aug 2025 09:39:44 +0200 (CEST) From: Julien Massot Date: Tue, 26 Aug 2025 09:39:39 +0200 Subject: [PATCH v3 6/6] ASoC: dt-binding: Convert MediaTek mt8183-mt6358 to DT schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250826-mtk-dtb-warnings-v3-6-20e89886a20e@collabora.com> References: <20250826-mtk-dtb-warnings-v3-0-20e89886a20e@collabora.com> In-Reply-To: <20250826-mtk-dtb-warnings-v3-0-20e89886a20e@collabora.com> To: kernel@collabora.com, Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Ikjoon Jang , Enric Balletbo i Serra , Chen-Yu Tsai , Weiyi Lu , Eugen Hristev , Liam Girdwood , Mark Brown , Julien Massot , Sean Wang , Linus Walleij Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, Julien Massot X-Mailer: b4 0.14.2 Convert the existing text-based DT binding for MT8183 sound cards using MT6358 and various other codecs to a DT schema. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Signed-off-by: Julien Massot --- .../sound/mediatek,mt8183_mt6358_ts3a227.yaml | 59 ++++++++++++++++++= ++++ .../sound/mt8183-mt6358-ts3a227-max98357.txt | 25 --------- 2 files changed, 59 insertions(+), 25 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8183_mt6358= _ts3a227.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8183_mt6= 358_ts3a227.yaml new file mode 100644 index 0000000000000000000000000000000000000000..43a6f9d40644c2fc1e61ebf58fc= d62eaf3ee43f0 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/mediatek,mt8183_mt6358_ts3a22= 7.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/mediatek,mt8183_mt6358_ts3a227.ya= ml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT8183 sound card with MT6358, TS3A227, and MAX98357/RT101= 5 codecs + +maintainers: + - Julien Massot + +description: + MediaTek MT8183 SoC-based sound cards using the MT6358 codec, + with optional TS3A227 headset codec, EC codec (via Chrome EC), and HDMI = audio. + Speaker amplifier can be one of MAX98357A/B, RT1015, or RT1015P. + +properties: + compatible: + enum: + - mediatek,mt8183_mt6358_ts3a227_max98357 + - mediatek,mt8183_mt6358_ts3a227_max98357b + - mediatek,mt8183_mt6358_ts3a227_rt1015 + - mediatek,mt8183_mt6358_ts3a227_rt1015p + + mediatek,platform: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to the MT8183 ASoC platform node (e.g., AFE). + + mediatek,headset-codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to the TS3A227 headset codec. + + mediatek,ec-codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Optional phandle to a ChromeOS EC codec node. + See bindings in google,cros-ec-codec.yaml. + + mediatek,hdmi-codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: Optional phandle to an HDMI audio codec node. + +required: + - compatible + - mediatek,platform + +additionalProperties: false + +examples: + - | + sound { + compatible =3D "mediatek,mt8183_mt6358_ts3a227_max98357"; + mediatek,headset-codec =3D <&ts3a227>; + mediatek,ec-codec =3D <&ec_codec>; + mediatek,hdmi-codec =3D <&it6505dptx>; + mediatek,platform =3D <&afe>; + }; + +... diff --git a/Documentation/devicetree/bindings/sound/mt8183-mt6358-ts3a227-= max98357.txt b/Documentation/devicetree/bindings/sound/mt8183-mt6358-ts3a22= 7-max98357.txt deleted file mode 100644 index ecd46ed8eb98b99d0f2cc9eeca5f6d0aef6a5ada..000000000000000000000000000= 0000000000000 --- a/Documentation/devicetree/bindings/sound/mt8183-mt6358-ts3a227-max9835= 7.txt +++ /dev/null @@ -1,25 +0,0 @@ -MT8183 with MT6358, TS3A227, MAX98357, and RT1015 CODECS - -Required properties: -- compatible : "mediatek,mt8183_mt6358_ts3a227_max98357" for MAX98357A cod= ec - "mediatek,mt8183_mt6358_ts3a227_max98357b" for MAX98357B co= dec - "mediatek,mt8183_mt6358_ts3a227_rt1015" for RT1015 codec - "mediatek,mt8183_mt6358_ts3a227_rt1015p" for RT1015P codec -- mediatek,platform: the phandle of MT8183 ASoC platform - -Optional properties: -- mediatek,headset-codec: the phandles of ts3a227 codecs -- mediatek,ec-codec: the phandle of EC codecs. - See google,cros-ec-codec.txt for more details. -- mediatek,hdmi-codec: the phandles of HDMI codec - -Example: - - sound { - compatible =3D "mediatek,mt8183_mt6358_ts3a227_max98357"; - mediatek,headset-codec =3D <&ts3a227>; - mediatek,ec-codec =3D <&ec_codec>; - mediatek,hdmi-codec =3D <&it6505dptx>; - mediatek,platform =3D <&afe>; - }; - --=20 2.50.1