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Tue, 26 Aug 2025 02:35:12 -0700 (PDT) From: Bartosz Golaszewski Date: Tue, 26 Aug 2025 11:35:02 +0200 Subject: [PATCH 01/12] gpio: xgene-sb: use new generic GPIO chip API Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250826-gpio-mmio-gpio-conv-part2-v1-1-f67603e4b27e@linaro.org> References: <20250826-gpio-mmio-gpio-conv-part2-v1-0-f67603e4b27e@linaro.org> In-Reply-To: <20250826-gpio-mmio-gpio-conv-part2-v1-0-f67603e4b27e@linaro.org> To: Linus Walleij , Bartosz Golaszewski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Ray Jui , Scott Branden , Broadcom internal kernel review list , Yang Shen , Nobuhiro Iwamatsu Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- drivers/gpio/gpio-xgene-sb.c | 53 +++++++++++++++++++++++++---------------= ---- 1 file changed, 30 insertions(+), 23 deletions(-) diff --git a/drivers/gpio/gpio-xgene-sb.c b/drivers/gpio/gpio-xgene-sb.c index b51b1fa726bb5ac6fce21f93e98035b5f684ee88..c559a89aadf7a77bd9cce7e5a7d= 4a2b241307812 100644 --- a/drivers/gpio/gpio-xgene-sb.c +++ b/drivers/gpio/gpio-xgene-sb.c @@ -21,6 +21,7 @@ #include =20 #include +#include =20 #include "gpiolib-acpi.h" =20 @@ -40,7 +41,7 @@ =20 /** * struct xgene_gpio_sb - GPIO-Standby private data structure. - * @gc: memory-mapped GPIO controllers. + * @chip: Generic GPIO chip data * @regs: GPIO register base offset * @irq_domain: GPIO interrupt domain * @irq_start: GPIO pin that start support interrupt @@ -48,7 +49,7 @@ * @parent_irq_base: Start parent HWIRQ */ struct xgene_gpio_sb { - struct gpio_chip gc; + struct gpio_generic_chip chip; void __iomem *regs; struct irq_domain *irq_domain; u16 irq_start; @@ -91,9 +92,9 @@ static int xgene_gpio_sb_irq_set_type(struct irq_data *d,= unsigned int type) break; } =20 - xgene_gpio_set_bit(&priv->gc, priv->regs + MPA_GPIO_SEL_LO, + xgene_gpio_set_bit(&priv->chip.gc, priv->regs + MPA_GPIO_SEL_LO, gpio * 2, 1); - xgene_gpio_set_bit(&priv->gc, priv->regs + MPA_GPIO_INT_LVL, + xgene_gpio_set_bit(&priv->chip.gc, priv->regs + MPA_GPIO_INT_LVL, d->hwirq, lvl_type); =20 /* Propagate IRQ type setting to parent */ @@ -109,14 +110,14 @@ static void xgene_gpio_sb_irq_mask(struct irq_data *d) =20 irq_chip_mask_parent(d); =20 - gpiochip_disable_irq(&priv->gc, d->hwirq); + gpiochip_disable_irq(&priv->chip.gc, d->hwirq); } =20 static void xgene_gpio_sb_irq_unmask(struct irq_data *d) { struct xgene_gpio_sb *priv =3D irq_data_get_irq_chip_data(d); =20 - gpiochip_enable_irq(&priv->gc, d->hwirq); + gpiochip_enable_irq(&priv->chip.gc, d->hwirq); =20 irq_chip_unmask_parent(d); } @@ -155,15 +156,15 @@ static int xgene_gpio_sb_domain_activate(struct irq_d= omain *d, u32 gpio =3D HWIRQ_TO_GPIO(priv, irq_data->hwirq); int ret; =20 - ret =3D gpiochip_lock_as_irq(&priv->gc, gpio); + ret =3D gpiochip_lock_as_irq(&priv->chip.gc, gpio); if (ret) { - dev_err(priv->gc.parent, + dev_err(priv->chip.gc.parent, "Unable to configure XGene GPIO standby pin %d as IRQ\n", gpio); return ret; } =20 - xgene_gpio_set_bit(&priv->gc, priv->regs + MPA_GPIO_SEL_LO, + xgene_gpio_set_bit(&priv->chip.gc, priv->regs + MPA_GPIO_SEL_LO, gpio * 2, 1); return 0; } @@ -174,8 +175,8 @@ static void xgene_gpio_sb_domain_deactivate(struct irq_= domain *d, struct xgene_gpio_sb *priv =3D d->host_data; u32 gpio =3D HWIRQ_TO_GPIO(priv, irq_data->hwirq); =20 - gpiochip_unlock_as_irq(&priv->gc, gpio); - xgene_gpio_set_bit(&priv->gc, priv->regs + MPA_GPIO_SEL_LO, + gpiochip_unlock_as_irq(&priv->chip.gc, gpio); + xgene_gpio_set_bit(&priv->chip.gc, priv->regs + MPA_GPIO_SEL_LO, gpio * 2, 0); } =20 @@ -237,6 +238,7 @@ static const struct irq_domain_ops xgene_gpio_sb_domain= _ops =3D { =20 static int xgene_gpio_sb_probe(struct platform_device *pdev) { + struct gpio_generic_chip_config config; struct xgene_gpio_sb *priv; int ret; void __iomem *regs; @@ -263,14 +265,19 @@ static int xgene_gpio_sb_probe(struct platform_device= *pdev) return -ENODEV; } =20 - ret =3D bgpio_init(&priv->gc, &pdev->dev, 4, - regs + MPA_GPIO_IN_ADDR, - regs + MPA_GPIO_OUT_ADDR, NULL, - regs + MPA_GPIO_OE_ADDR, NULL, 0); + config =3D (typeof(config)){ + .dev =3D &pdev->dev, + .sz =3D 4, + .dat =3D regs + MPA_GPIO_IN_ADDR, + .set =3D regs + MPA_GPIO_OUT_ADDR, + .dirout =3D regs + MPA_GPIO_OE_ADDR, + }; + + ret =3D gpio_generic_chip_init(&priv->chip, &config); if (ret) return ret; =20 - priv->gc.to_irq =3D xgene_gpio_sb_to_irq; + priv->chip.gc.to_irq =3D xgene_gpio_sb_to_irq; =20 /* Retrieve start irq pin, use default if property not found */ priv->irq_start =3D XGENE_DFLT_IRQ_START_PIN; @@ -283,12 +290,12 @@ static int xgene_gpio_sb_probe(struct platform_device= *pdev) priv->nirq =3D val32; =20 /* Retrieve number gpio, use default if property not found */ - priv->gc.ngpio =3D XGENE_DFLT_MAX_NGPIO; + priv->chip.gc.ngpio =3D XGENE_DFLT_MAX_NGPIO; if (!device_property_read_u32(&pdev->dev, "apm,nr-gpios", &val32)) - priv->gc.ngpio =3D val32; + priv->chip.gc.ngpio =3D val32; =20 dev_info(&pdev->dev, "Support %d gpios, %d irqs start from pin %d\n", - priv->gc.ngpio, priv->nirq, priv->irq_start); + priv->chip.gc.ngpio, priv->nirq, priv->irq_start); =20 platform_set_drvdata(pdev, priv); =20 @@ -298,9 +305,9 @@ static int xgene_gpio_sb_probe(struct platform_device *= pdev) if (!priv->irq_domain) return -ENODEV; =20 - priv->gc.irq.domain =3D priv->irq_domain; + priv->chip.gc.irq.domain =3D priv->irq_domain; =20 - ret =3D devm_gpiochip_add_data(&pdev->dev, &priv->gc, priv); + ret =3D devm_gpiochip_add_data(&pdev->dev, &priv->chip.gc, priv); if (ret) { dev_err(&pdev->dev, "failed to register X-Gene GPIO Standby driver\n"); @@ -311,7 +318,7 @@ static int xgene_gpio_sb_probe(struct platform_device *= pdev) dev_info(&pdev->dev, "X-Gene GPIO Standby driver registered\n"); =20 /* Register interrupt handlers for GPIO signaled ACPI Events */ - acpi_gpiochip_request_interrupts(&priv->gc); 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski For easier maintenance: put includes in alphabetical order. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- drivers/gpio/gpio-mxs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c index 0ea46f3d04e128bc8e70941e26c618c0378ab9ae..bf0c97f589c96a5dce37dc140ba= bda5998d5e365 100644 --- a/drivers/gpio/gpio-mxs.c +++ b/drivers/gpio/gpio-mxs.c @@ -7,17 +7,17 @@ // Copyright (C) 2004-2010 Freescale Semiconductor, Inc. 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- drivers/gpio/gpio-mxs.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c index bf0c97f589c96a5dce37dc140babda5998d5e365..af45d1b1af6e049899ea6773bed= 92fb8a84a0dff 100644 --- a/drivers/gpio/gpio-mxs.c +++ b/drivers/gpio/gpio-mxs.c @@ -8,6 +8,7 @@ =20 #include #include +#include #include #include #include @@ -48,7 +49,7 @@ struct mxs_gpio_port { int id; int irq; struct irq_domain *domain; - struct gpio_chip gc; + struct gpio_generic_chip chip; struct device *dev; enum mxs_gpio_id devid; u32 both_edges; @@ -258,6 +259,7 @@ MODULE_DEVICE_TABLE(of, mxs_gpio_dt_ids); static int mxs_gpio_probe(struct platform_device *pdev) { struct device_node *np =3D pdev->dev.of_node; + struct gpio_generic_chip_config config; struct device_node *parent; static void __iomem *base; struct mxs_gpio_port *port; @@ -319,19 +321,24 @@ static int mxs_gpio_probe(struct platform_device *pde= v) irq_set_chained_handler_and_data(port->irq, mxs_gpio_irq_handler, port); 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Simplify error handling and shrink the code by using dev_err_probe() consistently across the driver. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- drivers/gpio/gpio-mlxbf2.c | 24 ++++++++---------------- 1 file changed, 8 insertions(+), 16 deletions(-) diff --git a/drivers/gpio/gpio-mlxbf2.c b/drivers/gpio/gpio-mlxbf2.c index 390f2e74a9d8193f924ee50f4a8f2d7bc6ae2168..bc4bba8b567c2605a77d4f9d4d7= d916e8b096569 100644 --- a/drivers/gpio/gpio-mlxbf2.c +++ b/drivers/gpio/gpio-mlxbf2.c @@ -369,10 +369,8 @@ mlxbf2_gpio_probe(struct platform_device *pdev) return PTR_ERR(gs->gpio_io); =20 ret =3D mlxbf2_gpio_get_lock_res(pdev); - if (ret) { - dev_err(dev, "Failed to get yu_arm_gpio_lock resource\n"); - return ret; - } + if (ret) + return dev_err_probe(dev, ret, "Failed to get yu_arm_gpio_lock resource\= n"); =20 if (device_property_read_u32(dev, "npins", &npins)) npins =3D MLXBF2_GPIO_MAX_PINS_PER_BLOCK; @@ -387,10 +385,8 @@ mlxbf2_gpio_probe(struct platform_device *pdev) NULL, 0); =20 - if (ret) { - dev_err(dev, "bgpio_init failed\n"); - return ret; - } + if (ret) + return dev_err_probe(dev, ret, "bgpio_init failed\n"); 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- drivers/gpio/gpio-mlxbf2.c | 59 +++++++++++++++++++++++-------------------= ---- 1 file changed, 30 insertions(+), 29 deletions(-) diff --git a/drivers/gpio/gpio-mlxbf2.c b/drivers/gpio/gpio-mlxbf2.c index bc4bba8b567c2605a77d4f9d4d7d916e8b096569..f99f66cd189ca71c9d188dff0a0= b42ef2223abb3 100644 --- a/drivers/gpio/gpio-mlxbf2.c +++ b/drivers/gpio/gpio-mlxbf2.c @@ -6,8 +6,10 @@ =20 #include #include +#include #include #include +#include #include #include #include @@ -65,7 +67,7 @@ struct mlxbf2_gpio_context_save_regs { =20 /* BlueField-2 gpio block context structure. */ struct mlxbf2_gpio_context { - struct gpio_chip gc; + struct gpio_generic_chip chip; =20 /* YU GPIO blocks address */ void __iomem *gpio_io; @@ -132,7 +134,7 @@ static int mlxbf2_gpio_lock_acquire(struct mlxbf2_gpio_= context *gs) u32 arm_gpio_lock_val; =20 mutex_lock(yu_arm_gpio_lock_param.lock); - raw_spin_lock(&gs->gc.bgpio_lock); + gpio_generic_chip_lock(&gs->chip); =20 arm_gpio_lock_val =3D readl(yu_arm_gpio_lock_param.io); =20 @@ -140,7 +142,7 @@ static int mlxbf2_gpio_lock_acquire(struct mlxbf2_gpio_= context *gs) * When lock active bit[31] is set, ModeX is write enabled */ if (YU_LOCK_ACTIVE_BIT(arm_gpio_lock_val)) { - raw_spin_unlock(&gs->gc.bgpio_lock); + gpio_generic_chip_unlock(&gs->chip); mutex_unlock(yu_arm_gpio_lock_param.lock); return -EINVAL; } @@ -154,11 +156,11 @@ static int mlxbf2_gpio_lock_acquire(struct mlxbf2_gpi= o_context *gs) * Release the YU arm_gpio_lock after changing the direction mode. */ static void mlxbf2_gpio_lock_release(struct mlxbf2_gpio_context *gs) - __releases(&gs->gc.bgpio_lock) + __releases(&gs->chip.gc.bgpio_lock) __releases(yu_arm_gpio_lock_param.lock) { writel(YU_ARM_GPIO_LOCK_RELEASE, yu_arm_gpio_lock_param.io); - raw_spin_unlock(&gs->gc.bgpio_lock); + gpio_generic_chip_unlock(&gs->chip); mutex_unlock(yu_arm_gpio_lock_param.lock); } =20 @@ -235,11 +237,10 @@ static void mlxbf2_gpio_irq_enable(struct irq_data *i= rqd) struct gpio_chip *gc =3D irq_data_get_irq_chip_data(irqd); struct mlxbf2_gpio_context *gs =3D gpiochip_get_data(gc); int offset =3D irqd_to_hwirq(irqd); - unsigned long flags; u32 val; =20 gpiochip_enable_irq(gc, irqd_to_hwirq(irqd)); - raw_spin_lock_irqsave(&gs->gc.bgpio_lock, flags); + guard(gpio_generic_lock_irqsave)(&gs->chip); val =3D readl(gs->gpio_io + YU_GPIO_CAUSE_OR_CLRCAUSE); val |=3D BIT(offset); writel(val, gs->gpio_io + YU_GPIO_CAUSE_OR_CLRCAUSE); @@ -247,7 +248,6 @@ static void mlxbf2_gpio_irq_enable(struct irq_data *irq= d) val =3D readl(gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0); val |=3D BIT(offset); writel(val, gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0); - raw_spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags); } =20 static void mlxbf2_gpio_irq_disable(struct irq_data *irqd) @@ -255,21 +255,21 @@ static void mlxbf2_gpio_irq_disable(struct irq_data *= irqd) struct gpio_chip *gc =3D irq_data_get_irq_chip_data(irqd); struct mlxbf2_gpio_context *gs =3D gpiochip_get_data(gc); int offset =3D irqd_to_hwirq(irqd); - unsigned long flags; u32 val; =20 - raw_spin_lock_irqsave(&gs->gc.bgpio_lock, flags); - val =3D readl(gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0); - val &=3D ~BIT(offset); - writel(val, gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0); - raw_spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags); + scoped_guard(gpio_generic_lock_irqsave, &gs->chip) { + val =3D readl(gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0); + val &=3D ~BIT(offset); + writel(val, gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0); + } + gpiochip_disable_irq(gc, irqd_to_hwirq(irqd)); } =20 static irqreturn_t mlxbf2_gpio_irq_handler(int irq, void *ptr) { struct mlxbf2_gpio_context *gs =3D ptr; - struct gpio_chip *gc =3D &gs->gc; + struct gpio_chip *gc =3D &gs->chip.gc; unsigned long pending; u32 level; =20 @@ -288,7 +288,6 @@ mlxbf2_gpio_irq_set_type(struct irq_data *irqd, unsigne= d int type) struct gpio_chip *gc =3D irq_data_get_irq_chip_data(irqd); struct mlxbf2_gpio_context *gs =3D gpiochip_get_data(gc); int offset =3D irqd_to_hwirq(irqd); - unsigned long flags; bool fall =3D false; bool rise =3D false; u32 val; @@ -308,7 +307,8 @@ mlxbf2_gpio_irq_set_type(struct irq_data *irqd, unsigne= d int type) return -EINVAL; } =20 - raw_spin_lock_irqsave(&gs->gc.bgpio_lock, flags); + guard(gpio_generic_lock_irqsave)(&gs->chip); + if (fall) { val =3D readl(gs->gpio_io + YU_GPIO_CAUSE_FALL_EN); val |=3D BIT(offset); @@ -320,7 +320,6 @@ mlxbf2_gpio_irq_set_type(struct irq_data *irqd, unsigne= d int type) val |=3D BIT(offset); writel(val, gs->gpio_io + YU_GPIO_CAUSE_RISE_EN); } - raw_spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags); =20 return 0; } @@ -347,6 +346,7 @@ static const struct irq_chip mlxbf2_gpio_irq_chip =3D { static int mlxbf2_gpio_probe(struct platform_device *pdev) { + struct gpio_generic_chip_config config; struct mlxbf2_gpio_context *gs; struct device *dev =3D &pdev->dev; struct gpio_irq_chip *girq; @@ -375,18 +375,19 @@ mlxbf2_gpio_probe(struct platform_device *pdev) if (device_property_read_u32(dev, "npins", &npins)) npins =3D MLXBF2_GPIO_MAX_PINS_PER_BLOCK; =20 - gc =3D &gs->gc; + gc =3D &gs->chip.gc; =20 - ret =3D bgpio_init(gc, dev, 4, - gs->gpio_io + YU_GPIO_DATAIN, - gs->gpio_io + YU_GPIO_DATASET, - gs->gpio_io + YU_GPIO_DATACLEAR, - NULL, - NULL, - 0); + config =3D (typeof(config)){ + .dev =3D dev, + .sz =3D 4, + .dat =3D gs->gpio_io + YU_GPIO_DATAIN, + .set =3D gs->gpio_io + YU_GPIO_DATASET, + .clr =3D gs->gpio_io + YU_GPIO_DATACLEAR, + }; =20 + ret =3D gpio_generic_chip_init(&gs->chip, &config); if (ret) - return dev_err_probe(dev, ret, "bgpio_init failed\n"); + return dev_err_probe(dev, ret, "failed to initialize the generic GPIO ch= ip\n"); =20 gc->direction_input =3D mlxbf2_gpio_direction_input; gc->direction_output =3D mlxbf2_gpio_direction_output; @@ -395,7 +396,7 @@ mlxbf2_gpio_probe(struct platform_device *pdev) =20 irq =3D platform_get_irq_optional(pdev, 0); if (irq >=3D 0) { - girq =3D &gs->gc.irq; + girq =3D &gs->chip.gc.irq; gpio_irq_chip_set_chip(girq, &mlxbf2_gpio_irq_chip); girq->handler =3D handle_simple_irq; girq->default_type =3D IRQ_TYPE_NONE; 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- drivers/gpio/gpio-xgs-iproc.c | 34 +++++++++++++++++++--------------- 1 file changed, 19 insertions(+), 15 deletions(-) diff --git a/drivers/gpio/gpio-xgs-iproc.c b/drivers/gpio/gpio-xgs-iproc.c index 93544e98ccbd3f8172010658cf82f5692949c772..9cffdedd31b1c39123b93469465= f483fbb4d076a 100644 --- a/drivers/gpio/gpio-xgs-iproc.c +++ b/drivers/gpio/gpio-xgs-iproc.c @@ -3,11 +3,12 @@ * Copyright (C) 2017 Broadcom */ =20 -#include #include #include #include #include +#include +#include #include #include #include @@ -28,7 +29,7 @@ #define IPROC_GPIO_CCA_INT_EDGE 0x24 =20 struct iproc_gpio_chip { - struct gpio_chip gc; + struct gpio_generic_chip gen_gc; spinlock_t lock; struct device *dev; void __iomem *base; @@ -38,7 +39,7 @@ struct iproc_gpio_chip { static inline struct iproc_gpio_chip * to_iproc_gpio(struct gpio_chip *gc) { - return container_of(gc, struct iproc_gpio_chip, gc); + return container_of(to_gpio_generic_chip(gc), struct iproc_gpio_chip, gen= _gc); } =20 static void iproc_gpio_irq_ack(struct irq_data *d) @@ -213,6 +214,7 @@ static const struct irq_chip iproc_gpio_irq_chip =3D { =20 static int iproc_gpio_probe(struct platform_device *pdev) { + struct gpio_generic_chip_config config; struct device *dev =3D &pdev->dev; struct device_node *dn =3D pdev->dev.of_node; struct iproc_gpio_chip *chip; @@ -231,21 +233,23 @@ static int iproc_gpio_probe(struct platform_device *p= dev) if (IS_ERR(chip->base)) return PTR_ERR(chip->base); =20 - ret =3D bgpio_init(&chip->gc, dev, 4, - chip->base + IPROC_GPIO_CCA_DIN, - chip->base + IPROC_GPIO_CCA_DOUT, - NULL, - chip->base + IPROC_GPIO_CCA_OUT_EN, - NULL, - 0); + config =3D (typeof(config)){ + .dev =3D dev, + .sz =3D 4, + .dat =3D chip->base + IPROC_GPIO_CCA_DIN, + .set =3D chip->base + IPROC_GPIO_CCA_DOUT, + .dirout =3D chip->base + IPROC_GPIO_CCA_OUT_EN, + }; + + ret =3D gpio_generic_chip_init(&chip->gen_gc, &config); if (ret) { dev_err(dev, "unable to init GPIO chip\n"); return ret; } =20 - chip->gc.label =3D dev_name(dev); + chip->gen_gc.gc.label =3D dev_name(dev); if (!of_property_read_u32(dn, "ngpios", &num_gpios)) - chip->gc.ngpio =3D num_gpios; + chip->gen_gc.gc.ngpio =3D num_gpios; =20 irq =3D platform_get_irq(pdev, 0); if (irq > 0) { @@ -266,13 +270,13 @@ static int iproc_gpio_probe(struct platform_device *p= dev) * a flow-handler because the irq is shared. */ ret =3D devm_request_irq(dev, irq, iproc_gpio_irq_handler, - IRQF_SHARED, chip->gc.label, &chip->gc); + IRQF_SHARED, chip->gen_gc.gc.label, &chip->gen_gc.gc); if (ret) { dev_err(dev, "Fail to request IRQ%d: %d\n", irq, ret); return ret; } =20 - girq =3D &chip->gc.irq; + girq =3D &chip->gen_gc.gc.irq; gpio_irq_chip_set_chip(girq, &iproc_gpio_irq_chip); /* This will let us handle the parent IRQ in the driver */ girq->parent_handler =3D NULL; @@ -282,7 +286,7 @@ static int iproc_gpio_probe(struct platform_device *pde= v) girq->handler =3D handle_simple_irq; } =20 - ret =3D devm_gpiochip_add_data(dev, &chip->gc, chip); + ret =3D devm_gpiochip_add_data(dev, &chip->gen_gc.gc, chip); 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Tue, 26 Aug 2025 02:35:18 -0700 (PDT) From: Bartosz Golaszewski Date: Tue, 26 Aug 2025 11:35:08 +0200 Subject: [PATCH 07/12] gpio: ftgpio010: order includes alphabetically Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250826-gpio-mmio-gpio-conv-part2-v1-7-f67603e4b27e@linaro.org> References: <20250826-gpio-mmio-gpio-conv-part2-v1-0-f67603e4b27e@linaro.org> In-Reply-To: <20250826-gpio-mmio-gpio-conv-part2-v1-0-f67603e4b27e@linaro.org> To: Linus Walleij , Bartosz Golaszewski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Ray Jui , Scott Branden , Broadcom internal kernel review list , Yang Shen , Nobuhiro Iwamatsu Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski For easier maintenance: put includes in alphabetical order. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- drivers/gpio/gpio-ftgpio010.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-ftgpio010.c b/drivers/gpio/gpio-ftgpio010.c index c35eaa2851d8533309fe04a3e6265d9a7947606d..56666ca8889bc92b91b16075172= 8b65e287b0123 100644 --- a/drivers/gpio/gpio-ftgpio010.c +++ b/drivers/gpio/gpio-ftgpio010.c @@ -10,12 +10,13 @@ * MXC GPIO support. (c) 2008 Daniel Mack * Copyright 2008 Juergen Beisert, kernel@pengutronix.de */ -#include -#include -#include -#include + #include #include +#include +#include +#include +#include =20 /* GPIO registers definition */ #define GPIO_DATA_OUT 0x00 --=20 2.48.1 From nobody Fri Oct 3 19:11:50 2025 Received: from mail-wr1-f51.google.com (mail-wr1-f51.google.com [209.85.221.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9212D322524 for ; Tue, 26 Aug 2025 09:35:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756200924; cv=none; b=MTDLF9jOQbwUSL9B8aV1X7XRLO79yOyfEwQCj9pmQ3DYiDCitTIZHuxXXcH6/o2YNgB4cg6hAGrrADyhE392RYteSTYGbj5EOgKG/AGC6kfBLc2Sg1TgN9sRdtov5rBzqgNWukPcG9511RVu48By+HOH2NMxCvt0InYnUSe9yIQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- drivers/gpio/gpio-ftgpio010.c | 39 ++++++++++++++++++++++----------------- 1 file changed, 22 insertions(+), 17 deletions(-) diff --git a/drivers/gpio/gpio-ftgpio010.c b/drivers/gpio/gpio-ftgpio010.c index 56666ca8889bc92b91b160751728b65e287b0123..dfa2c9444960a304d411e8d20db= 9bce0f8afa1c6 100644 --- a/drivers/gpio/gpio-ftgpio010.c +++ b/drivers/gpio/gpio-ftgpio010.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -41,13 +42,13 @@ /** * struct ftgpio_gpio - Gemini GPIO state container * @dev: containing device for this instance - * @gc: gpiochip for this instance + * @chip: generic GPIO chip for this instance * @base: remapped I/O-memory base * @clk: silicon clock */ struct ftgpio_gpio { struct device *dev; - struct gpio_chip gc; + struct gpio_generic_chip chip; void __iomem *base; struct clk *clk; }; @@ -234,6 +235,7 @@ static const struct irq_chip ftgpio_irq_chip =3D { =20 static int ftgpio_gpio_probe(struct platform_device *pdev) { + struct gpio_generic_chip_config config; struct device *dev =3D &pdev->dev; struct ftgpio_gpio *g; struct gpio_irq_chip *girq; @@ -262,27 +264,30 @@ static int ftgpio_gpio_probe(struct platform_device *= pdev) */ return PTR_ERR(g->clk); =20 - ret =3D bgpio_init(&g->gc, dev, 4, - g->base + GPIO_DATA_IN, - g->base + GPIO_DATA_SET, - g->base + GPIO_DATA_CLR, - g->base + GPIO_DIR, - NULL, - 0); + config =3D (typeof(config)){ + .dev =3D dev, + .sz =3D 4, + .dat =3D g->base + GPIO_DATA_IN, + .set =3D g->base + GPIO_DATA_SET, + .clr =3D g->base + GPIO_DATA_CLR, + .dirout =3D g->base + GPIO_DIR, + }; + + ret =3D gpio_generic_chip_init(&g->chip, &config); if (ret) return dev_err_probe(dev, ret, "unable to init generic GPIO\n"); =20 - g->gc.label =3D dev_name(dev); - g->gc.base =3D -1; - g->gc.parent =3D dev; - g->gc.owner =3D THIS_MODULE; - /* ngpio is set by bgpio_init() */ + g->chip.gc.label =3D dev_name(dev); + g->chip.gc.base =3D -1; + g->chip.gc.parent =3D dev; + g->chip.gc.owner =3D THIS_MODULE; + /* ngpio is set by gpio_generic_chip_init() */ =20 /* We need a silicon clock to do debounce */ if (!IS_ERR(g->clk)) - g->gc.set_config =3D ftgpio_gpio_set_config; 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- drivers/gpio/gpio-realtek-otto.c | 41 +++++++++++++++++++++++-------------= ---- 1 file changed, 24 insertions(+), 17 deletions(-) diff --git a/drivers/gpio/gpio-realtek-otto.c b/drivers/gpio/gpio-realtek-o= tto.c index d6418f89d3f63d6029e127d4f774507c2ebbe0cb..ab711422254e9e8ff1a4e7c4016= 389e6d352f268 100644 --- a/drivers/gpio/gpio-realtek-otto.c +++ b/drivers/gpio/gpio-realtek-otto.c @@ -1,7 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only =20 -#include #include +#include +#include #include #include #include @@ -41,7 +42,7 @@ /** * realtek_gpio_ctrl - Realtek Otto GPIO driver data * - * @gc: Associated gpio_chip instance + * @chip: Associated gpio_generic_chip instance * @base: Base address of the register block for a GPIO bank * @lock: Lock for accessing the IRQ registers and values * @intr_mask: Mask for interrupts lines @@ -64,7 +65,7 @@ * IMR on changes. */ struct realtek_gpio_ctrl { - struct gpio_chip gc; + struct gpio_generic_chip chip; void __iomem *base; void __iomem *cpumask_base; struct cpumask cpu_irq_maskable; @@ -101,7 +102,7 @@ static struct realtek_gpio_ctrl *irq_data_to_ctrl(struc= t irq_data *data) { struct gpio_chip *gc =3D irq_data_get_irq_chip_data(data); =20 - return container_of(gc, struct realtek_gpio_ctrl, gc); + return container_of(to_gpio_generic_chip(gc), struct realtek_gpio_ctrl, c= hip); } =20 /* @@ -194,7 +195,7 @@ static void realtek_gpio_irq_unmask(struct irq_data *da= ta) unsigned int line =3D irqd_to_hwirq(data); unsigned long flags; =20 - gpiochip_enable_irq(&ctrl->gc, line); + gpiochip_enable_irq(&ctrl->chip.gc, line); =20 raw_spin_lock_irqsave(&ctrl->lock, flags); ctrl->intr_mask[line] =3D REALTEK_GPIO_IMR_LINE_MASK; @@ -213,7 +214,7 @@ static void realtek_gpio_irq_mask(struct irq_data *data) realtek_gpio_update_line_imr(ctrl, line); raw_spin_unlock_irqrestore(&ctrl->lock, flags); =20 - gpiochip_disable_irq(&ctrl->gc, line); + gpiochip_disable_irq(&ctrl->chip.gc, line); } =20 static int realtek_gpio_irq_set_type(struct irq_data *data, unsigned int f= low_type) @@ -356,8 +357,9 @@ MODULE_DEVICE_TABLE(of, realtek_gpio_of_match); =20 static int realtek_gpio_probe(struct platform_device *pdev) { + struct gpio_generic_chip_config config; struct device *dev =3D &pdev->dev; - unsigned long bgpio_flags; + unsigned long gen_gc_flags; unsigned int dev_flags; struct gpio_irq_chip *girq; struct realtek_gpio_ctrl *ctrl; @@ -388,32 +390,37 @@ static int realtek_gpio_probe(struct platform_device = *pdev) raw_spin_lock_init(&ctrl->lock); =20 if (dev_flags & GPIO_PORTS_REVERSED) { - bgpio_flags =3D 0; + gen_gc_flags =3D 0; ctrl->bank_read =3D realtek_gpio_bank_read; ctrl->bank_write =3D realtek_gpio_bank_write; ctrl->line_imr_pos =3D realtek_gpio_line_imr_pos; } else { - bgpio_flags =3D BGPIOF_BIG_ENDIAN_BYTE_ORDER; + gen_gc_flags =3D BGPIOF_BIG_ENDIAN_BYTE_ORDER; ctrl->bank_read =3D realtek_gpio_bank_read_swapped; ctrl->bank_write =3D realtek_gpio_bank_write_swapped; ctrl->line_imr_pos =3D realtek_gpio_line_imr_pos_swapped; } =20 - err =3D bgpio_init(&ctrl->gc, dev, 4, - ctrl->base + REALTEK_GPIO_REG_DATA, NULL, NULL, - ctrl->base + REALTEK_GPIO_REG_DIR, NULL, - bgpio_flags); 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- drivers/gpio/gpio-hisi.c | 46 +++++++++++++++++++++++++++-----------------= -- 1 file changed, 27 insertions(+), 19 deletions(-) diff --git a/drivers/gpio/gpio-hisi.c b/drivers/gpio/gpio-hisi.c index 6016e6f0ed0fb80ea670ebb575452d9ec23976fa..01a99ac613d94e933d30f782520= 776693f048d1c 100644 --- a/drivers/gpio/gpio-hisi.c +++ b/drivers/gpio/gpio-hisi.c @@ -1,6 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* Copyright (c) 2020 HiSilicon Limited. */ + #include +#include #include #include #include @@ -33,7 +35,7 @@ #define HISI_GPIO_DRIVER_NAME "gpio-hisi" =20 struct hisi_gpio { - struct gpio_chip chip; + struct gpio_generic_chip chip; struct device *dev; void __iomem *reg_base; unsigned int line_num; @@ -43,8 +45,8 @@ struct hisi_gpio { static inline u32 hisi_gpio_read_reg(struct gpio_chip *chip, unsigned int off) { - struct hisi_gpio *hisi_gpio =3D - container_of(chip, struct hisi_gpio, chip); + struct hisi_gpio *hisi_gpio =3D container_of(to_gpio_generic_chip(chip), + struct hisi_gpio, chip); void __iomem *reg =3D hisi_gpio->reg_base + off; =20 return readl(reg); @@ -53,8 +55,8 @@ static inline u32 hisi_gpio_read_reg(struct gpio_chip *ch= ip, static inline void hisi_gpio_write_reg(struct gpio_chip *chip, unsigned int off, u32 val) { - struct hisi_gpio *hisi_gpio =3D - container_of(chip, struct hisi_gpio, chip); + struct hisi_gpio *hisi_gpio =3D container_of(to_gpio_generic_chip(chip), + struct hisi_gpio, chip); void __iomem *reg =3D hisi_gpio->reg_base + off; =20 writel(val, reg); @@ -180,14 +182,14 @@ static void hisi_gpio_irq_disable(struct irq_data *d) static void hisi_gpio_irq_handler(struct irq_desc *desc) { struct hisi_gpio *hisi_gpio =3D irq_desc_get_handler_data(desc); - unsigned long irq_msk =3D hisi_gpio_read_reg(&hisi_gpio->chip, + unsigned long irq_msk =3D hisi_gpio_read_reg(&hisi_gpio->chip.gc, HISI_GPIO_INTSTATUS_WX); struct irq_chip *irq_c =3D irq_desc_get_chip(desc); int hwirq; =20 chained_irq_enter(irq_c, desc); for_each_set_bit(hwirq, &irq_msk, HISI_GPIO_LINE_NUM_MAX) - generic_handle_domain_irq(hisi_gpio->chip.irq.domain, + generic_handle_domain_irq(hisi_gpio->chip.gc.irq.domain, hwirq); chained_irq_exit(irq_c, desc); } @@ -206,7 +208,7 @@ static const struct irq_chip hisi_gpio_irq_chip =3D { =20 static void hisi_gpio_init_irq(struct hisi_gpio *hisi_gpio) { - struct gpio_chip *chip =3D &hisi_gpio->chip; + struct gpio_chip *chip =3D &hisi_gpio->chip.gc; struct gpio_irq_chip *girq_chip =3D &chip->irq; =20 gpio_irq_chip_set_chip(girq_chip, &hisi_gpio_irq_chip); @@ -264,6 +266,7 @@ static void hisi_gpio_get_pdata(struct device *dev, =20 static int hisi_gpio_probe(struct platform_device *pdev) { + struct gpio_generic_chip_config config; struct device *dev =3D &pdev->dev; struct hisi_gpio *hisi_gpio; int port_num; @@ -289,26 +292,31 @@ static int hisi_gpio_probe(struct platform_device *pd= ev) =20 hisi_gpio->dev =3D dev; =20 - ret =3D bgpio_init(&hisi_gpio->chip, hisi_gpio->dev, 0x4, - hisi_gpio->reg_base + HISI_GPIO_EXT_PORT_WX, - hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_SET_WX, - hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_CLR_WX, - hisi_gpio->reg_base + HISI_GPIO_SWPORT_DDR_SET_WX, - hisi_gpio->reg_base + HISI_GPIO_SWPORT_DDR_CLR_WX, - BGPIOF_NO_SET_ON_INPUT | BGPIOF_UNREADABLE_REG_DIR); + config =3D (typeof(config)){ + .dev =3D hisi_gpio->dev, + .sz =3D 4, + .dat =3D hisi_gpio->reg_base + HISI_GPIO_EXT_PORT_WX, + .set =3D hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_SET_WX, + .clr =3D hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_CLR_WX, + .dirout =3D hisi_gpio->reg_base + HISI_GPIO_SWPORT_DDR_SET_WX, + .dirin =3D hisi_gpio->reg_base + HISI_GPIO_SWPORT_DDR_CLR_WX, + .flags =3D BGPIOF_NO_SET_ON_INPUT | BGPIOF_UNREADABLE_REG_DIR, + }; + + ret =3D gpio_generic_chip_init(&hisi_gpio->chip, &config); if (ret) { dev_err(dev, "failed to init, ret =3D %d\n", ret); return ret; } =20 - hisi_gpio->chip.set_config =3D hisi_gpio_set_config; - hisi_gpio->chip.ngpio =3D hisi_gpio->line_num; - hisi_gpio->chip.base =3D -1; + hisi_gpio->chip.gc.set_config =3D hisi_gpio_set_config; + hisi_gpio->chip.gc.ngpio =3D hisi_gpio->line_num; + hisi_gpio->chip.gc.base =3D -1; =20 if (hisi_gpio->irq > 0) hisi_gpio_init_irq(hisi_gpio); =20 - ret =3D devm_gpiochip_add_data(dev, &hisi_gpio->chip, hisi_gpio); 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- drivers/gpio/gpio-vf610.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c index 7de0d5b53d5604784a84def54f284f263a9e12dd..fa7e322a834cc2afbab7d4948cd= 41465867aa4c8 100644 --- a/drivers/gpio/gpio-vf610.c +++ b/drivers/gpio/gpio-vf610.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -28,7 +29,7 @@ struct fsl_gpio_soc_data { }; =20 struct vf610_gpio_port { - struct gpio_chip gc; + struct gpio_generic_chip chip; void __iomem *base; void __iomem *gpio_base; const struct fsl_gpio_soc_data *sdata; @@ -108,7 +109,7 @@ static void vf610_gpio_irq_handler(struct irq_desc *des= c) for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) { vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR); =20 - generic_handle_domain_irq(port->gc.irq.domain, pin); + generic_handle_domain_irq(port->chip.gc.irq.domain, pin); } =20 chained_irq_exit(chip, desc); @@ -214,6 +215,7 @@ static void vf610_gpio_disable_clk(void *data) =20 static int vf610_gpio_probe(struct platform_device *pdev) { + struct gpio_generic_chip_config config; struct device *dev =3D &pdev->dev; struct vf610_gpio_port *port; struct gpio_chip *gc; @@ -293,7 +295,7 @@ static int vf610_gpio_probe(struct platform_device *pde= v) return ret; } =20 - gc =3D &port->gc; + gc =3D &port->chip.gc; flags =3D BGPIOF_PINCTRL_BACKEND; /* * We only read the output register for current value on output @@ -302,13 +304,18 @@ static int vf610_gpio_probe(struct platform_device *p= dev) */ if (port->sdata->have_paddr) flags |=3D BGPIOF_READ_OUTPUT_REG_SET; - ret =3D bgpio_init(gc, dev, 4, - port->gpio_base + GPIO_PDIR, - port->gpio_base + GPIO_PDOR, - NULL, - port->sdata->have_paddr ? port->gpio_base + GPIO_PDDR : NULL, - NULL, - flags); + + config =3D (typeof(config)){ + .dev =3D dev, + .sz =3D 4, + .dat =3D port->gpio_base + GPIO_PDIR, + .set =3D port->gpio_base + GPIO_PDOR, + .dirout =3D port->sdata->have_paddr ? + port->gpio_base + GPIO_PDDR : NULL, + .flags =3D flags, + }; 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- drivers/gpio/gpio-visconti.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-visconti.c b/drivers/gpio/gpio-visconti.c index 5bd965c18a465f29884cbe56711b25d7e755df2d..cde1581a91033e0ffa855e6cab0= a36fa01f2baa1 100644 --- a/drivers/gpio/gpio-visconti.c +++ b/drivers/gpio/gpio-visconti.c @@ -10,6 +10,7 @@ =20 #include #include +#include #include #include #include @@ -32,7 +33,7 @@ struct visconti_gpio { void __iomem *base; spinlock_t lock; /* protect gpio register */ - struct gpio_chip gpio_chip; + struct gpio_generic_chip chip; struct device *dev; }; =20 @@ -158,6 +159,7 @@ static const struct irq_chip visconti_gpio_irq_chip =3D= { =20 static int visconti_gpio_probe(struct platform_device *pdev) { + struct gpio_generic_chip_config config; struct device *dev =3D &pdev->dev; struct visconti_gpio *priv; struct gpio_irq_chip *girq; @@ -189,19 +191,22 @@ static int visconti_gpio_probe(struct platform_device= *pdev) return -ENODEV; } =20 - ret =3D bgpio_init(&priv->gpio_chip, dev, 4, - priv->base + GPIO_IDATA, - priv->base + GPIO_OSET, - priv->base + GPIO_OCLR, - priv->base + GPIO_DIR, - NULL, - 0); + config =3D (typeof(config)){ + .dev =3D dev, + .sz =3D 4, + .dat =3D priv->base + GPIO_IDATA, + .set =3D priv->base + GPIO_OSET, + .clr =3D priv->base + GPIO_OCLR, + .dirout =3D priv->base + GPIO_DIR, + }; + + ret =3D gpio_generic_chip_init(&priv->chip, &config); if (ret) { dev_err(dev, "unable to init generic GPIO\n"); return ret; } =20 - girq =3D &priv->gpio_chip.irq; + girq =3D &priv->chip.gc.irq; gpio_irq_chip_set_chip(girq, &visconti_gpio_irq_chip); girq->fwnode =3D dev_fwnode(dev); girq->parent_domain =3D parent; @@ -210,7 +215,7 @@ static int visconti_gpio_probe(struct platform_device *= pdev) girq->default_type =3D IRQ_TYPE_NONE; girq->handler =3D handle_level_irq; =20 - return devm_gpiochip_add_data(dev, &priv->gpio_chip, priv); + return devm_gpiochip_add_data(dev, &priv->chip.gc, priv); } =20 static const struct of_device_id visconti_gpio_of_match[] =3D { --=20 2.48.1