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Signed-off-by: Abhinav Kumar Signed-off-by: Yongxing Mou --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 51 +++++++++++++++++++++++++= ---- 1 file changed, 44 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/= msm/disp/dpu1/dpu_encoder.c index 05e5f3463e30c9a6bd5b740580720ae2bf6b3246..2eb5397d15732b224372c68d0b2= b7167da9f2896 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1429,17 +1429,52 @@ static void dpu_encoder_virt_atomic_disable(struct = drm_encoder *drm_enc, =20 static struct dpu_hw_intf *dpu_encoder_get_intf(const struct dpu_mdss_cfg = *catalog, struct dpu_rm *dpu_rm, - enum dpu_intf_type type, u32 controller_id) + enum dpu_intf_type type, int enc_type, u32 id) { - int i =3D 0; + int i =3D 0, cnt =3D 0; + int controller_id =3D id >> 16; + int stream_id =3D id & 0x0F; =20 if (type =3D=3D INTF_WB) return NULL; =20 - for (i =3D 0; i < catalog->intf_count; i++) { - if (catalog->intf[i].type =3D=3D type - && catalog->intf[i].controller_id =3D=3D controller_id) { - return dpu_rm_get_intf(dpu_rm, catalog->intf[i].id); + if (enc_type =3D=3D DRM_MODE_ENCODER_DPMST) { + /* The intf order in dpu_intf_cfg matches the mapping in the DP HPG. + * example: + * DPU_8_4_0 - DP Controller intf to stream Mapping + * + * +-------------+----------+----------+----------+----------+ + * | stream_id |=C2=A0=C2=A0=C2=A0 0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0= =C2=A0=C2=A0 1=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0=C2=A0=C2=A0 2=C2=A0=C2=A0=C2= =A0=C2=A0 |=C2=A0=C2=A0=C2=A0 3=C2=A0=C2=A0=C2=A0=C2=A0 | + * +-------------+----------+----------+----------+----------+ + * | DP0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 | INTF_0=C2=A0= =C2=A0 | INTF_3=C2=A0=C2=A0 | INTF_6=C2=A0=C2=A0 | INTF_7=C2=A0=C2=A0 | + * | DP1=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 | INTF_4=C2=A0= =C2=A0 | INTF_8=C2=A0=C2=A0 |=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 |=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 | + * +-------------+----------+----------+----------+----------+ + * + * DPU_9_2_0 - DP Controller intf to stream Mapping + * + * +-------------+----------+----------+ + * | Controller=C2=A0 |=C2=A0=C2=A0=C2=A0 0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2= =A0=C2=A0=C2=A0 1=C2=A0=C2=A0=C2=A0=C2=A0 | + * +-------------+----------+----------+ + * | DP0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 | INTF_0=C2=A0= =C2=A0 | INTF_3=C2=A0=C2=A0 | + * | DP1=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 | INTF_4=C2=A0= =C2=A0 | INTF_8=C2=A0=C2=A0 | + * | DP2=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 | INTF_6=C2=A0= =C2=A0 | INTF_7=C2=A0=C2=A0 | + * +-------------+----------+----------+ + */ + DPU_DEBUG("controller_id %d for stream_id =3D %d\n", controller_id, stre= am_id); + for (i =3D 0; i < catalog->intf_count; i++) { + if (catalog->intf[i].type =3D=3D INTF_DP + && controller_id =3D=3D catalog->intf[i].controller_id) { + if (cnt =3D=3D stream_id) + return dpu_rm_get_intf(dpu_rm, catalog->intf[i].id); + cnt++; + } + } + } else { + for (i =3D 0; i < catalog->intf_count; i++) { + if (catalog->intf[i].type =3D=3D type + && catalog->intf[i].controller_id =3D=3D controller_id) { + return dpu_rm_get_intf(dpu_rm, catalog->intf[i].id); + } } } =20 @@ -2670,7 +2705,9 @@ static int dpu_encoder_setup_display(struct dpu_encod= er_virt *dpu_enc, =20 phys_params.hw_intf =3D dpu_encoder_get_intf(dpu_kms->catalog, &dpu_kms-= >rm, disp_info->intf_type, - controller_id); + dpu_enc->base.encoder_type, + controller_id << 16 + | disp_info->stream_id); =20 if (disp_info->intf_type =3D=3D INTF_WB && controller_id < WB_MAX) phys_params.hw_wb =3D dpu_rm_get_wb(&dpu_kms->rm, controller_id); --=20 2.34.1