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Mon, 25 Aug 2025 15:55:43 -0700 (PDT) From: David Lechner Date: Mon, 25 Aug 2025 17:55:03 -0500 Subject: [PATCH v2 4/4] iio: adc: ad7124: add clock output support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250825-iio-adc-ad7124-proper-clock-support-v2-4-4dcff9db6b35@baylibre.com> References: <20250825-iio-adc-ad7124-proper-clock-support-v2-0-4dcff9db6b35@baylibre.com> In-Reply-To: <20250825-iio-adc-ad7124-proper-clock-support-v2-0-4dcff9db6b35@baylibre.com> To: Michael Hennerich , Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, David Lechner X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3180; i=dlechner@baylibre.com; h=from:subject:message-id; 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If the #clock-cells property is present, turn on the internal clock output during probe. If both the clocks and #clock-names properties are present (not allowed by devicetree bindings), assume that an external clock is being used so that we don't accidentally have two outputs fighting each other. Signed-off-by: David Lechner --- We could make this fancier and only turn on the output on demand of a clock consumer, but then we have to deal with locking of the SPI bus to be able to write to the register. So I opted for the simpler solution of always turning it on during probe. This would only be used for synchronizing with other similar ADCs, so implementing the functions for a more general-purpose clock seems a bit overkill. --- drivers/iio/adc/ad7124.c | 37 ++++++++++++++++++++++++++++++++++--- 1 file changed, 34 insertions(+), 3 deletions(-) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 4112c484c2371cfa6f26acb0d7c5b2a308a5fb35..a1c5f059b284c4f8797986628b9= 2b70fd84e90f4 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -18,6 +19,7 @@ #include #include #include +#include #include =20 #include @@ -125,10 +127,12 @@ static const unsigned int ad7124_reg_size[] =3D { 3, 3, 3, 3, 3 }; =20 +#define AD7124_INT_CLK_HZ 614400 + static const int ad7124_master_clk_freq_hz[3] =3D { - [AD7124_LOW_POWER] =3D 76800, - [AD7124_MID_POWER] =3D 153600, - [AD7124_FULL_POWER] =3D 614400, + [AD7124_LOW_POWER] =3D AD7124_INT_CLK_HZ / 8, + [AD7124_MID_POWER] =3D AD7124_INT_CLK_HZ / 4, + [AD7124_FULL_POWER] =3D AD7124_INT_CLK_HZ, }; =20 static const char * const ad7124_ref_names[] =3D { @@ -1164,6 +1168,33 @@ static int ad7124_setup(struct ad7124_state *st) } =20 clk_sel =3D AD7124_ADC_CONTROL_CLK_SEL_INT; + } else if (!device_property_present(dev, "clocks") && + device_property_present(dev, "clock-names")) { + struct clk_hw *clk_hw; + + const char *name __free(kfree) =3D kasprintf(GFP_KERNEL, "%s-clk", + fwnode_get_name(dev_fwnode(dev))); + if (!name) + return -ENOMEM; + + clk_hw =3D devm_clk_hw_register_fixed_rate(dev, name, NULL, 0, + AD7124_INT_CLK_HZ); + if (IS_ERR(clk_hw)) + return dev_err_probe(dev, PTR_ERR(clk_hw), + "Failed to register clock provider\n"); + + ret =3D devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, + clk_hw); + if (ret) + return dev_err_probe(dev, ret, + "Failed to add clock provider\n"); + + /* + * Treat the clock as always on. This way we don't have to deal + * with someone trying to enable/disable the clock while we are + * reading samples. + */ + clk_sel =3D AD7124_ADC_CONTROL_CLK_SEL_INT_OUT; } else { struct clk *clk; =20 --=20 2.43.0