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([2401:4900:1c5c:9483:43fb:2a6d:1506:f2f1]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffed02bsm4550834b3a.24.2025.08.24.04.51.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 24 Aug 2025 04:51:14 -0700 (PDT) From: Yugansh Mittal To: alexander.deucher@amd.com, christian.koenig@amd.com, airlied@gmail.com, simona@ffwll.ch Cc: amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Yugansh Mittal Subject: [PATCH] atomfirmware.h: fix multiple spelling mistakes Date: Sun, 24 Aug 2025 17:20:51 +0530 Message-ID: <20250824115051.32988-1-mittalyugansh1@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable This patch corrects several typographical errors in atomfirmware.h. The fixes improve readability and maintain consistency in the codebase. No functional changes are introduced. Corrected terms include: - aligment =E2=86=92 alignment - Offest =E2=86=92 Offset - defintion =E2=86=92 definition - swithing =E2=86=92 switching - calcualted =E2=86=92 calculated - compability =E2=86=92 compatibility - intenal =E2=86=92 internal - sequece =E2=86=92 sequence - indiate =E2=86=92 indicate - stucture =E2=86=92 structure - regiser =E2=86=92 register Signed-off-by: Yugansh Mittal --- drivers/gpu/drm/amd/include/atomfirmware.h | 30 +++++++++++----------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h b/drivers/gpu/drm/a= md/include/atomfirmware.h index 5c86423c2..3d083010e 100644 --- a/drivers/gpu/drm/amd/include/atomfirmware.h +++ b/drivers/gpu/drm/amd/include/atomfirmware.h @@ -211,7 +211,7 @@ atom_bios_string =3D "ATOM" }; */ =20 -#pragma pack(1) /* BIOS data must use byte aligme= nt*/ +#pragma pack(1) /* BIOS data must use byte alignm= ent*/ =20 enum atombios_image_offset{ OFFSET_TO_ATOM_ROM_HEADER_POINTER =3D 0x00000048, @@ -255,8 +255,8 @@ struct atom_rom_header_v2_2 uint16_t subsystem_vendor_id; uint16_t subsystem_id; uint16_t pci_info_offset; - uint16_t masterhwfunction_offset; //Offest for SW to get all comman= d function offsets, Don't change the position - uint16_t masterdatatable_offset; //Offest for SW to get all data t= able offsets, Don't change the position + uint16_t masterhwfunction_offset; //Offset for SW to get all comman= d function offsets, Don't change the position + uint16_t masterdatatable_offset; //Offset for SW to get all data t= able offsets, Don't change the position uint16_t reserved; uint32_t pspdirtableoffset; }; @@ -453,7 +453,7 @@ struct atom_dtd_format uint8_t refreshrate; }; =20 -/* atom_dtd_format.modemiscinfo defintion */ +/* atom_dtd_format.modemiscinfo definition */ enum atom_dtd_format_modemiscinfo{ ATOM_HSYNC_POLARITY =3D 0x0002, ATOM_VSYNC_POLARITY =3D 0x0004, @@ -678,7 +678,7 @@ struct lcd_info_v2_1 uint32_t reserved1[8]; }; =20 -/* lcd_info_v2_1.panel_misc defintion */ +/* lcd_info_v2_1.panel_misc definition */ enum atom_lcd_info_panel_misc{ ATOM_PANEL_MISC_FPDI =3D0x0002, }; @@ -716,7 +716,7 @@ enum atom_gpio_pin_assignment_gpio_id { /* gpio_id pre-define id for multiple usage */ /* GPIO use to control PCIE_VDDC in certain SLT board */ PCIE_VDDC_CONTROL_GPIO_PINID =3D 56, - /* if PP_AC_DC_SWITCH_GPIO_PINID in Gpio_Pin_LutTable, AC/DC swithing fe= ature is enable */ + /* if PP_AC_DC_SWITCH_GPIO_PINID in Gpio_Pin_LutTable, AC/DC switching f= eature is enable */ PP_AC_DC_SWITCH_GPIO_PINID =3D 60, /* VDDC_REGULATOR_VRHOT_GPIO_PINID in Gpio_Pin_LutTable, VRHot feature i= s enable */ VDDC_VRHOT_GPIO_PINID =3D 61, @@ -734,7 +734,7 @@ enum atom_gpio_pin_assignment_gpio_id { struct atom_gpio_pin_lut_v2_1 { struct atom_common_table_header table_header; - /*the real number of this included in the structure is calcualted by usi= ng the (whole structure size - the header size)/size of atom_gpio_pin_lut = */ + /*the real number of this included in the structure is calculated by usi= ng the (whole structure size - the header size)/size of atom_gpio_pin_lut = */ struct atom_gpio_pin_assignment gpio_pin[]; }; =20 @@ -997,7 +997,7 @@ enum atom_connector_layout_info_mini_type_def { =20 enum atom_display_device_tag_def{ ATOM_DISPLAY_LCD1_SUPPORT =3D 0x0002, //an embedded display i= s either an LVDS or eDP signal type of display - ATOM_DISPLAY_LCD2_SUPPORT =3D 0x0020, //second edp device tag 0= x0020 for backward compability + ATOM_DISPLAY_LCD2_SUPPORT =3D 0x0020, //second edp device tag= 0x0020 for backward compatibility ATOM_DISPLAY_DFP1_SUPPORT =3D 0x0008, ATOM_DISPLAY_DFP2_SUPPORT =3D 0x0080, ATOM_DISPLAY_DFP3_SUPPORT =3D 0x0200, @@ -1011,7 +1011,7 @@ struct atom_display_object_path_v2 { uint16_t display_objid; //Connector Object ID or Misc O= bject ID uint16_t disp_recordoffset; - uint16_t encoderobjid; //first encoder closer to the c= onnector, could be either an external or intenal encoder + uint16_t encoderobjid; //first encoder closer to the c= onnector, could be either an external or internal encoder uint16_t extencoderobjid; //2nd encoder after the first e= ncoder, from the connector point of view; uint16_t encoder_recordoffset; uint16_t extencoder_recordoffset; @@ -1023,7 +1023,7 @@ struct atom_display_object_path_v2 struct atom_display_object_path_v3 { uint16_t display_objid; //Connector Object ID or Misc Object ID uint16_t disp_recordoffset; - uint16_t encoderobjid; //first encoder closer to the connector, could be = either an external or intenal encoder + uint16_t encoderobjid; //first encoder closer to the connector, could be = either an external or internal encoder uint16_t reserved1; //only on USBC case, otherwise always =3D 0 uint16_t reserved2; //reserved and always =3D 0 uint16_t reserved3; //reserved and always =3D 0 @@ -3547,7 +3547,7 @@ struct atom_voltage_object_header_v4{ enum atom_voltage_object_mode=20 { VOLTAGE_OBJ_GPIO_LUT =3D 0, //VOLTAGE and GPIO Loo= kup table ->atom_gpio_voltage_object_v4 - VOLTAGE_OBJ_VR_I2C_INIT_SEQ =3D 3, //VOLTAGE REGULATOR IN= IT sequece through I2C -> atom_i2c_voltage_object_v4 + VOLTAGE_OBJ_VR_I2C_INIT_SEQ =3D 3, //VOLTAGE REGULATOR IN= IT sequence through I2C -> atom_i2c_voltage_object_v4 VOLTAGE_OBJ_PHASE_LUT =3D 4, //Set Vregulator Phase= lookup table ->atom_gpio_voltage_object_v4 VOLTAGE_OBJ_SVID2 =3D 7, //Indicate voltage con= trol by SVID2 ->atom_svid2_voltage_object_v4 VOLTAGE_OBJ_EVV =3D 8,=20 @@ -3585,7 +3585,7 @@ struct atom_gpio_voltage_object_v4 { struct atom_voltage_object_header_v4 header; // voltage mode =3D VOLTA= GE_OBJ_GPIO_LUT or VOLTAGE_OBJ_PHASE_LUT uint8_t gpio_control_id; // default is 0 which ind= icate control through CG VID mode=20 - uint8_t gpio_entry_num; // indiate the entry numb= ers of Votlage/Gpio value Look up table + uint8_t gpio_entry_num; // indicate the entry num= bers of Votlage/Gpio value Look up table uint8_t phase_delay_us; // phase delay in unit of= micro second uint8_t reserved; =20 uint32_t gpio_mask_val; // GPIO Mask value @@ -4507,8 +4507,8 @@ struct amd_acpi_description_header{ struct uefi_acpi_vfct{ struct amd_acpi_description_header sheader; uint8_t tableUUID[16]; //0x24 - uint32_t vbiosimageoffset; //0x34. Offset to the first GOP_VBIOS_CONTENT= block from the beginning of the stucture. - uint32_t lib1Imageoffset; //0x38. Offset to the first GOP_LIB1_CONTENT = block from the beginning of the stucture. + uint32_t vbiosimageoffset; //0x34. Offset to the first GOP_VBIOS_CONTENT= block from the beginning of the structure. + uint32_t lib1Imageoffset; //0x38. Offset to the first GOP_LIB1_CONTENT = block from the beginning of the structure. uint32_t reserved[4]; //0x3C }; =20 @@ -4540,7 +4540,7 @@ struct gop_lib1_content { /*=20 ************************************************************************= *** Scratch Register definitions - Each number below indicates which scratch regiser request, Active and=20 + Each number below indicates which scratch register request, Active and Connect all share the same definitions as display_device_tag defines ************************************************************************= ***=20 */ =20 --=20 2.43.0