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Sun, 24 Aug 2025 01:40:15 -0700 From: Mark Bloch To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Tariq Toukan , Leon Romanovsky , "Saeed Mahameed" , , , Gal Pressman , Moshe Shemesh , Mark Bloch , Shay Drory Subject: [PATCH net 06/11] net/mlx5: Fix lockdep assertion on sync reset unload event Date: Sun, 24 Aug 2025 11:39:39 +0300 Message-ID: <20250824083944.523858-7-mbloch@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250824083944.523858-1-mbloch@nvidia.com> References: <20250824083944.523858-1-mbloch@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD82:EE_|DM6PR12MB4465:EE_ X-MS-Office365-Filtering-Correlation-Id: c4023243-1c40-4f48-8a23-08dde2e9e5d8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?NsbFwTE36mpUe+t3VrvGfhvOrWdf3WOE0x4o26snbWrd9K/FlFNrCI2XrXK+?= =?us-ascii?Q?3RLAaAcIOuFyVQntGgbdA5oaylZT5uBOjU1xc2vppy/oT8VYpfY6zhfWfe3R?= =?us-ascii?Q?R0zA6HVOhaS7IO0Kt4+QUs+S+JYb6Msr8XMFu2xn4+D7m/a/VuDzVF51UTzD?= =?us-ascii?Q?xurI4kuUoxkSzKvaFdM5rHLHwxk1nFDyUdOvQU9NVrpRRDHwm2GwU0J1OIZ2?= =?us-ascii?Q?Y6Q2hegiF3VQqKroEnwB4KGOfkXEg304HOpC6SxLvwjq9liX7TOnroaAMOwR?= =?us-ascii?Q?xLn6CRX4NrmHuaQAGbmbQGtUty00/2wkPtnkvBO6cVLK56WZSwZqcVW1o8W/?= =?us-ascii?Q?I1EMsNZrrZVUOkEM6tZD9w+BpJVg+hHi5IgNSg4EUAHngrg5TWyv8RFluyJB?= =?us-ascii?Q?mMh7XTURt080WcfbSADgYzeeN/XZe8ofAmRBjO8CjCfWhk1sYseBbrcAgVf4?= =?us-ascii?Q?3B3pCbf5SVijUQLwyolhw3n9ix8OCGBWIMEe2Yrs2D6yDEMtjs/RSsB2fhFH?= =?us-ascii?Q?YzX0O4Vpa/NEho/gKhyMPDOGkl0uCFBI04UMZTcrM2kbJQakHIzwSOGPuWGI?= =?us-ascii?Q?Mef73SaM/AJ+wFj1tEPrmza3d1qHMAa2YoxRej+gWX9gxP3GoXF4wrqdwpvF?= =?us-ascii?Q?q5H44nOxY+9TLDzwTDjhw97KdEz3hMQQfMjcIsDz6zRylqZUKipvdMLMGAg8?= =?us-ascii?Q?15oHGt3VpZfxLHVxXYe/FFNCmWFa4t2LcEmog/cLPuUXd53Dsvl6ND1+jHCN?= =?us-ascii?Q?spTh1DVaVjROd9BJeIOrptpbPIE3CwNS0T8tIF0MHz7ojIOuzik0uGT9i/Xl?= =?us-ascii?Q?E+tvH/AI8jX+ibLv66HOWckSVjO8LB32sL/s2HAAd5RcCin+naDLV57GxL6o?= =?us-ascii?Q?W2TdA+RcAwoufRiVYBTBwpgAwr39XxNtl26+JNIQtwgnGAAeDNw/HICsJFX4?= =?us-ascii?Q?u41p8/5L7qfrUMhBxF8KyxUdmOTVOWtZeCTn2DFWemP6R9i5V+VvVC4XsECG?= =?us-ascii?Q?+jk7miD7pt/Wjuwr+5Vg3hjr6+5js0sDyqwd4ZFOk0YwLMMBoM1l7Nu4LLES?= =?us-ascii?Q?e2iSdVH+sn07pzZ/b6Y66qNpWCT2/D668MwJkTd9wE8EeqUeJ0aR9ancNjpS?= =?us-ascii?Q?jMYBnlqQg6ICdQL8iXk20B5PdLR1yel+ISNr8WYjp+rPx/4C/BATcox0YOdv?= =?us-ascii?Q?w9+AGk2UxsNRTLG4o3VD9+WnlLbOk0bVpNQLYQboE1RD56oD4rOdvvmAd3gb?= =?us-ascii?Q?e3sFOFkwesQfLSVxW7yz7yihL9j5I/3vDWHoHtYtIs7K0psXCqWuKNogVJ7h?= =?us-ascii?Q?CYrs4xY2K4jAdZBDUPZo5SnX7XFsgNWbgAqprxe9mJm85lXQWOp9yGM8eo04?= =?us-ascii?Q?t6rOgLujRSB4HqC8aETUKRqKx+MBUctrqVQO3o2I1Vc4+dQPjzRoEq67+B5/?= =?us-ascii?Q?2w4ulRaUJmc3znOGt8gPmm1Y1iy/IvFnW3Yw3Z1Rle0i/ub+gF7bVgrU0/PD?= =?us-ascii?Q?N7svvwAmxdgVwXcbsBzDi2AYCmYyPHunLOOY?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Aug 2025 08:40:36.6496 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c4023243-1c40-4f48-8a23-08dde2e9e5d8 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD82.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4465 Content-Type: text/plain; charset="utf-8" From: Moshe Shemesh Fix lockdep assertion triggered during sync reset unload event. When the sync reset flow is initiated using the devlink reload fw_activate option, the PF already holds the devlink lock while handling unload event. In this case, delegate sync reset unload event handling back to the devlink callback process to avoid double-locking and resolve the lockdep warning. Kernel log: WARNING: CPU: 9 PID: 1578 at devl_assert_locked+0x31/0x40 [...] Call Trace: mlx5_unload_one_devl_locked+0x2c/0xc0 [mlx5_core] mlx5_sync_reset_unload_event+0xaf/0x2f0 [mlx5_core] process_one_work+0x222/0x640 worker_thread+0x199/0x350 kthread+0x10b/0x230 ? __pfx_worker_thread+0x10/0x10 ? __pfx_kthread+0x10/0x10 ret_from_fork+0x8e/0x100 ? __pfx_kthread+0x10/0x10 ret_from_fork_asm+0x1a/0x30 Fixes: 7a9770f1bfea ("net/mlx5: Handle sync reset unload event") Signed-off-by: Moshe Shemesh Signed-off-by: Mark Bloch --- .../net/ethernet/mellanox/mlx5/core/devlink.c | 2 +- .../ethernet/mellanox/mlx5/core/fw_reset.c | 120 ++++++++++-------- .../ethernet/mellanox/mlx5/core/fw_reset.h | 1 + 3 files changed, 69 insertions(+), 54 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c b/drivers/ne= t/ethernet/mellanox/mlx5/core/devlink.c index 26091e7536d3..2c0e0c16ca90 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c @@ -160,7 +160,7 @@ static int mlx5_devlink_reload_fw_activate(struct devli= nk *devlink, struct netli if (err) return err; =20 - mlx5_unload_one_devl_locked(dev, false); + mlx5_sync_reset_unload_flow(dev, true); err =3D mlx5_health_wait_pci_up(dev); if (err) NL_SET_ERR_MSG_MOD(extack, "FW activate aborted, PCI reads fail after re= set"); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c b/drivers/n= et/ethernet/mellanox/mlx5/core/fw_reset.c index 69933addd921..38b9b184ae01 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c @@ -12,7 +12,8 @@ enum { MLX5_FW_RESET_FLAGS_NACK_RESET_REQUEST, MLX5_FW_RESET_FLAGS_PENDING_COMP, MLX5_FW_RESET_FLAGS_DROP_NEW_REQUESTS, - MLX5_FW_RESET_FLAGS_RELOAD_REQUIRED + MLX5_FW_RESET_FLAGS_RELOAD_REQUIRED, + MLX5_FW_RESET_FLAGS_UNLOAD_EVENT, }; =20 struct mlx5_fw_reset { @@ -219,7 +220,7 @@ int mlx5_fw_reset_set_live_patch(struct mlx5_core_dev *= dev) return mlx5_reg_mfrl_set(dev, MLX5_MFRL_REG_RESET_LEVEL0, 0, 0, false); } =20 -static void mlx5_fw_reset_complete_reload(struct mlx5_core_dev *dev, bool = unloaded) +static void mlx5_fw_reset_complete_reload(struct mlx5_core_dev *dev) { struct mlx5_fw_reset *fw_reset =3D dev->priv.fw_reset; struct devlink *devlink =3D priv_to_devlink(dev); @@ -228,8 +229,7 @@ static void mlx5_fw_reset_complete_reload(struct mlx5_c= ore_dev *dev, bool unload if (test_bit(MLX5_FW_RESET_FLAGS_PENDING_COMP, &fw_reset->reset_flags)) { complete(&fw_reset->done); } else { - if (!unloaded) - mlx5_unload_one(dev, false); + mlx5_sync_reset_unload_flow(dev, false); if (mlx5_health_wait_pci_up(dev)) mlx5_core_err(dev, "reset reload flow aborted, PCI reads still not work= ing\n"); else @@ -272,7 +272,7 @@ static void mlx5_sync_reset_reload_work(struct work_str= uct *work) =20 mlx5_sync_reset_clear_reset_requested(dev, false); mlx5_enter_error_state(dev, true); - mlx5_fw_reset_complete_reload(dev, false); + mlx5_fw_reset_complete_reload(dev); } =20 #define MLX5_RESET_POLL_INTERVAL (HZ / 10) @@ -586,6 +586,65 @@ static int mlx5_sync_pci_reset(struct mlx5_core_dev *d= ev, u8 reset_method) return err; } =20 +void mlx5_sync_reset_unload_flow(struct mlx5_core_dev *dev, bool locked) +{ + struct mlx5_fw_reset *fw_reset =3D dev->priv.fw_reset; + unsigned long timeout; + int poll_freq =3D 20; + bool reset_action; + u8 rst_state; + int err; + + if (locked) + mlx5_unload_one_devl_locked(dev, false); + else + mlx5_unload_one(dev, false); + + if (!test_bit(MLX5_FW_RESET_FLAGS_UNLOAD_EVENT, &fw_reset->reset_flags)) + return; + + mlx5_set_fw_rst_ack(dev); + mlx5_core_warn(dev, "Sync Reset Unload done, device reset expected\n"); + + reset_action =3D false; + timeout =3D jiffies + msecs_to_jiffies(mlx5_tout_ms(dev, RESET_UNLOAD)); + do { + rst_state =3D mlx5_get_fw_rst_state(dev); + if (rst_state =3D=3D MLX5_FW_RST_STATE_TOGGLE_REQ || + rst_state =3D=3D MLX5_FW_RST_STATE_IDLE) { + reset_action =3D true; + break; + } + if (rst_state =3D=3D MLX5_FW_RST_STATE_DROP_MODE) { + mlx5_core_info(dev, "Sync Reset Drop mode ack\n"); + mlx5_set_fw_rst_ack(dev); + poll_freq =3D 1000; + } + msleep(poll_freq); + } while (!time_after(jiffies, timeout)); + + if (!reset_action) { + mlx5_core_err(dev, "Got timeout waiting for sync reset action, state =3D= %u\n", + rst_state); + fw_reset->ret =3D -ETIMEDOUT; + goto done; + } + + mlx5_core_warn(dev, "Sync Reset, got reset action. rst_state =3D %u\n", + rst_state); + if (rst_state =3D=3D MLX5_FW_RST_STATE_TOGGLE_REQ) { + err =3D mlx5_sync_pci_reset(dev, fw_reset->reset_method); + if (err) { + mlx5_core_warn(dev, "mlx5_sync_pci_reset failed, err %d\n", + err); + fw_reset->ret =3D err; + } + } + +done: + clear_bit(MLX5_FW_RESET_FLAGS_UNLOAD_EVENT, &fw_reset->reset_flags); +} + static void mlx5_sync_reset_now_event(struct work_struct *work) { struct mlx5_fw_reset *fw_reset =3D container_of(work, struct mlx5_fw_rese= t, @@ -613,17 +672,13 @@ static void mlx5_sync_reset_now_event(struct work_str= uct *work) mlx5_enter_error_state(dev, true); done: fw_reset->ret =3D err; - mlx5_fw_reset_complete_reload(dev, false); + mlx5_fw_reset_complete_reload(dev); } =20 static void mlx5_sync_reset_unload_event(struct work_struct *work) { struct mlx5_fw_reset *fw_reset; struct mlx5_core_dev *dev; - unsigned long timeout; - int poll_freq =3D 20; - bool reset_action; - u8 rst_state; int err; =20 fw_reset =3D container_of(work, struct mlx5_fw_reset, reset_unload_work); @@ -632,6 +687,7 @@ static void mlx5_sync_reset_unload_event(struct work_st= ruct *work) if (mlx5_sync_reset_clear_reset_requested(dev, false)) return; =20 + set_bit(MLX5_FW_RESET_FLAGS_UNLOAD_EVENT, &fw_reset->reset_flags); mlx5_core_warn(dev, "Sync Reset Unload. Function is forced down.\n"); =20 err =3D mlx5_cmd_fast_teardown_hca(dev); @@ -640,49 +696,7 @@ static void mlx5_sync_reset_unload_event(struct work_s= truct *work) else mlx5_enter_error_state(dev, true); =20 - if (test_bit(MLX5_FW_RESET_FLAGS_PENDING_COMP, &fw_reset->reset_flags)) - mlx5_unload_one_devl_locked(dev, false); - else - mlx5_unload_one(dev, false); - - mlx5_set_fw_rst_ack(dev); - mlx5_core_warn(dev, "Sync Reset Unload done, device reset expected\n"); - - reset_action =3D false; - timeout =3D jiffies + msecs_to_jiffies(mlx5_tout_ms(dev, RESET_UNLOAD)); - do { - rst_state =3D mlx5_get_fw_rst_state(dev); - if (rst_state =3D=3D MLX5_FW_RST_STATE_TOGGLE_REQ || - rst_state =3D=3D MLX5_FW_RST_STATE_IDLE) { - reset_action =3D true; - break; - } - if (rst_state =3D=3D MLX5_FW_RST_STATE_DROP_MODE) { - mlx5_core_info(dev, "Sync Reset Drop mode ack\n"); - mlx5_set_fw_rst_ack(dev); - poll_freq =3D 1000; - } - msleep(poll_freq); - } while (!time_after(jiffies, timeout)); - - if (!reset_action) { - mlx5_core_err(dev, "Got timeout waiting for sync reset action, state =3D= %u\n", - rst_state); - fw_reset->ret =3D -ETIMEDOUT; - goto done; - } - - mlx5_core_warn(dev, "Sync Reset, got reset action. rst_state =3D %u\n", r= st_state); - if (rst_state =3D=3D MLX5_FW_RST_STATE_TOGGLE_REQ) { - err =3D mlx5_sync_pci_reset(dev, fw_reset->reset_method); - if (err) { - mlx5_core_warn(dev, "mlx5_sync_pci_reset failed, err %d\n", err); - fw_reset->ret =3D err; - } - } - -done: - mlx5_fw_reset_complete_reload(dev, true); + mlx5_fw_reset_complete_reload(dev); } =20 static void mlx5_sync_reset_abort_event(struct work_struct *work) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h b/drivers/n= et/ethernet/mellanox/mlx5/core/fw_reset.h index ea527d06a85f..d5b28525c960 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h @@ -12,6 +12,7 @@ int mlx5_fw_reset_set_reset_sync(struct mlx5_core_dev *de= v, u8 reset_type_sel, int mlx5_fw_reset_set_live_patch(struct mlx5_core_dev *dev); =20 int mlx5_fw_reset_wait_reset_done(struct mlx5_core_dev *dev); +void mlx5_sync_reset_unload_flow(struct mlx5_core_dev *dev, bool locked); int mlx5_fw_reset_verify_fw_complete(struct mlx5_core_dev *dev, struct netlink_ext_ack *extack); void mlx5_fw_reset_events_start(struct mlx5_core_dev *dev); --=20 2.34.1