From nobody Fri Oct 3 23:13:21 2025 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C6BA2580F0; Sat, 23 Aug 2025 16:09:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755965385; cv=none; b=Ql3VP7tcIQ5dcw7cBVy8R6h8Ukuz8+1kY1now1as6o26K2yo5iwUyptwGerWObDJ8gWRGmaRYuiByYGt4X8rGIi/utLcWewj2Iq38Joccx0c51nV60bkleSourosVAE4o34ZIXbG1Lr87WtsMH3iE0htQXsFJnZC6x8j0PqhSd0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755965385; c=relaxed/simple; bh=8esSsI8J/hEa2l+HJyhsDd9sT4/LR0T73XCOuX8NLhA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Y7eAvriuaftfOaXZUTEoBCfy9X7jge6d48c9YJlbf4iIjwWovkCY0TykQnSF5SrBlxayCQuy1AThGEWzUHdjK4oAhI7ZDg0qkNEo83TkWRRdtV23J4ibvoWUrjKT+H/ALtHzuz5BklobUx+XxtgNWD7vY3B+dS87ZjaNGi/DWtE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=vK9xnXh2; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="vK9xnXh2" Received: from fllvem-sh04.itg.ti.com ([10.64.41.54]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 57NG9Vrr468546; Sat, 23 Aug 2025 11:09:31 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1755965372; bh=Tg3Pf87JflYfXh+3NJUHaewVbWErjhZnVQTZFJm65Ls=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=vK9xnXh2TLnUmgPXxca0WjW4Vz5NXDRbailWg+pTLH1hou5Gv/IzDn6WBvUWfvWxY xnkuFwm2Es66SupjvXJLyWBTCurHMMgNb7nIycZ7CLxzOs45PelU5Rj42rSBd0xgJK P6y3MWSmaPbs5nFsXXG9/fzUX6bNVVfugksKIaTw= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllvem-sh04.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 57NG9V2k239255 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Sat, 23 Aug 2025 11:09:31 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Sat, 23 Aug 2025 11:09:31 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Sat, 23 Aug 2025 11:09:31 -0500 Received: from uda0510294.dhcp.ti.com (uda0510294.dhcp.ti.com [172.24.234.212]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 57NG9ExI1274978; Sat, 23 Aug 2025 11:09:27 -0500 From: Beleswar Padhi To: , , , , , CC: , , , , , , , Subject: [PATCH v2 02/33] arm64: dts: ti: k3-j721e: Enable remote processors at board level Date: Sat, 23 Aug 2025 21:38:30 +0530 Message-ID: <20250823160901.2177841-3-b-padhi@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250823160901.2177841-1-b-padhi@ti.com> References: <20250823160901.2177841-1-b-padhi@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Remote Processors defined in top-level J721E SoC dtsi files are incomplete without the memory carveouts and mailbox assignments which are only known at board integration level. Therefore, disable the remote processors at SoC level and enable them at board level where above information is available. Signed-off-by: Beleswar Padhi --- v2: Changelog: 1. Reordered patch from [PATCH 05/33] to [PATCH v2 02/33]. Link to v1: https://lore.kernel.org/all/20250814223839.3256046-6-b-padhi@ti.com/ .../boot/dts/ti/k3-j721e-beagleboneai64.dts | 18 ++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 6 ++++++ .../arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 3 +++ arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 12 ++++++++++++ arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 12 ++++++++++++ 5 files changed, 51 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm6= 4/boot/dts/ti/k3-j721e-beagleboneai64.dts index fb899c99753e..0d1a313a7d10 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts @@ -935,37 +935,55 @@ mbox_c71_0: mbox-c71-0 { }; }; =20 +&mcu_r5fss0 { + status =3D "okay"; +}; + &mcu_r5fss0_core0 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; =20 &mcu_r5fss0_core1 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region =3D <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; }; =20 +&main_r5fss0 { + status =3D "okay"; +}; + &main_r5fss0_core0 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region =3D <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; =20 &main_r5fss0_core1 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region =3D <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; =20 +&main_r5fss1 { + status =3D "okay"; +}; + &main_r5fss1_core0 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region =3D <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; =20 &main_r5fss1_core1 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region =3D <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j721e-main.dtsi index ab3666ff4297..e748f704e3b6 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -2182,6 +2182,7 @@ main_r5fss0: r5fss@5c00000 { ranges =3D <0x5c00000 0x00 0x5c00000 0x20000>, <0x5d00000 0x00 0x5d00000 0x20000>; power-domains =3D <&k3_pds 243 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; =20 main_r5fss0_core0: r5f@5c00000 { compatible =3D "ti,j721e-r5f"; @@ -2196,6 +2197,7 @@ main_r5fss0_core0: r5f@5c00000 { ti,atcm-enable =3D <1>; ti,btcm-enable =3D <1>; ti,loczrama =3D <1>; + status =3D "disabled"; }; =20 main_r5fss0_core1: r5f@5d00000 { @@ -2211,6 +2213,7 @@ main_r5fss0_core1: r5f@5d00000 { ti,atcm-enable =3D <1>; ti,btcm-enable =3D <1>; ti,loczrama =3D <1>; + status =3D "disabled"; }; }; =20 @@ -2222,6 +2225,7 @@ main_r5fss1: r5fss@5e00000 { ranges =3D <0x5e00000 0x00 0x5e00000 0x20000>, <0x5f00000 0x00 0x5f00000 0x20000>; power-domains =3D <&k3_pds 244 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; =20 main_r5fss1_core0: r5f@5e00000 { compatible =3D "ti,j721e-r5f"; @@ -2236,6 +2240,7 @@ main_r5fss1_core0: r5f@5e00000 { ti,atcm-enable =3D <1>; ti,btcm-enable =3D <1>; ti,loczrama =3D <1>; + status =3D "disabled"; }; =20 main_r5fss1_core1: r5f@5f00000 { @@ -2251,6 +2256,7 @@ main_r5fss1_core1: r5f@5f00000 { ti,atcm-enable =3D <1>; ti,btcm-enable =3D <1>; ti,loczrama =3D <1>; + status =3D "disabled"; }; }; =20 diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/b= oot/dts/ti/k3-j721e-mcu-wakeup.dtsi index b02142b2b460..42a21398e389 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -594,6 +594,7 @@ mcu_r5fss0: r5fss@41000000 { ranges =3D <0x41000000 0x00 0x41000000 0x20000>, <0x41400000 0x00 0x41400000 0x20000>; power-domains =3D <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; =20 mcu_r5fss0_core0: r5f@41000000 { compatible =3D "ti,j721e-r5f"; @@ -608,6 +609,7 @@ mcu_r5fss0_core0: r5f@41000000 { ti,atcm-enable =3D <1>; ti,btcm-enable =3D <1>; ti,loczrama =3D <1>; + status =3D "disabled"; }; =20 mcu_r5fss0_core1: r5f@41400000 { @@ -623,6 +625,7 @@ mcu_r5fss0_core1: r5f@41400000 { ti,atcm-enable =3D <1>; ti,btcm-enable =3D <1>; ti,loczrama =3D <1>; + status =3D "disabled"; }; }; =20 diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/t= i/k3-j721e-sk.dts index ffef3d1cfd55..62b9c13a91e7 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -1349,13 +1349,19 @@ mbox_c71_0: mbox-c71-0 { }; }; =20 +&mcu_r5fss0 { + status =3D "okay"; +}; + &mcu_r5fss0_core0 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; =20 &mcu_r5fss0_core1 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region =3D <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; @@ -1363,10 +1369,12 @@ &mcu_r5fss0_core1 { =20 &main_r5fss0 { ti,cluster-mode =3D <0>; + status =3D "okay"; }; =20 &main_r5fss1 { ti,cluster-mode =3D <0>; + status =3D "okay"; }; =20 /* Timers are used by Remoteproc firmware */ @@ -1399,24 +1407,28 @@ &main_timer15 { }; =20 &main_r5fss0_core0 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region =3D <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; =20 &main_r5fss0_core1 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region =3D <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; =20 &main_r5fss1_core0 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region =3D <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; =20 &main_r5fss1_core1 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region =3D <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/= dts/ti/k3-j721e-som-p0.dtsi index 0722f6361cc8..795b041ee733 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi @@ -554,23 +554,31 @@ mbox_c71_0: mbox-c71-0 { }; }; =20 +&mcu_r5fss0 { + status =3D "okay"; +}; + &mcu_r5fss0_core0 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; =20 &mcu_r5fss0_core1 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region =3D <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; }; =20 &main_r5fss0 { + status =3D "okay"; ti,cluster-mode =3D <0>; }; =20 &main_r5fss1 { + status =3D "okay"; ti,cluster-mode =3D <0>; }; =20 @@ -604,24 +612,28 @@ &main_timer15 { }; =20 &main_r5fss0_core0 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region =3D <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; =20 &main_r5fss0_core1 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region =3D <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; =20 &main_r5fss1_core0 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region =3D <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; =20 &main_r5fss1_core1 { + status =3D "okay"; mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region =3D <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; --=20 2.34.1