From nobody Fri Oct 3 23:06:01 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A23A9277C8D; Sat, 23 Aug 2025 12:43:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755953034; cv=none; b=tq4fAZuNYqsJqU5mw3xo4X6V2gVDV5bIGH9mS6U+sbhFC/diaO4M5Q4NCZMl8ioW7D5prrPQiKgQMxhm8VwCVTDogooPJzBdl82xtyPTBiWGX3CQjVFgKUKUIdml0A3Ek94F5etB0T9+tqKnPPVPry8IGS4Vw10JIAerkvLnfew= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755953034; c=relaxed/simple; bh=2MvRqg6db2hlEoYeXL+KXE0Pz5fSjhUlKeSSolL4RgU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ZfvDwpfbTCQ9Ov9Lf7TnUApYmh9sUhbsnMY+34fJv8HyaqrRrxW4m/dyjfyQxN67IXATriM9/8TwC91XiTzq/FIcUJHc7+KHLsr/9FOu4JKZxBJw3J1SxORNzxaABSkLH1q+siFC2BdUfoWgbLGHpdSWDSl14Sr78J0jQJ16Cmg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=FKmQKVs6; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="FKmQKVs6" Received: by smtp.kernel.org (Postfix) with ESMTPS id 543ECC4FDFC; Sat, 23 Aug 2025 12:43:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1755953034; bh=2MvRqg6db2hlEoYeXL+KXE0Pz5fSjhUlKeSSolL4RgU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=FKmQKVs6L26o+932W0nDgQ44U+tN24LtYqn1SnSO9Vj5UvsH41ERmOxKuRqFZvCnm 1Y6xJWsgaEnYqnbpS/iH9A3RvC0n7JKTIyxes2F7r644I9EtJoHlRWcGe47Bz4zjKX dTQjUk+fv+PKBfopAkHkMX6OtJUly3jRJR2Cb47v2Mn9IXbJnYDkpzvDTXQBjIy+k8 qBKXNvPJU4iM3XNlsRgFtqbEOUtF3wku/+unxpa002k0XbZHxKXZy56v3zfxIUl0eK nVxZH+p79Fd9pidQNPe6b/xlGhQ0UO4djMqmHyGIPB+0tLJgtKRhluhLNagIxtGXII ed6+b+177o0Vw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C314CA0EED; Sat, 23 Aug 2025 12:43:54 +0000 (UTC) From: Maud Spierings via B4 Relay Date: Sat, 23 Aug 2025 14:43:52 +0200 Subject: [PATCH 3/3] arm64: dts: rockchip: Enable the NPU on the orangepi 5 boards Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250823-orangepi5-v1-3-ae77dd0e06d7@hotmail.com> References: <20250823-orangepi5-v1-0-ae77dd0e06d7@hotmail.com> In-Reply-To: <20250823-orangepi5-v1-0-ae77dd0e06d7@hotmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Ondrej Jirman Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Maud Spierings X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755953033; l=1851; i=maud_spierings@hotmail.com; s=20241110; h=from:subject:message-id; bh=oBmYWOYe78XM4Z0Bh7EdEdBYV/CCziVSeJYCFliWyGo=; b=/HVPsjCoScbYi0ithXRZqLZtHuyD8mfp54LrdD+vPVXniIw1gI0zTG4LaPUiJycPh1IC4SjNU foRZ8VAIYOFAIwm7Sq5U0k5/Jct24ObIRRPCJqd9hPim2awDBEjlIsc X-Developer-Key: i=maud_spierings@hotmail.com; a=ed25519; pk=CeFKVnZvRfX2QjB1DpdiAe2N+MEjwLEB9Yhx/OAcxRc= X-Endpoint-Received: by B4 Relay for maud_spierings@hotmail.com/20241110 with auth_id=273 X-Original-From: Maud Spierings Reply-To: maud_spierings@hotmail.com From: Maud Spierings Enable the NPU and the PMIC that powers it. Signed-off-by: Maud Spierings Reviewed-by: Ond=C5=99ej Jirman --- .../arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi | 56 ++++++++++++++++++= ++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi b/arch/arm= 64/boot/dts/rockchip/rk3588-orangepi-5.dtsi index 91d56c34a1e456e18db31e1bbe7252b7e4632588..ac1df223d6a25f3059ce3397095= 3745e402ef695 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi @@ -258,6 +258,28 @@ regulator-state-mem { }; }; =20 +&i2c1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c1m2_xfer>; + status =3D "okay"; + + vdd_npu_s0: regulator@42 { + compatible =3D "rockchip,rk8602"; + reg =3D <0x42>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_npu_s0"; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + &i2c6 { clock-frequency =3D <400000>; status =3D "okay"; @@ -352,6 +374,40 @@ &pd_gpu { domain-supply =3D <&vdd_gpu_s0>; }; =20 +&pd_npu { + domain-supply =3D <&vdd_npu_s0>; +}; + +&rknn_core_0 { + npu-supply =3D <&vdd_npu_s0>; + sram-supply =3D <&vdd_npu_s0>; + status =3D "okay"; +}; + +&rknn_core_1 { + npu-supply =3D <&vdd_npu_s0>; + sram-supply =3D <&vdd_npu_s0>; + status =3D "okay"; +}; + +&rknn_core_2 { + npu-supply =3D <&vdd_npu_s0>; + sram-supply =3D <&vdd_npu_s0>; + status =3D "okay"; +}; + +&rknn_mmu_0 { + status =3D "okay"; +}; + +&rknn_mmu_1 { + status =3D "okay"; +}; + +&rknn_mmu_2 { + status =3D "okay"; +}; + &saradc { vref-supply =3D <&vcc_1v8_s0>; status =3D "okay"; --=20 2.50.1