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To overcome these when needed, add a `from_bytes_copy` with a default implementation in the trait. `from_bytes_copy` returns an owned value that is populated using an unaligned read, removing the lifetime constraint and making it usable even on non-aligned byte slices. Signed-off-by: Alexandre Courbot Reviewed-by: Alice Ryhl --- rust/kernel/transmute.rs | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/rust/kernel/transmute.rs b/rust/kernel/transmute.rs index cb33417faa01fd2d87770aac1d2a1539a254cbd6..bea6adaa7e89eb50a03ea1caa08= 70a8e2e12c461 100644 --- a/rust/kernel/transmute.rs +++ b/rust/kernel/transmute.rs @@ -61,6 +61,23 @@ fn from_bytes_mut(bytes: &mut [u8]) -> Option<&mut Self> None } } + + /// Creates an owned instance of `Self` by copying `bytes`. + /// + /// As the data is copied into a properly-aligned location, this metho= d can be used even if + /// [`FromBytes::from_bytes`] would return `None` due to incompatible = alignment. + fn from_bytes_copy(bytes: &[u8]) -> Option + where + Self: Sized, + { + if bytes.len() =3D=3D size_of::() { + // SAFETY: `bytes` has the same size as `Self`, and per the in= variants of `FromBytes`, + // any byte sequence is a valid value for `Self`. + Some(unsafe { core::ptr::read_unaligned(bytes.as_ptr().cast::<= Self>()) }) + } else { + None + } + } } =20 macro_rules! impl_frombytes { --=20 2.50.1 From nobody Fri Oct 3 23:02:07 2025 Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2050.outbound.protection.outlook.com [40.107.243.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B21FF2FD1BE; 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Add basic support for it so subsequent patches can leverage it. Signed-off-by: Alexandre Courbot --- drivers/gpu/nova-core/firmware.rs | 62 +++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 62 insertions(+) diff --git a/drivers/gpu/nova-core/firmware.rs b/drivers/gpu/nova-core/firm= ware.rs index 2931912ddba0ea1fe6d027ccec70b39cdb40344a..ccb4d19f8fa76b0e844252dede5= f50b37c590571 100644 --- a/drivers/gpu/nova-core/firmware.rs +++ b/drivers/gpu/nova-core/firmware.rs @@ -4,11 +4,13 @@ //! to be loaded into a given execution unit. =20 use core::marker::PhantomData; +use core::mem::size_of; =20 use kernel::device; use kernel::firmware; use kernel::prelude::*; use kernel::str::CString; +use kernel::transmute::FromBytes; =20 use crate::dma::DmaObject; use crate::falcon::FalconFirmware; @@ -150,6 +152,66 @@ fn no_patch_signature(self) -> FirmwareDmaObject { } } =20 +/// Header common to most firmware files. +#[repr(C)] +#[derive(Debug, Clone)] +struct BinHdr { + /// Magic number, must be `0x10de`. + bin_magic: u32, + /// Version of the header. + bin_ver: u32, + /// Size in bytes of the binary (to be ignored). + bin_size: u32, + /// Offset of the start of the application-specific header. + header_offset: u32, + /// Offset of the start of the data payload. + data_offset: u32, + /// Size in bytes of the data payload. + data_size: u32, +} + +// SAFETY: all bit patterns are valid for this type, and it doesn't use in= terior mutability. +unsafe impl FromBytes for BinHdr {} + +// A firmware blob starting with a `BinHdr`. +struct BinFirmware<'a> { + hdr: BinHdr, + fw: &'a [u8], +} + +#[expect(dead_code)] +impl<'a> BinFirmware<'a> { + /// Interpret `fw` as a firmware image starting with a [`BinHdr`], and= returns the + /// corresponding [`BinFirmware`] that can be used to extract its payl= oad. + fn new(fw: &'a firmware::Firmware) -> Result { + const BIN_MAGIC: u32 =3D 0x10de; + let fw =3D fw.data(); + + fw.get(0..size_of::()) + // Extract header. + .and_then(BinHdr::from_bytes_copy) + // Validate header. + .and_then(|hdr| { + if hdr.bin_magic =3D=3D BIN_MAGIC { + Some(hdr) + } else { + None + } + }) + .map(|hdr| Self { hdr, fw }) + .ok_or(EINVAL) + } + + /// Returns the data payload of the firmware, or `None` if the data ra= nge is out of bounds of + /// the firmware image. + fn data(&self) -> Option<&[u8]> { + let fw_start =3D self.hdr.data_offset as usize; + let fw_size =3D self.hdr.data_size as usize; + + self.fw.get(fw_start..fw_start + fw_size) + } +} + pub(crate) struct ModInfoBuilder(firmware::ModInfoBuilder<= N>); =20 impl ModInfoBuilder { --=20 2.50.1 From nobody Fri Oct 3 23:02:07 2025 Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2073.outbound.protection.outlook.com [40.107.244.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A4AC02FD7BE; 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Received: from MN2PR12MB3997.namprd12.prod.outlook.com (2603:10b6:208:161::11) by LV2PR12MB5823.namprd12.prod.outlook.com (2603:10b6:408:178::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9031.24; Fri, 22 Aug 2025 12:47:49 +0000 Received: from MN2PR12MB3997.namprd12.prod.outlook.com ([fe80::d161:329:fdd3:e316]) by MN2PR12MB3997.namprd12.prod.outlook.com ([fe80::d161:329:fdd3:e316%5]) with mapi id 15.20.9031.023; Fri, 22 Aug 2025 12:47:49 +0000 From: Alexandre Courbot Date: Fri, 22 Aug 2025 21:47:18 +0900 Subject: [PATCH 3/5] gpu: nova-core: firmware: process Booter and patch its signature Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250822-nova_firmware-v1-3-ff5633679460@nvidia.com> References: <20250822-nova_firmware-v1-0-ff5633679460@nvidia.com> In-Reply-To: <20250822-nova_firmware-v1-0-ff5633679460@nvidia.com> To: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org, nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Alexandre Courbot X-Mailer: b4 0.14.2 X-ClientProxiedBy: TYCPR01CA0148.jpnprd01.prod.outlook.com (2603:1096:400:2b7::7) To MN2PR12MB3997.namprd12.prod.outlook.com (2603:10b6:208:161::11) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN2PR12MB3997:EE_|LV2PR12MB5823:EE_ X-MS-Office365-Filtering-Correlation-Id: bda67405-3c5f-468c-780f-08dde17a19cc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|366016|1800799024|10070799003|921020; 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It is loaded on the sec2 falcon core and is responsible for loading and running the RISC-V GSP bootloader into the GSP core. Add support for parsing the Booter firmware loaded from userspace, patch its signatures, and store it into a form that is ready to be loaded and executed on the sec2 falcon. We do not run it yet, as its own payload (the GSP bootloader and firmware image) still need to be prepared. Signed-off-by: Alexandre Courbot --- drivers/gpu/nova-core/falcon.rs | 4 +- drivers/gpu/nova-core/firmware.rs | 25 ++- drivers/gpu/nova-core/firmware/booter.rs | 356 +++++++++++++++++++++++++++= ++++ drivers/gpu/nova-core/gpu.rs | 11 +- 4 files changed, 386 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon= .rs index 2dbcdf26697beb7e52083675fc9ea62a6167fef8..7bd13481a6a37783309c2d2621a= 6b67b81d55cc5 100644 --- a/drivers/gpu/nova-core/falcon.rs +++ b/drivers/gpu/nova-core/falcon.rs @@ -293,7 +293,7 @@ pub(crate) trait FalconEngine: } =20 /// Represents a portion of the firmware to be loaded into a particular me= mory (e.g. IMEM or DMEM). -#[derive(Debug)] +#[derive(Debug, Clone)] pub(crate) struct FalconLoadTarget { /// Offset from the start of the source object to copy from. pub(crate) src_start: u32, @@ -304,7 +304,7 @@ pub(crate) struct FalconLoadTarget { } =20 /// Parameters for the falcon boot ROM. -#[derive(Debug)] +#[derive(Debug, Clone)] pub(crate) struct FalconBromParams { /// Offset in `DMEM`` of the firmware's signature. pub(crate) pkc_data_offset: u32, diff --git a/drivers/gpu/nova-core/firmware.rs b/drivers/gpu/nova-core/firm= ware.rs index ccb4d19f8fa76b0e844252dede5f50b37c590571..be190af1e11aec26c18c85324a1= 85d135a16eabe 100644 --- a/drivers/gpu/nova-core/firmware.rs +++ b/drivers/gpu/nova-core/firmware.rs @@ -6,6 +6,7 @@ use core::marker::PhantomData; use core::mem::size_of; =20 +use booter::BooterFirmware; use kernel::device; use kernel::firmware; use kernel::prelude::*; @@ -13,10 +14,13 @@ use kernel::transmute::FromBytes; =20 use crate::dma::DmaObject; +use crate::driver::Bar0; use crate::falcon::FalconFirmware; +use crate::falcon::{sec2::Sec2, Falcon}; use crate::gpu; use crate::gpu::Chipset; =20 +pub(crate) mod booter; pub(crate) mod fwsec; =20 pub(crate) const FIRMWARE_VERSION: &str =3D "535.113.01"; @@ -24,14 +28,22 @@ /// Structure encapsulating the firmware blobs required for the GPU to ope= rate. #[expect(dead_code)] pub(crate) struct Firmware { - booter_load: firmware::Firmware, - booter_unload: firmware::Firmware, + /// Runs on the sec2 falcon engine to load and start the GSP bootloade= r. + booter_loader: BooterFirmware, + /// Runs on the sec2 falcon engine to stop and unload a running GSP fi= rmware. + booter_unloader: BooterFirmware, bootloader: firmware::Firmware, gsp: firmware::Firmware, } =20 impl Firmware { - pub(crate) fn new(dev: &device::Device, chipset: Chipset, ver: &str) -= > Result { + pub(crate) fn new( + dev: &device::Device, + sec2: &Falcon, + bar: &Bar0, + chipset: Chipset, + ver: &str, + ) -> Result { let mut chip_name =3D CString::try_from_fmt(fmt!("{chipset}"))?; chip_name.make_ascii_lowercase(); let chip_name =3D &*chip_name; @@ -42,8 +54,10 @@ pub(crate) fn new(dev: &device::Device, chipset: Chipset= , ver: &str) -> Result { fw: &'a [u8], } =20 -#[expect(dead_code)] impl<'a> BinFirmware<'a> { /// Interpret `fw` as a firmware image starting with a [`BinHdr`], and= returns the /// corresponding [`BinFirmware`] that can be used to extract its payl= oad. diff --git a/drivers/gpu/nova-core/firmware/booter.rs b/drivers/gpu/nova-co= re/firmware/booter.rs new file mode 100644 index 0000000000000000000000000000000000000000..108649bdf716eeacaae3098b3c2= 9b2de2813c6ee --- /dev/null +++ b/drivers/gpu/nova-core/firmware/booter.rs @@ -0,0 +1,356 @@ +// SPDX-License-Identifier: GPL-2.0 + +//! Support for loading and patching the `Booter` firmware. `Booter` is a = Heavy Secured firmware +//! running on [`Sec2`], that is used on Turing/Ampere to load the GSP fir= mware into the GSP falcon +//! (and optionally unload it through a separate firmware image). + +use core::marker::PhantomData; +use core::mem::size_of; +use core::ops::Deref; + +use kernel::device; +use kernel::firmware::Firmware; +use kernel::prelude::*; +use kernel::transmute::FromBytes; + +use crate::dma::DmaObject; +use crate::driver::Bar0; +use crate::falcon::sec2::Sec2; +use crate::falcon::{Falcon, FalconBromParams, FalconFirmware, FalconLoadPa= rams, FalconLoadTarget}; +use crate::firmware::{BinFirmware, FirmwareDmaObject, FirmwareSignature, S= igned, Unsigned}; + +/// Local convenience function to return a copy of `S` by reinterpreting t= he bytes starting at +/// `offset` in `slice`. +fn frombytes_at(slice: &[u8], offset: usize) -> Resu= lt { + slice + .get(offset..offset + size_of::()) + .and_then(S::from_bytes_copy) + .ok_or(EINVAL) +} + +/// Heavy-Secured firmware header. +/// +/// Such firmwares have an application-specific payload that needs to be p= atched with a given +/// signature. +#[repr(C)] +#[derive(Debug, Clone)] +struct HsHeaderV2 { + /// Offset to the start of the signatures. + sig_prod_offset: u32, + /// Size in bytes of the signatures. + sig_prod_size: u32, + /// Offset to a `u32` containing the location at which to patch the si= gnature in the microcode + /// image. + patch_loc: u32, + /// Offset to a `u32` containing the index of the signature to patch. + patch_sig: u32, + /// Start offset to the signature metadata. + meta_data_offset: u32, + /// Size in bytes of the signature metadata. + meta_data_size: u32, + /// Offset to a `u32` containing the number of signatures in the signa= tures section. + num_sig: u32, + /// Offset of the application-specific header. + header_offset: u32, + /// Size in bytes of the application-specific header. + header_size: u32, +} + +// SAFETY: all bit patterns are valid for this type, and it doesn't use in= terior mutability. +unsafe impl FromBytes for HsHeaderV2 {} + +/// Heavy-Secured Firmware image container. +/// +/// This provides convenient access to the fields of [`HsHeaderV2`] that a= re actually indices to +/// read from in the firmware data. +struct HsFirmwareV2<'a> { + hdr: HsHeaderV2, + fw: &'a [u8], +} + +impl<'a> HsFirmwareV2<'a> { + /// Interprets the header of `bin_fw` as a [`HsHeaderV2`] and returns = an instance of + /// `HsFirmwareV2` for further parsing. + /// + /// Fails if the header pointed at by `bin_fw` is not within the bound= s of the firmware image. + fn new(bin_fw: &BinFirmware<'a>) -> Result { + frombytes_at::(bin_fw.fw, bin_fw.hdr.header_offset as = usize) + .map(|hdr| Self { hdr, fw: bin_fw.fw }) + } + + /// Returns the location at which the signatures should be patched in = the microcode image. + /// + /// Fails if the offset of the patch location is outside the bounds of= the firmware + /// image. + fn patch_location(&self) -> Result { + frombytes_at::(self.fw, self.hdr.patch_loc as usize) + } + + /// Returns an iterator to the signatures of the firmware. The iterato= r can be empty if the + /// firmware is unsigned. + /// + /// Fails if the pointed signatures are outside the bounds of the firm= ware image. + fn signatures_iter(&'a self) -> Result>> { + let num_sig =3D frombytes_at::(self.fw, self.hdr.num_sig as u= size)?; + let iter =3D match self.hdr.sig_prod_size.checked_div(num_sig) { + // If there are no signatures, return an iterator that will yi= eld zero elements. + None =3D> (&[] as &[u8]).chunks_exact(1), + Some(sig_size) =3D> { + let patch_sig =3D frombytes_at::(self.fw, self.hdr.pa= tch_sig as usize)?; + let signatures_start =3D (self.hdr.sig_prod_offset + patch= _sig) as usize; + + self.fw + // Get signatures range. + .get(signatures_start..signatures_start + self.hdr.sig= _prod_size as usize) + .ok_or(EINVAL)? + .chunks_exact(sig_size as usize) + } + }; + + // Map the byte slices into signatures. + Ok(iter.map(BooterSignature)) + } +} + +/// Signature parameters, as defined in the firmware. +#[repr(C)] +struct HsSignatureParams { + // Fuse version to use. + fuse_ver: u32, + // Mask of engine IDs this firmware applies to. + engine_id_mask: u32, + // ID of the microcode. + ucode_id: u32, +} + +// SAFETY: all bit patterns are valid for this type, and it doesn't use in= terior mutability. +unsafe impl FromBytes for HsSignatureParams {} + +impl HsSignatureParams { + /// Returns the signature parameters contained in `hs_fw`. + /// + /// Fails if the meta data parameter of `hs_fw` is outside the bounds = of the firmware image, or + /// if its size doesn't match that of [`HsSignatureParams`]. + fn new(hs_fw: &HsFirmwareV2<'_>) -> Result { + let start =3D hs_fw.hdr.meta_data_offset as usize; + let end =3D start + .checked_add(hs_fw.hdr.meta_data_size as usize) + .ok_or(EINVAL)?; + + hs_fw + .fw + .get(start..end) + .and_then(Self::from_bytes_copy) + .ok_or(EINVAL) + } +} + +/// Header for code and data load offsets. +#[repr(C)] +#[derive(Debug, Clone)] +struct HsLoadHeaderV2 { + // Offset at which the code starts. + os_code_offset: u32, + // Total size of the code, for all apps. + os_code_size: u32, + // Offset at which the data starts. + os_data_offset: u32, + // Size of the data. + os_data_size: u32, + // Number of apps following this header. Each app is described by a [`= HsLoadHeaderV2App`]. + num_apps: u32, +} + +// SAFETY: all bit patterns are valid for this type, and it doesn't use in= terior mutability. +unsafe impl FromBytes for HsLoadHeaderV2 {} + +impl HsLoadHeaderV2 { + /// Returns the load header contained in `hs_fw`. + /// + /// Fails if the header pointed at by `hs_fw` is not within the bounds= of the firmware image. + fn new(hs_fw: &HsFirmwareV2<'_>) -> Result { + frombytes_at::(hs_fw.fw, hs_fw.hdr.header_offset as usize) + } +} + +/// Header for app code loader. +#[repr(C)] +#[derive(Debug, Clone)] +struct HsLoadHeaderV2App { + /// Offset at which to load the app code. + offset: u32, + /// Length in bytes of the app code. + len: u32, +} + +// SAFETY: all bit patterns are valid for this type, and it doesn't use in= terior mutability. +unsafe impl FromBytes for HsLoadHeaderV2App {} + +impl HsLoadHeaderV2App { + /// Returns the [`HsLoadHeaderV2App`] for app `idx` of `hs_fw`. + /// + /// Fails if `idx` is larger than the number of apps declared in `hs_f= w`, or if the header is + /// not within the bounds of the firmware image. + fn new(hs_fw: &HsFirmwareV2<'_>, idx: u32) -> Result { + let load_hdr =3D HsLoadHeaderV2::new(hs_fw)?; + if idx >=3D load_hdr.num_apps { + Err(EINVAL) + } else { + frombytes_at::( + hs_fw.fw, + (hs_fw.hdr.header_offset as usize) + // Skip the load header... + .checked_add(size_of::()) + // ... and jump to app header `idx`. + .and_then(|offset| { + offset.checked_add((idx as usize).checked_mul(size= _of::())?) + }) + .ok_or(EINVAL)?, + ) + } + } +} + +/// Signature for Booter firmware. Their size is encoded into the header a= nd not known a compile +/// time, so we just wrap a byte slices on which we can implement [`Firmwa= reSignature`]. +struct BooterSignature<'a>(&'a [u8]); + +impl<'a> AsRef<[u8]> for BooterSignature<'a> { + fn as_ref(&self) -> &[u8] { + self.0 + } +} + +impl<'a> FirmwareSignature for BooterSignature<'a> {} + +/// The `Booter` loader firmware, responsible for loading the GSP. +pub(crate) struct BooterFirmware { + // Load parameters for `IMEM` falcon memory. + imem_load_target: FalconLoadTarget, + // Load parameters for `DMEM` falcon memory. + dmem_load_target: FalconLoadTarget, + // BROM falcon parameters. + brom_params: FalconBromParams, + // Device-mapped firmware image. + ucode: FirmwareDmaObject, +} + +impl FirmwareDmaObject { + fn new_booter(dev: &device::Device, data: &[u8]) -> Res= ult { + DmaObject::from_data(dev, data).map(|ucode| Self(ucode, PhantomDat= a)) + } +} + +impl BooterFirmware { + /// Parses the Booter firmware contained in `fw`, and patches the corr= ect signature so it is + /// ready to be loaded and run on `falcon`. + pub(crate) fn new( + dev: &device::Device, + fw: &Firmware, + falcon: &Falcon<::Target>, + bar: &Bar0, + ) -> Result { + let bin_fw =3D BinFirmware::new(fw)?; + // The binary firmware embeds a Heavy-Secured firmware. + let hs_fw =3D HsFirmwareV2::new(&bin_fw)?; + // The Heavy-Secured firmware embeds a firmware load descriptor. + let load_hdr =3D HsLoadHeaderV2::new(&hs_fw)?; + // Offset in `ucode` where to patch the signature. + let patch_loc =3D hs_fw.patch_location()?; + let sig_params =3D HsSignatureParams::new(&hs_fw)?; + let brom_params =3D FalconBromParams { + // `load_hdr.os_data_offset` is an absolute index, but `pkc_da= ta_offset` is from the + // signature patch location. + pkc_data_offset: patch_loc + .checked_sub(load_hdr.os_data_offset) + .ok_or(EINVAL)?, + engine_id_mask: u16::try_from(sig_params.engine_id_mask).map_e= rr(|_| EINVAL)?, + ucode_id: u8::try_from(sig_params.ucode_id).map_err(|_| EINVAL= )?, + }; + let app0 =3D HsLoadHeaderV2App::new(&hs_fw, 0)?; + + // Object containing the firmware microcode to be signature-patche= d. + let ucode =3D bin_fw + .data() + .ok_or(EINVAL) + .and_then(|data| FirmwareDmaObject::::new_booter(dev,= data))?; + + let ucode_signed =3D { + let mut signatures =3D hs_fw.signatures_iter()?.peekable(); + + if signatures.peek().is_none() { + // If there are no signatures, then the firmware is unsign= ed. + ucode.no_patch_signature() + } else { + // Obtain the version from the fuse register, and extract = the corresponding + // signature. + let reg_fuse_version =3D falcon.signature_reg_fuse_version( + bar, + brom_params.engine_id_mask, + brom_params.ucode_id, + )?; + + let signature =3D match reg_fuse_version { + // `0` means the last signature should be used. + 0 =3D> signatures.last(), + // Otherwise hardware fuse version needs to be substra= cted to obtain the index. + reg_fuse_version =3D> { + let Some(idx) =3D sig_params.fuse_ver.checked_sub(= reg_fuse_version) else { + dev_err!(dev, "invalid fuse version for Booter= firmware\n"); + return Err(EINVAL); + }; + signatures.nth(idx as usize) + } + } + .ok_or(EINVAL)?; + + ucode.patch_signature(&signature, patch_loc as usize)? + } + }; + + Ok(Self { + imem_load_target: FalconLoadTarget { + src_start: app0.offset, + dst_start: 0, + len: app0.len, + }, + dmem_load_target: FalconLoadTarget { + src_start: load_hdr.os_data_offset, + dst_start: 0, + len: load_hdr.os_data_size, + }, + brom_params, + ucode: ucode_signed, + }) + } +} + +impl FalconLoadParams for BooterFirmware { + fn imem_load_params(&self) -> FalconLoadTarget { + self.imem_load_target.clone() + } + + fn dmem_load_params(&self) -> FalconLoadTarget { + self.dmem_load_target.clone() + } + + fn brom_params(&self) -> FalconBromParams { + self.brom_params.clone() + } + + fn boot_addr(&self) -> u32 { + self.imem_load_target.src_start + } +} + +impl Deref for BooterFirmware { + type Target =3D DmaObject; + + fn deref(&self) -> &Self::Target { + &self.ucode.0 + } +} + +impl FalconFirmware for BooterFirmware { + type Target =3D Sec2; +} diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs index 8caecaf7dfb4820a96a568a05653dbdf808a3719..54f0e9fd587ae5c4c045096930c= 0548fb1ef1b86 100644 --- a/drivers/gpu/nova-core/gpu.rs +++ b/drivers/gpu/nova-core/gpu.rs @@ -269,7 +269,6 @@ pub(crate) fn new( ) -> Result> { let bar =3D devres_bar.access(pdev.as_ref())?; let spec =3D Spec::new(bar)?; - let fw =3D Firmware::new(pdev.as_ref(), spec.chipset, FIRMWARE_VER= SION)?; =20 dev_info!( pdev.as_ref(), @@ -293,7 +292,15 @@ pub(crate) fn new( )?; gsp_falcon.clear_swgen0_intr(bar); =20 - let _sec2_falcon =3D Falcon::::new(pdev.as_ref(), spec.chips= et, bar, true)?; + let sec2_falcon =3D Falcon::::new(pdev.as_ref(), spec.chipse= t, bar, true)?; + + let fw =3D Firmware::new( + pdev.as_ref(), + &sec2_falcon, + bar, + spec.chipset, + FIRMWARE_VERSION, + )?; =20 let fb_layout =3D FbLayout::new(spec.chipset, bar)?; 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It is a regular binary firmware file containing a specific header. Create a type holding the DMA-mapped firmware as well as useful information extracted from the header, and hook it into our firmware structure for later use. Signed-off-by: Alexandre Courbot --- drivers/gpu/nova-core/firmware.rs | 7 ++- drivers/gpu/nova-core/firmware/riscv.rs | 89 +++++++++++++++++++++++++++++= ++++ 2 files changed, 94 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/nova-core/firmware.rs b/drivers/gpu/nova-core/firm= ware.rs index be190af1e11aec26c18c85324a185d135a16eabe..7006696bb8e8ec0d7fa3a94fb93= 1d5f0b21fb79d 100644 --- a/drivers/gpu/nova-core/firmware.rs +++ b/drivers/gpu/nova-core/firmware.rs @@ -12,6 +12,7 @@ use kernel::prelude::*; use kernel::str::CString; use kernel::transmute::FromBytes; +use riscv::RiscvFirmware; =20 use crate::dma::DmaObject; use crate::driver::Bar0; @@ -22,6 +23,7 @@ =20 pub(crate) mod booter; pub(crate) mod fwsec; +pub(crate) mod riscv; =20 pub(crate) const FIRMWARE_VERSION: &str =3D "535.113.01"; =20 @@ -32,7 +34,8 @@ pub(crate) struct Firmware { booter_loader: BooterFirmware, /// Runs on the sec2 falcon engine to stop and unload a running GSP fi= rmware. booter_unloader: BooterFirmware, - bootloader: firmware::Firmware, + /// GSP bootloader, verifies the GSP firmware before loading and runni= ng it. + bootloader: RiscvFirmware, gsp: firmware::Firmware, } =20 @@ -58,7 +61,7 @@ pub(crate) fn new( .and_then(|fw| BooterFirmware::new(dev, &fw, sec2, bar))?, booter_unloader: request("booter_unload") .and_then(|fw| BooterFirmware::new(dev, &fw, sec2, bar))?, - bootloader: request("bootloader")?, + bootloader: request("bootloader").and_then(|fw| RiscvFirmware:= :new(dev, &fw))?, gsp: request("gsp")?, }) } diff --git a/drivers/gpu/nova-core/firmware/riscv.rs b/drivers/gpu/nova-cor= e/firmware/riscv.rs new file mode 100644 index 0000000000000000000000000000000000000000..926883230f2fe4e3327713e28b7= fae31ebee60bb --- /dev/null +++ b/drivers/gpu/nova-core/firmware/riscv.rs @@ -0,0 +1,89 @@ +// SPDX-License-Identifier: GPL-2.0 + +//! Support for firmware binaries designed to run on a RISC-V cores. Such = firmwares have a +//! dedicated header. + +use kernel::device; +use kernel::firmware::Firmware; +use kernel::prelude::*; +use kernel::transmute::FromBytes; + +use crate::dma::DmaObject; +use crate::firmware::BinFirmware; + +/// Descriptor for microcode running on a RISC-V core. +#[repr(C)] +#[derive(Debug)] +struct RmRiscvUCodeDesc { + version: u32, + bootloader_offset: u32, + bootloader_size: u32, + bootloader_param_offset: u32, + bootloader_param_size: u32, + riscv_elf_offset: u32, + riscv_elf_size: u32, + app_version: u32, + manifest_offset: u32, + manifest_size: u32, + monitor_data_offset: u32, + monitor_data_size: u32, + monitor_code_offset: u32, + monitor_code_size: u32, +} + +// SAFETY: all bit patterns are valid for this type, and it doesn't use in= terior mutability. +unsafe impl FromBytes for RmRiscvUCodeDesc {} + +impl RmRiscvUCodeDesc { + /// Interprets the header of `bin_fw` as a [`RmRiscvUCodeDesc`] and re= turns it. + /// + /// Fails if the header pointed at by `bin_fw` is not within the bound= s of the firmware image. + fn new(bin_fw: &BinFirmware<'_>) -> Result { + let offset =3D bin_fw.hdr.header_offset as usize; + + bin_fw + .fw + .get(offset..offset + size_of::()) + .and_then(Self::from_bytes_copy) + .ok_or(EINVAL) + } +} + +/// A parsed firmware for a RISC-V core, ready to be loaded and run. +#[expect(unused)] +pub(crate) struct RiscvFirmware { + /// Offset at which the code starts in the firmware image. + code_offset: u32, + /// Offset at which the data starts in the firmware image. + data_offset: u32, + /// Offset at which the manifest starts in the firmware image. + manifest_offset: u32, + /// Application version. + app_version: u32, + /// Device-mapped firmware image. + ucode: DmaObject, +} + +impl RiscvFirmware { + // Parses the RISC-V firmware image contained in `fw`. + pub(crate) fn new(dev: &device::Device, fw: &Firmware) = -> Result { + let bin_fw =3D BinFirmware::new(fw)?; + + let riscv_desc =3D RmRiscvUCodeDesc::new(&bin_fw)?; + + let ucode =3D { + let start =3D bin_fw.hdr.data_offset as usize; + let len =3D bin_fw.hdr.data_size as usize; + + DmaObject::from_data(dev, fw.data().get(start..start + len).ok= _or(EINVAL)?)? + }; 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Its presentation is a bit peculiar as the GSP bootloader expects to be given a DMA address to a 3-levels page table mapping the GSP firmware at address 0 of its own address space. Prepare such a structure containing the DMA-mapped firmware as well as the DMA-mapped page tables, and a way to obtain the DMA handle of the level 0 page table. As we are performing the required ELF section parsing and radix3 page table building, remove these items from the TODO file. Signed-off-by: Alexandre Courbot --- Documentation/gpu/nova/core/todo.rst | 17 ----- drivers/gpu/nova-core/firmware.rs | 108 ++++++++++++++++++++++++++++++- drivers/gpu/nova-core/firmware/gsp.rs | 116 ++++++++++++++++++++++++++++++= ++++ drivers/gpu/nova-core/gsp.rs | 4 ++ drivers/gpu/nova-core/nova_core.rs | 1 + 5 files changed, 226 insertions(+), 20 deletions(-) diff --git a/Documentation/gpu/nova/core/todo.rst b/Documentation/gpu/nova/= core/todo.rst index 89431fec9041b1f35cc55799c91f48dc6bc918eb..0972cb905f7ae64dfbaef480827= 6757319009e9c 100644 --- a/Documentation/gpu/nova/core/todo.rst +++ b/Documentation/gpu/nova/core/todo.rst @@ -229,23 +229,6 @@ Rust abstraction for debugfs APIs. GPU (general) =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 -Parse firmware headers ----------------------- - -Parse ELF headers from the firmware files loaded from the filesystem. - -| Reference: ELF utils -| Complexity: Beginner -| Contact: Abdiel Janulgue - -Build radix3 page table ------------------------ - -Build the radix3 page table to map the firmware. - -| Complexity: Intermediate -| Contact: Abdiel Janulgue - Initial Devinit support ----------------------- =20 diff --git a/drivers/gpu/nova-core/firmware.rs b/drivers/gpu/nova-core/firm= ware.rs index 7006696bb8e8ec0d7fa3a94fb931d5f0b21fb79d..b97fe53487cab12069961b132ba= 989a88d3ace81 100644 --- a/drivers/gpu/nova-core/firmware.rs +++ b/drivers/gpu/nova-core/firmware.rs @@ -7,6 +7,7 @@ use core::mem::size_of; =20 use booter::BooterFirmware; +use gsp::GspFirmware; use kernel::device; use kernel::firmware; use kernel::prelude::*; @@ -19,14 +20,98 @@ use crate::falcon::FalconFirmware; use crate::falcon::{sec2::Sec2, Falcon}; use crate::gpu; -use crate::gpu::Chipset; +use crate::gpu::{Architecture, Chipset}; =20 pub(crate) mod booter; pub(crate) mod fwsec; +pub(crate) mod gsp; pub(crate) mod riscv; =20 pub(crate) const FIRMWARE_VERSION: &str =3D "535.113.01"; =20 +/// Ad-hoc and temporary module to extract sections from ELF images. +/// +/// Some firmware images are currently packaged as ELF files, where sectio= ns names are used as keys +/// to specific and related bits of data. Future firmware versions are sch= eduled to move away from +/// that scheme before nova-core becomes stable, which means this module w= ill eventually be +/// removed. +mod elf { + use kernel::bindings; + use kernel::str::CStr; + use kernel::transmute::FromBytes; + + /// Newtype to provide a [`FromBytes`] implementation. + #[repr(transparent)] + struct Elf64Hdr(bindings::elf64_hdr); + + // SAFETY: all bit patterns are valid for this type, and it doesn't us= e interior mutability. + unsafe impl FromBytes for Elf64Hdr {} + + /// Tries to extract section with name `name` from the ELF64 image `el= f`, and returns it. + pub(super) fn elf64_section<'a, 'b>(elf: &'a [u8], name: &'b str) -> O= ption<&'a [u8]> { + let hdr =3D &elf + .get(0..size_of::()) + .and_then(Elf64Hdr::from_bytes)? + .0; + + let shdr_num =3D usize::from(hdr.e_shnum); + let shdr_start =3D usize::try_from(hdr.e_shoff).ok()?; + let shdr_end =3D shdr_num + .checked_mul(size_of::()) + .and_then(|v| v.checked_add(shdr_start))?; + // Get all the section headers. + let shdr =3D elf + .get(shdr_start..shdr_end) + .map(|slice| slice.as_ptr()) + .filter(|ptr| ptr.align_offset(align_of::()) =3D=3D 0) + // `FromBytes::from_bytes` does not support slices yet, so bui= ld it manually. + // + // SAFETY: + // * `get` guarantees that the slice is within the bounds of `= elf` and of size + // `elf64_shdr * shdr_num`. + // * We checked that `ptr` had the correct alignment for `elf6= 4_shdr`. + .map(|ptr| unsafe { + core::slice::from_raw_parts(ptr.cast::(), shdr_num) + })?; + + // Get the strings table. + let strhdr =3D shdr.get(usize::from(hdr.e_shstrndx))?; + + // Find the section which name matches `name` and return it. + shdr.iter() + .find(|sh| { + let Some(name_idx) =3D strhdr + .sh_offset + .checked_add(u64::from(sh.sh_name)) + .and_then(|idx| usize::try_from(idx).ok()) + else { + return false; + }; + + // Get the start of the name. + elf.get(name_idx..) + // Stop at the first `0`. + .and_then(|nstr| nstr.get(0..=3Dnstr.iter().position(|= b| *b =3D=3D 0)?)) + // Convert into CStr. This should never fail because o= f the line above. + .and_then(|nstr| CStr::from_bytes_with_nul(nstr).ok()) + // Convert into str. + .and_then(|c_str| c_str.to_str().ok()) + // Check that the name matches. + .map(|str| str =3D=3D name) + .unwrap_or(false) + }) + // Return the slice containing the section. + .and_then(|sh| { + let start =3D usize::try_from(sh.sh_offset).ok()?; + let end =3D usize::try_from(sh.sh_size) + .ok() + .and_then(|sh_size| start.checked_add(sh_size))?; + + elf.get(start..end) + }) + } +} + /// Structure encapsulating the firmware blobs required for the GPU to ope= rate. #[expect(dead_code)] pub(crate) struct Firmware { @@ -36,7 +121,10 @@ pub(crate) struct Firmware { booter_unloader: BooterFirmware, /// GSP bootloader, verifies the GSP firmware before loading and runni= ng it. bootloader: RiscvFirmware, - gsp: firmware::Firmware, + /// GSP firmware. + gsp: GspFirmware, + /// GSP signatures, to be passed as parameter to the bootloader for va= lidation. + gsp_sigs: DmaObject, } =20 impl Firmware { @@ -56,13 +144,27 @@ pub(crate) fn new( .and_then(|path| firmware::Firmware::request(&path, dev)) }; =20 + let gsp_fw =3D request("gsp")?; + let gsp =3D elf::elf64_section(gsp_fw.data(), ".fwimage") + .ok_or(EINVAL) + .and_then(|data| GspFirmware::new(dev, data))?; + + let gsp_sigs_section =3D match chipset.arch() { + Architecture::Ampere =3D> ".fwsignature_ga10x", + _ =3D> return Err(ENOTSUPP), + }; + let gsp_sigs =3D elf::elf64_section(gsp_fw.data(), gsp_sigs_sectio= n) + .ok_or(EINVAL) + .and_then(|data| DmaObject::from_data(dev, data))?; + Ok(Firmware { booter_loader: request("booter_load") .and_then(|fw| BooterFirmware::new(dev, &fw, sec2, bar))?, booter_unloader: request("booter_unload") .and_then(|fw| BooterFirmware::new(dev, &fw, sec2, bar))?, bootloader: request("bootloader").and_then(|fw| RiscvFirmware:= :new(dev, &fw))?, - gsp: request("gsp")?, + gsp, + gsp_sigs, }) } } diff --git a/drivers/gpu/nova-core/firmware/gsp.rs b/drivers/gpu/nova-core/= firmware/gsp.rs new file mode 100644 index 0000000000000000000000000000000000000000..34714156e40c0b41e7d6f67b7ab= e9d76659b5d18 --- /dev/null +++ b/drivers/gpu/nova-core/firmware/gsp.rs @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: GPL-2.0 + +use kernel::device; +use kernel::dma::DataDirection; +use kernel::dma::DmaAddress; +use kernel::prelude::*; +use kernel::scatterlist::Owned; +use kernel::scatterlist::SGTable; + +use crate::dma::DmaObject; +use crate::gsp::GSP_PAGE_SIZE; + +/// A device-mapped firmware with a set of (also device-mapped) pages tabl= es mapping the firmware +/// to the start of their own address space. +pub(crate) struct GspFirmware { + /// The GSP firmware inside a [`VVec`], device-mapped via a SG table. + #[expect(unused)] + fw: Pin>>>>, + /// The level 2 page table, mapping [`Self::fw`] at its beginning. + #[expect(unused)] + lvl2: Pin>>>>, + /// The level 1 page table, mapping [`Self::lvl2`] at its beginning. + #[expect(unused)] + lvl1: Pin>>>>, + /// The level 0 page table, mapping [`Self::lvl1`] at its beginning. + lvl0: DmaObject, + /// Size in bytes of the firmware contained in [`Self::fw`]. + #[expect(unused)] + pub size: usize, +} + +impl GspFirmware { + pub(crate) fn new(dev: &device::Device, fw: &[u8]) -> R= esult { + // Move the firmware into a vmalloc'd vector and map it into the d= evice address space. + let fw_sg_table =3D VVec::with_capacity(fw.len(), GFP_KERNEL) + .and_then(|mut v| { + v.extend_from_slice(fw, GFP_KERNEL)?; + Ok(v) + }) + .map_err(|_| ENOMEM) + .and_then(|v| { + KBox::pin_init( + SGTable::new(dev, v, DataDirection::ToDevice, GFP_KERN= EL), + GFP_KERNEL, + ) + })?; + + // Allocate the level 2 page table, map the firmware onto it, and = map it into the device + // address space. + let lvl2_sg_table =3D VVec::::with_capacity( + fw_sg_table.into_iter().count() * core::mem::size_of::(), + GFP_KERNEL, + ) + .map_err(|_| ENOMEM) + .and_then(|lvl2| map_into_lvl(&fw_sg_table, lvl2)) + .and_then(|lvl2| { + KBox::pin_init( + SGTable::new(dev, lvl2, DataDirection::ToDevice, GFP_KERNE= L), + GFP_KERNEL, + ) + })?; + + // Allocate the level 1 page table, map the level 2 page table ont= o it, and map it into the + // device address space. + let lvl1_sg_table =3D VVec::::with_capacity( + lvl2_sg_table.into_iter().count() * core::mem::size_of::(= ), + GFP_KERNEL, + ) + .map_err(|_| ENOMEM) + .and_then(|lvl1| map_into_lvl(&lvl2_sg_table, lvl1)) + .and_then(|lvl1| { + KBox::pin_init( + SGTable::new(dev, lvl1, DataDirection::ToDevice, GFP_KERNE= L), + GFP_KERNEL, + ) + })?; + + // Allocate the level 0 page table as a device-visible DMA object,= and map the level 1 page + // table onto it. + let mut lvl0 =3D DmaObject::new(dev, GSP_PAGE_SIZE)?; + // SAFETY: we are the only owner of this newly-created object, mak= ing races impossible. + let lvl0_slice =3D unsafe { lvl0.as_slice_mut(0, GSP_PAGE_SIZE) }?; + lvl0_slice[0..core::mem::size_of::()].copy_from_slice( + &(lvl1_sg_table.into_iter().next().unwrap().dma_address() as u= 64).to_le_bytes(), + ); + + Ok(Self { + fw: fw_sg_table, + lvl2: lvl2_sg_table, + lvl1: lvl1_sg_table, + lvl0, + size: fw.len(), + }) + } + + #[expect(unused)] + /// Returns the DMA handle of the level 0 page table. + pub(crate) fn lvl0_dma_handle(&self) -> DmaAddress { + self.lvl0.dma_handle() + } +} + +/// Create a linear mapping the device mapping of the buffer described by = `sg_table` into `dst`. +fn map_into_lvl(sg_table: &SGTable>>, mut dst: VVec) ->= Result> { + for sg_entry in sg_table.into_iter() { + // Number of pages we need to map. + let num_pages =3D (sg_entry.dma_len() as usize).div_ceil(GSP_PAGE_= SIZE); + + for i in 0..num_pages { + let entry =3D sg_entry.dma_address() + (i as u64 * GSP_PAGE_SI= ZE as u64); + dst.extend_from_slice(&entry.to_le_bytes(), GFP_KERNEL)?; + } + } + + Ok(dst) +} diff --git a/drivers/gpu/nova-core/gsp.rs b/drivers/gpu/nova-core/gsp.rs new file mode 100644 index 0000000000000000000000000000000000000000..a0e7ec5f6c9c959d57540b3ebf4= b782f2e002b08 --- /dev/null +++ b/drivers/gpu/nova-core/gsp.rs @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 + +pub(crate) const GSP_PAGE_SHIFT: usize =3D 12; +pub(crate) const GSP_PAGE_SIZE: usize =3D 1 << GSP_PAGE_SHIFT; diff --git a/drivers/gpu/nova-core/nova_core.rs b/drivers/gpu/nova-core/nov= a_core.rs index cb2bbb30cba142265b354c9acf70349a6e40759e..fffcaee2249fe6cd7f55a7291c1= e44be42e791d9 100644 --- a/drivers/gpu/nova-core/nova_core.rs +++ b/drivers/gpu/nova-core/nova_core.rs @@ -9,6 +9,7 @@ mod firmware; mod gfw; mod gpu; +mod gsp; mod regs; mod util; mod vbios; --=20 2.50.1