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[144.49.247.16]) by smtp-relay.gmail.com with ESMTPS id e9e14a558f8ab-3e66c124d82sm8276995ab.0.2025.08.21.08.48.40 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Aug 2025 08:48:40 -0700 (PDT) X-Relaying-Domain: broadcom.com X-CFilter-Loop: Reflected Received: by mail-pf1-f197.google.com with SMTP id d2e1a72fcca58-76e2eaecf8dso1041383b3a.2 for ; Thu, 21 Aug 2025 08:48:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1755791319; x=1756396119; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HYf3/91+Ggro3qYj50Zi0ilckNcBqI+ODmew6HKIUhk=; b=N7wxc9fTjMwVBUytuNLwitfYhTlDqXw0GkJ6qDxdD36o8Y5uCAmSo1pxNI4RiS73kw nKBzTk+UCXR22emgw0PV5tg/2+365D3pyaYm774YVQ4rMm2ATaG61gVpO96UgXi4kGiF ljx2iXnnwSs+FLLNeK6absnH32iX+ftigkSg4= X-Forwarded-Encrypted: i=1; AJvYcCX9vH7YrQHoo3TjLQT+ccS+yCYCzj4y1+GAbA3p6vhMWpPErcHfi6rq3FT823LtTGO3tmCzJtd4d2WjshI=@vger.kernel.org X-Received: by 2002:a05:6a20:5491:b0:243:755:58b8 with SMTP id adf61e73a8af0-24330b3b230mr4062838637.57.1755791318719; Thu, 21 Aug 2025 08:48:38 -0700 (PDT) X-Received: by 2002:a05:6a20:5491:b0:243:755:58b8 with SMTP id adf61e73a8af0-24330b3b230mr4062799637.57.1755791318208; Thu, 21 Aug 2025 08:48:38 -0700 (PDT) Received: from hyd-csg-thor2-h1-server2.dhcp.broadcom.net ([192.19.203.250]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b47640b2d37sm5046894a12.46.2025.08.21.08.48.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Aug 2025 08:48:37 -0700 (PDT) From: Bhargava Marreddy To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, andrew+netdev@lunn.ch, horms@kernel.org Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, michael.chan@broadcom.com, pavan.chebbi@broadcom.com, vsrama-krishna.nemani@broadcom.com, Bhargava Marreddy , Vikas Gupta , Rajashekar Hudumula Subject: [v3, net-next 1/9] bng_en: Add initial support for RX and TX rings Date: Thu, 21 Aug 2025 21:15:09 +0000 Message-ID: <20250821211517.16578-2-bhargava.marreddy@broadcom.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20250821211517.16578-1-bhargava.marreddy@broadcom.com> References: <20250821211517.16578-1-bhargava.marreddy@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-DetectorID-Processed: b00c1d49-9d2e-4205-b15f-d015386d3d5e Content-Type: text/plain; charset="utf-8" Allocate data structures to support RX, AGG, and TX rings. While data structures for RX/AGG rings are allocated, initialise the page pool accordingly. Signed-off-by: Bhargava Marreddy Reviewed-by: Vikas Gupta Reviewed-by: Rajashekar Hudumula --- drivers/net/ethernet/broadcom/Kconfig | 1 + drivers/net/ethernet/broadcom/bnge/bnge.h | 1 + .../net/ethernet/broadcom/bnge/bnge_netdev.c | 343 +++++++++++++++++- .../net/ethernet/broadcom/bnge/bnge_netdev.h | 90 ++++- .../net/ethernet/broadcom/bnge/bnge_rmem.c | 58 +++ .../net/ethernet/broadcom/bnge/bnge_rmem.h | 12 + 6 files changed, 502 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/broadcom/Kconfig b/drivers/net/ethernet/b= roadcom/Kconfig index 0fc10e6c6902..9fdef874f5ca 100644 --- a/drivers/net/ethernet/broadcom/Kconfig +++ b/drivers/net/ethernet/broadcom/Kconfig @@ -257,6 +257,7 @@ config BNGE tristate "Broadcom Ethernet device support" depends on PCI select NET_DEVLINK + select PAGE_POOL help This driver supports Broadcom 50/100/200/400/800 gigabit Ethernet cards. The module will be called bng_en. To compile this driver as a module, diff --git a/drivers/net/ethernet/broadcom/bnge/bnge.h b/drivers/net/ethern= et/broadcom/bnge/bnge.h index 1560ec676ae0..2d3b2fd57be4 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge.h @@ -133,6 +133,7 @@ struct bnge_dev { =20 unsigned long state; #define BNGE_STATE_DRV_REGISTERED 0 +#define BNGE_STATE_OPEN 1 =20 u64 fw_cap; =20 diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.c index 02254934f3d0..9fbb1c385fe8 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c @@ -14,10 +14,331 @@ #include #include #include +#include =20 #include "bnge.h" #include "bnge_hwrm_lib.h" #include "bnge_ethtool.h" +#include "bnge_rmem.h" + +#define BNGE_RING_TO_TC_OFF(bd, tx) \ + ((tx) % (bd)->tx_nr_rings_per_tc) + +#define BNGE_RING_TO_TC(bd, tx) \ + ((tx) / (bd)->tx_nr_rings_per_tc) + +static bool bnge_separate_head_pool(struct bnge_rx_ring_info *rxr) +{ + return rxr->need_head_pool || PAGE_SIZE > BNGE_RX_PAGE_SIZE; +} + +static void bnge_free_rx_rings(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i; + + if (!bn->rx_ring) + return; + + for (i =3D 0; i < bd->rx_nr_rings; i++) { + struct bnge_rx_ring_info *rxr =3D &bn->rx_ring[i]; + struct bnge_ring_struct *ring; + + page_pool_destroy(rxr->page_pool); + if (bnge_separate_head_pool(rxr)) + page_pool_destroy(rxr->head_pool); + rxr->page_pool =3D rxr->head_pool =3D NULL; + + kfree(rxr->rx_agg_bmap); + rxr->rx_agg_bmap =3D NULL; + + ring =3D &rxr->rx_ring_struct; + bnge_free_ring(bd, &ring->ring_mem); + + ring =3D &rxr->rx_agg_ring_struct; + bnge_free_ring(bd, &ring->ring_mem); + } +} + +static int bnge_alloc_rx_page_pool(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr, + int numa_node) +{ + const unsigned int agg_size_fac =3D PAGE_SIZE / BNGE_RX_PAGE_SIZE; + const unsigned int rx_size_fac =3D PAGE_SIZE / SZ_4K; + struct page_pool_params pp =3D { 0 }; + struct bnge_dev *bd =3D bn->bd; + struct page_pool *pool; + + pp.pool_size =3D bn->rx_agg_ring_size / agg_size_fac; + pp.nid =3D numa_node; + pp.napi =3D &rxr->bnapi->napi; + pp.netdev =3D bn->netdev; + pp.dev =3D bd->dev; + pp.dma_dir =3D bn->rx_dir; + pp.max_len =3D PAGE_SIZE; + pp.flags =3D PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV | + PP_FLAG_ALLOW_UNREADABLE_NETMEM; + pp.queue_idx =3D rxr->bnapi->index; + + pool =3D page_pool_create(&pp); + if (IS_ERR(pool)) + return PTR_ERR(pool); + rxr->page_pool =3D pool; + + rxr->need_head_pool =3D page_pool_is_unreadable(pool); + if (bnge_separate_head_pool(rxr)) { + pp.pool_size =3D min(bn->rx_ring_size / rx_size_fac, 1024); + pp.flags =3D PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV; + pool =3D page_pool_create(&pp); + if (IS_ERR(pool)) + goto err_destroy_pp; + } + rxr->head_pool =3D pool; + + return 0; + +err_destroy_pp: + page_pool_destroy(rxr->page_pool); + rxr->page_pool =3D NULL; + return PTR_ERR(pool); +} + +static int bnge_alloc_rx_agg_bmap(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr) +{ + u16 mem_size; + + rxr->rx_agg_bmap_size =3D bn->rx_agg_ring_mask + 1; + mem_size =3D rxr->rx_agg_bmap_size / 8; + rxr->rx_agg_bmap =3D kzalloc(mem_size, GFP_KERNEL); + if (!rxr->rx_agg_bmap) + return -ENOMEM; + + return 0; +} + +static int bnge_alloc_rx_rings(struct bnge_net *bn) +{ + int i, rc =3D 0, agg_rings =3D 0, cpu; + struct bnge_dev *bd =3D bn->bd; + + if (!bn->rx_ring) + return -ENOMEM; + + if (bnge_is_agg_reqd(bd)) + agg_rings =3D 1; + + for (i =3D 0; i < bd->rx_nr_rings; i++) { + struct bnge_rx_ring_info *rxr =3D &bn->rx_ring[i]; + struct bnge_ring_struct *ring; + int cpu_node; + + ring =3D &rxr->rx_ring_struct; + + cpu =3D cpumask_local_spread(i, dev_to_node(bd->dev)); + cpu_node =3D cpu_to_node(cpu); + netdev_dbg(bn->netdev, "Allocating page pool for rx_ring[%d] on numa_nod= e: %d\n", + i, cpu_node); + rc =3D bnge_alloc_rx_page_pool(bn, rxr, cpu_node); + if (rc) + return rc; + + rc =3D bnge_alloc_ring(bd, &ring->ring_mem); + if (rc) + return rc; + + ring->grp_idx =3D i; + if (agg_rings) { + ring =3D &rxr->rx_agg_ring_struct; + rc =3D bnge_alloc_ring(bd, &ring->ring_mem); + if (rc) + return rc; + + ring->grp_idx =3D i; + rc =3D bnge_alloc_rx_agg_bmap(bn, rxr); + if (rc) + return rc; + } + } + + return rc; +} + +static void bnge_free_tx_rings(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i; + + if (!bn->tx_ring) + return; + + for (i =3D 0; i < bd->tx_nr_rings; i++) { + struct bnge_tx_ring_info *txr =3D &bn->tx_ring[i]; + struct bnge_ring_struct *ring; + + ring =3D &txr->tx_ring_struct; + + bnge_free_ring(bd, &ring->ring_mem); + } +} + +static int bnge_alloc_tx_rings(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i, j, rc; + + for (i =3D 0, j =3D 0; i < bd->tx_nr_rings; i++) { + struct bnge_tx_ring_info *txr =3D &bn->tx_ring[i]; + struct bnge_ring_struct *ring; + u8 qidx; + + ring =3D &txr->tx_ring_struct; + + rc =3D bnge_alloc_ring(bd, &ring->ring_mem); + if (rc) + return rc; + + ring->grp_idx =3D txr->bnapi->index; + qidx =3D bd->tc_to_qidx[j]; + ring->queue_id =3D bd->q_info[qidx].queue_id; + if (BNGE_RING_TO_TC_OFF(bd, i) =3D=3D (bd->tx_nr_rings_per_tc - 1)) + j++; + } + + return 0; +} + +static void bnge_free_core(struct bnge_net *bn) +{ + bnge_free_tx_rings(bn); + bnge_free_rx_rings(bn); + kfree(bn->tx_ring_map); + bn->tx_ring_map =3D NULL; + kfree(bn->tx_ring); + bn->tx_ring =3D NULL; + kfree(bn->rx_ring); + bn->rx_ring =3D NULL; + kfree(bn->bnapi); + bn->bnapi =3D NULL; +} + +static int bnge_alloc_core(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i, j, size, arr_size; + int rc =3D -ENOMEM; + void *bnapi; + + arr_size =3D L1_CACHE_ALIGN(sizeof(struct bnge_napi *) * + bd->nq_nr_rings); + size =3D L1_CACHE_ALIGN(sizeof(struct bnge_napi)); + bnapi =3D kzalloc(arr_size + size * bd->nq_nr_rings, GFP_KERNEL); + if (!bnapi) + return rc; + + bn->bnapi =3D bnapi; + bnapi +=3D arr_size; + for (i =3D 0; i < bd->nq_nr_rings; i++, bnapi +=3D size) { + struct bnge_nq_ring_info *nqr; + + bn->bnapi[i] =3D bnapi; + bn->bnapi[i]->index =3D i; + bn->bnapi[i]->bn =3D bn; + nqr =3D &bn->bnapi[i]->nq_ring; + nqr->ring_struct.ring_mem.flags =3D BNGE_RMEM_RING_PTE_FLAG; + } + + bn->rx_ring =3D kcalloc(bd->rx_nr_rings, + sizeof(struct bnge_rx_ring_info), + GFP_KERNEL); + if (!bn->rx_ring) + goto err_free_core; + + for (i =3D 0; i < bd->rx_nr_rings; i++) { + struct bnge_rx_ring_info *rxr =3D &bn->rx_ring[i]; + + rxr->rx_ring_struct.ring_mem.flags =3D + BNGE_RMEM_RING_PTE_FLAG; + rxr->rx_agg_ring_struct.ring_mem.flags =3D + BNGE_RMEM_RING_PTE_FLAG; + rxr->bnapi =3D bn->bnapi[i]; + bn->bnapi[i]->rx_ring =3D &bn->rx_ring[i]; + } + + bn->tx_ring =3D kcalloc(bd->tx_nr_rings, + sizeof(struct bnge_tx_ring_info), + GFP_KERNEL); + if (!bn->tx_ring) + goto err_free_core; + + bn->tx_ring_map =3D kcalloc(bd->tx_nr_rings, sizeof(u16), + GFP_KERNEL); + + if (!bn->tx_ring_map) + goto err_free_core; + + if (bd->flags & BNGE_EN_SHARED_CHNL) + j =3D 0; + else + j =3D bd->rx_nr_rings; + + for (i =3D 0; i < bd->tx_nr_rings; i++) { + struct bnge_tx_ring_info *txr =3D &bn->tx_ring[i]; + struct bnge_napi *bnapi2; + int k; + + txr->tx_ring_struct.ring_mem.flags =3D BNGE_RMEM_RING_PTE_FLAG; + bn->tx_ring_map[i] =3D i; + k =3D j + BNGE_RING_TO_TC_OFF(bd, i); + + bnapi2 =3D bn->bnapi[k]; + txr->txq_index =3D i; + txr->tx_napi_idx =3D + BNGE_RING_TO_TC(bd, txr->txq_index); + bnapi2->tx_ring[txr->tx_napi_idx] =3D txr; + txr->bnapi =3D bnapi2; + } + + bnge_init_ring_struct(bn); + + rc =3D bnge_alloc_rx_rings(bn); + if (rc) + goto err_free_core; + + rc =3D bnge_alloc_tx_rings(bn); + if (rc) + goto err_free_core; + + return 0; + +err_free_core: + bnge_free_core(bn); + return rc; +} + +static int bnge_open_core(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int rc; + + netif_carrier_off(bn->netdev); + + rc =3D bnge_reserve_rings(bd); + if (rc) { + netdev_err(bn->netdev, "bnge_reserve_rings err: %d\n", rc); + return rc; + } + + rc =3D bnge_alloc_core(bn); + if (rc) { + netdev_err(bn->netdev, "bnge_alloc_core err: %d\n", rc); + return rc; + } + + set_bit(BNGE_STATE_OPEN, &bd->state); + return 0; +} =20 static netdev_tx_t bnge_start_xmit(struct sk_buff *skb, struct net_device = *dev) { @@ -28,11 +349,30 @@ static netdev_tx_t bnge_start_xmit(struct sk_buff *skb= , struct net_device *dev) =20 static int bnge_open(struct net_device *dev) { - return 0; + struct bnge_net *bn =3D netdev_priv(dev); + int rc; + + rc =3D bnge_open_core(bn); + if (rc) + netdev_err(dev, "bnge_open_core err: %d\n", rc); + + return rc; +} + +static void bnge_close_core(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + + clear_bit(BNGE_STATE_OPEN, &bd->state); + bnge_free_core(bn); } =20 static int bnge_close(struct net_device *dev) { + struct bnge_net *bn =3D netdev_priv(dev); + + bnge_close_core(bn); + return 0; } =20 @@ -238,6 +578,7 @@ int bnge_netdev_alloc(struct bnge_dev *bd, int max_irqs) =20 bn->rx_ring_size =3D BNGE_DEFAULT_RX_RING_SIZE; bn->tx_ring_size =3D BNGE_DEFAULT_TX_RING_SIZE; + bn->rx_dir =3D DMA_FROM_DEVICE; =20 bnge_set_tpa_flags(bd); bnge_set_ring_params(bd); diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.h index a650d71a58db..b78b5e6d3edd 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h @@ -113,8 +113,7 @@ struct bnge_sw_rx_bd { }; =20 struct bnge_sw_rx_agg_bd { - struct page *page; - unsigned int offset; + netmem_ref netmem; dma_addr_t mapping; }; =20 @@ -164,6 +163,14 @@ struct bnge_net { struct hlist_head l2_fltr_hash_tbl[BNGE_L2_FLTR_HASH_SIZE]; u32 hash_seed; u64 toeplitz_prefix; + + struct bnge_napi **bnapi; + + struct bnge_rx_ring_info *rx_ring; + struct bnge_tx_ring_info *tx_ring; + + u16 *tx_ring_map; + enum dma_data_direction rx_dir; }; =20 #define BNGE_DEFAULT_RX_RING_SIZE 511 @@ -203,4 +210,83 @@ void bnge_set_ring_params(struct bnge_dev *bd); #define BNGE_MAX_RX_JUM_DESC_CNT (RX_DESC_CNT * MAX_RX_AGG_PAGES - 1) #define BNGE_MAX_TX_DESC_CNT (TX_DESC_CNT * MAX_TX_PAGES - 1) =20 +#define BNGE_MAX_TXR_PER_NAPI 8 + +#define bnge_for_each_napi_tx(iter, bnapi, txr) \ + for (iter =3D 0, txr =3D (bnapi)->tx_ring[0]; txr; \ + txr =3D (iter < BNGE_MAX_TXR_PER_NAPI - 1) ? \ + (bnapi)->tx_ring[++iter] : NULL) + +struct bnge_cp_ring_info { + struct bnge_napi *bnapi; + dma_addr_t *desc_mapping; + struct tx_cmp **desc_ring; + struct bnge_ring_struct ring_struct; +}; + +struct bnge_nq_ring_info { + struct bnge_napi *bnapi; + dma_addr_t *desc_mapping; + struct nqe_cn **desc_ring; + struct bnge_ring_struct ring_struct; +}; + +struct bnge_rx_ring_info { + struct bnge_napi *bnapi; + struct bnge_cp_ring_info *rx_cpr; + u16 rx_prod; + u16 rx_agg_prod; + u16 rx_sw_agg_prod; + u16 rx_next_cons; + + struct rx_bd *rx_desc_ring[MAX_RX_PAGES]; + struct bnge_sw_rx_bd *rx_buf_ring; + + struct rx_bd *rx_agg_desc_ring[MAX_RX_AGG_PAGES]; + struct bnge_sw_rx_agg_bd *rx_agg_buf_ring; + + unsigned long *rx_agg_bmap; + u16 rx_agg_bmap_size; + + dma_addr_t rx_desc_mapping[MAX_RX_PAGES]; + dma_addr_t rx_agg_desc_mapping[MAX_RX_AGG_PAGES]; + + struct bnge_ring_struct rx_ring_struct; + struct bnge_ring_struct rx_agg_ring_struct; + struct page_pool *page_pool; + struct page_pool *head_pool; + bool need_head_pool; +}; + +struct bnge_tx_ring_info { + struct bnge_napi *bnapi; + struct bnge_cp_ring_info *tx_cpr; + u16 tx_prod; + u16 tx_cons; + u16 tx_hw_cons; + u16 txq_index; + u8 tx_napi_idx; + u8 kick_pending; + + struct tx_bd *tx_desc_ring[MAX_TX_PAGES]; + struct bnge_sw_tx_bd *tx_buf_ring; + + dma_addr_t tx_desc_mapping[MAX_TX_PAGES]; + + u32 dev_state; +#define BNGE_DEV_STATE_CLOSING 0x1 + + struct bnge_ring_struct tx_ring_struct; +}; + +struct bnge_napi { + struct napi_struct napi; + struct bnge_net *bn; + int index; + + struct bnge_nq_ring_info nq_ring; + struct bnge_rx_ring_info *rx_ring; + struct bnge_tx_ring_info *tx_ring[BNGE_MAX_TXR_PER_NAPI]; +}; + #endif /* _BNGE_NETDEV_H_ */ diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_rmem.c b/drivers/net/e= thernet/broadcom/bnge/bnge_rmem.c index 52ada65943a0..e0c16ed62865 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_rmem.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_rmem.c @@ -436,3 +436,61 @@ int bnge_alloc_ctx_mem(struct bnge_dev *bd) =20 return 0; } + +void bnge_init_ring_struct(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i, j; + + for (i =3D 0; i < bd->nq_nr_rings; i++) { + struct bnge_napi *bnapi =3D bn->bnapi[i]; + struct bnge_ring_mem_info *rmem; + struct bnge_nq_ring_info *nqr; + struct bnge_rx_ring_info *rxr; + struct bnge_tx_ring_info *txr; + struct bnge_ring_struct *ring; + + nqr =3D &bnapi->nq_ring; + ring =3D &nqr->ring_struct; + rmem =3D &ring->ring_mem; + rmem->nr_pages =3D bn->cp_nr_pages; + rmem->page_size =3D HW_CMPD_RING_SIZE; + rmem->pg_arr =3D (void **)nqr->desc_ring; + rmem->dma_arr =3D nqr->desc_mapping; + rmem->vmem_size =3D 0; + + rxr =3D bnapi->rx_ring; + if (!rxr) + goto skip_rx; + + ring =3D &rxr->rx_ring_struct; + rmem =3D &ring->ring_mem; + rmem->nr_pages =3D bn->rx_nr_pages; + rmem->page_size =3D HW_RXBD_RING_SIZE; + rmem->pg_arr =3D (void **)rxr->rx_desc_ring; + rmem->dma_arr =3D rxr->rx_desc_mapping; + rmem->vmem_size =3D SW_RXBD_RING_SIZE * bn->rx_nr_pages; + rmem->vmem =3D (void **)&rxr->rx_buf_ring; + + ring =3D &rxr->rx_agg_ring_struct; + rmem =3D &ring->ring_mem; + rmem->nr_pages =3D bn->rx_agg_nr_pages; + rmem->page_size =3D HW_RXBD_RING_SIZE; + rmem->pg_arr =3D (void **)rxr->rx_agg_desc_ring; + rmem->dma_arr =3D rxr->rx_agg_desc_mapping; + rmem->vmem_size =3D SW_RXBD_AGG_RING_SIZE * bn->rx_agg_nr_pages; + rmem->vmem =3D (void **)&rxr->rx_agg_buf_ring; + +skip_rx: + bnge_for_each_napi_tx(j, bnapi, txr) { + ring =3D &txr->tx_ring_struct; + rmem =3D &ring->ring_mem; + rmem->nr_pages =3D bn->tx_nr_pages; + rmem->page_size =3D HW_TXBD_RING_SIZE; + rmem->pg_arr =3D (void **)txr->tx_desc_ring; + rmem->dma_arr =3D txr->tx_desc_mapping; + rmem->vmem_size =3D SW_TXBD_RING_SIZE * bn->tx_nr_pages; + rmem->vmem =3D (void **)&txr->tx_buf_ring; + } + } +} diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h b/drivers/net/e= thernet/broadcom/bnge/bnge_rmem.h index 300f1d8268ef..162a66c79830 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h @@ -6,6 +6,7 @@ =20 struct bnge_ctx_mem_type; struct bnge_dev; +struct bnge_net; =20 #define PTU_PTE_VALID 0x1UL #define PTU_PTE_LAST 0x2UL @@ -180,9 +181,20 @@ struct bnge_ctx_mem_info { struct bnge_ctx_mem_type ctx_arr[BNGE_CTX_V2_MAX]; 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Also, add the association of NQ, NAPI, and interrupts. Signed-off-by: Bhargava Marreddy Reviewed-by: Vikas Gupta Reviewed-by: Rajashekar Hudumula --- drivers/net/ethernet/broadcom/bnge/bnge.h | 1 + .../net/ethernet/broadcom/bnge/bnge_netdev.c | 434 ++++++++++++++++++ .../net/ethernet/broadcom/bnge/bnge_netdev.h | 12 + .../net/ethernet/broadcom/bnge/bnge_resc.c | 2 +- 4 files changed, 448 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/broadcom/bnge/bnge.h b/drivers/net/ethern= et/broadcom/bnge/bnge.h index 2d3b2fd57be4..07df86f0061f 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge.h @@ -219,5 +219,6 @@ static inline bool bnge_is_agg_reqd(struct bnge_dev *bd) } =20 bool bnge_aux_registered(struct bnge_dev *bd); +u16 bnge_aux_get_msix(struct bnge_dev *bd); =20 #endif /* _BNGE_H_ */ diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.c index 9fbb1c385fe8..d8976faabd3c 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c @@ -27,6 +27,225 @@ #define BNGE_RING_TO_TC(bd, tx) \ ((tx) / (bd)->tx_nr_rings_per_tc) =20 +#define BNGE_TC_TO_RING_BASE(bd, tc) \ + ((tc) * (bd)->tx_nr_rings_per_tc) + +static void bnge_free_nq_desc_arr(struct bnge_nq_ring_info *nqr) +{ + struct bnge_ring_struct *ring =3D &nqr->ring_struct; + + kfree(nqr->desc_ring); + nqr->desc_ring =3D NULL; + ring->ring_mem.pg_arr =3D NULL; + kfree(nqr->desc_mapping); + nqr->desc_mapping =3D NULL; + ring->ring_mem.dma_arr =3D NULL; +} + +static void bnge_free_cp_desc_arr(struct bnge_cp_ring_info *cpr) +{ + struct bnge_ring_struct *ring =3D &cpr->ring_struct; + + kfree(cpr->desc_ring); + cpr->desc_ring =3D NULL; + ring->ring_mem.pg_arr =3D NULL; + kfree(cpr->desc_mapping); + cpr->desc_mapping =3D NULL; + ring->ring_mem.dma_arr =3D NULL; +} + +static int bnge_alloc_nq_desc_arr(struct bnge_nq_ring_info *nqr, int n) +{ + nqr->desc_ring =3D kcalloc(n, sizeof(*nqr->desc_ring), GFP_KERNEL); + if (!nqr->desc_ring) + return -ENOMEM; + + nqr->desc_mapping =3D kcalloc(n, sizeof(*nqr->desc_mapping), GFP_KERNEL); + if (!nqr->desc_mapping) + return -ENOMEM; + + return 0; +} + +static int bnge_alloc_cp_desc_arr(struct bnge_cp_ring_info *cpr, int n) +{ + cpr->desc_ring =3D kcalloc(n, sizeof(*cpr->desc_ring), GFP_KERNEL); + if (!cpr->desc_ring) + return -ENOMEM; + + cpr->desc_mapping =3D kcalloc(n, sizeof(*cpr->desc_mapping), GFP_KERNEL); + if (!cpr->desc_mapping) + return -ENOMEM; + + return 0; +} + +static void bnge_free_nq_arrays(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i; + + for (i =3D 0; i < bd->nq_nr_rings; i++) { + struct bnge_napi *bnapi =3D bn->bnapi[i]; + + bnge_free_nq_desc_arr(&bnapi->nq_ring); + } +} + +static int bnge_alloc_nq_arrays(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i; + + for (i =3D 0; i < bd->nq_nr_rings; i++) { + struct bnge_napi *bnapi =3D bn->bnapi[i]; + int rc; + + rc =3D bnge_alloc_nq_desc_arr(&bnapi->nq_ring, bn->cp_nr_pages); + if (rc) + return rc; + } + + return 0; +} + +static void bnge_free_nq_tree(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i; + + if (!bn->bnapi) + return; + + for (i =3D 0; i < bd->nq_nr_rings; i++) { + struct bnge_napi *bnapi =3D bn->bnapi[i]; + struct bnge_nq_ring_info *nqr; + struct bnge_ring_struct *ring; + int j; + + nqr =3D &bnapi->nq_ring; + ring =3D &nqr->ring_struct; + + bnge_free_ring(bd, &ring->ring_mem); + + if (!nqr->cp_ring_arr) + continue; + + for (j =3D 0; j < nqr->cp_ring_count; j++) { + struct bnge_cp_ring_info *cpr =3D &nqr->cp_ring_arr[j]; + + ring =3D &cpr->ring_struct; + bnge_free_ring(bd, &ring->ring_mem); + bnge_free_cp_desc_arr(cpr); + } + kfree(nqr->cp_ring_arr); + nqr->cp_ring_arr =3D NULL; + nqr->cp_ring_count =3D 0; + } +} + +static int alloc_one_cp_ring(struct bnge_net *bn, + struct bnge_cp_ring_info *cpr) +{ + struct bnge_ring_mem_info *rmem; + struct bnge_ring_struct *ring; + struct bnge_dev *bd =3D bn->bd; + int rc; + + rc =3D bnge_alloc_cp_desc_arr(cpr, bn->cp_nr_pages); + if (rc) { + bnge_free_cp_desc_arr(cpr); + return -ENOMEM; + } + ring =3D &cpr->ring_struct; + rmem =3D &ring->ring_mem; + rmem->nr_pages =3D bn->cp_nr_pages; + rmem->page_size =3D HW_CMPD_RING_SIZE; + rmem->pg_arr =3D (void **)cpr->desc_ring; + rmem->dma_arr =3D cpr->desc_mapping; + rmem->flags =3D BNGE_RMEM_RING_PTE_FLAG; + rc =3D bnge_alloc_ring(bd, rmem); + if (rc) { + bnge_free_ring(bd, rmem); + bnge_free_cp_desc_arr(cpr); + } + + return rc; +} + +static int bnge_alloc_nq_tree(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i, j, rc, ulp_msix; + int tcs =3D 1; + + ulp_msix =3D bnge_aux_get_msix(bd); + for (i =3D 0, j =3D 0; i < bd->nq_nr_rings; i++) { + bool sh =3D !!(bd->flags & BNGE_EN_SHARED_CHNL); + struct bnge_napi *bnapi =3D bn->bnapi[i]; + struct bnge_nq_ring_info *nqr; + struct bnge_cp_ring_info *cpr; + struct bnge_ring_struct *ring; + int cp_count =3D 0, k; + int rx =3D 0, tx =3D 0; + + if (!bnapi) + continue; + + nqr =3D &bnapi->nq_ring; + nqr->bnapi =3D bnapi; + ring =3D &nqr->ring_struct; + + rc =3D bnge_alloc_ring(bd, &ring->ring_mem); + if (rc) + return rc; + + ring->map_idx =3D ulp_msix + i; + + if (i < bd->rx_nr_rings) { + cp_count++; + rx =3D 1; + } + + if ((sh && i < bd->tx_nr_rings) || + (!sh && i >=3D bd->rx_nr_rings)) { + cp_count +=3D tcs; + tx =3D 1; + } + + nqr->cp_ring_arr =3D kcalloc(cp_count, sizeof(*cpr), + GFP_KERNEL); + if (!nqr->cp_ring_arr) + return -ENOMEM; + + nqr->cp_ring_count =3D cp_count; + + for (k =3D 0; k < cp_count; k++) { + cpr =3D &nqr->cp_ring_arr[k]; + rc =3D alloc_one_cp_ring(bn, cpr); + if (rc) + return rc; + + cpr->bnapi =3D bnapi; + cpr->cp_idx =3D k; + if (!k && rx) { + bn->rx_ring[i].rx_cpr =3D cpr; + cpr->cp_ring_type =3D BNGE_NQ_HDL_TYPE_RX; + } else { + int n, tc =3D k - rx; + + n =3D BNGE_TC_TO_RING_BASE(bd, tc) + j; + bn->tx_ring[n].tx_cpr =3D cpr; + cpr->cp_ring_type =3D BNGE_NQ_HDL_TYPE_TX; + } + } + if (tx) + j++; + } + + return 0; +} + static bool bnge_separate_head_pool(struct bnge_rx_ring_info *rxr) { return rxr->need_head_pool || PAGE_SIZE > BNGE_RX_PAGE_SIZE; @@ -209,10 +428,19 @@ static int bnge_alloc_tx_rings(struct bnge_net *bn) return 0; } =20 +static void bnge_free_ring_grps(struct bnge_net *bn) +{ + kfree(bn->grp_info); + bn->grp_info =3D NULL; +} + static void bnge_free_core(struct bnge_net *bn) { bnge_free_tx_rings(bn); bnge_free_rx_rings(bn); + bnge_free_nq_tree(bn); + bnge_free_nq_arrays(bn); + bnge_free_ring_grps(bn); kfree(bn->tx_ring_map); bn->tx_ring_map =3D NULL; kfree(bn->tx_ring); @@ -300,6 +528,10 @@ static int bnge_alloc_core(struct bnge_net *bn) txr->bnapi =3D bnapi2; } =20 + rc =3D bnge_alloc_nq_arrays(bn); + if (rc) + goto err_free_core; + bnge_init_ring_struct(bn); =20 rc =3D bnge_alloc_rx_rings(bn); @@ -310,13 +542,198 @@ static int bnge_alloc_core(struct bnge_net *bn) if (rc) goto err_free_core; =20 + rc =3D bnge_alloc_nq_tree(bn); + if (rc) + goto err_free_core; + return 0; =20 err_free_core: bnge_free_core(bn); + + return rc; +} + +static int bnge_cp_num_to_irq_num(struct bnge_net *bn, int n) +{ + struct bnge_napi *bnapi =3D bn->bnapi[n]; + struct bnge_nq_ring_info *nqr; + + nqr =3D &bnapi->nq_ring; + + return nqr->ring_struct.map_idx; +} + +static irqreturn_t bnge_msix(int irq, void *dev_instance) +{ + /* NAPI scheduling to be added in a future patch */ + return IRQ_HANDLED; +} + +static void bnge_setup_msix(struct bnge_net *bn) +{ + struct net_device *dev =3D bn->netdev; + struct bnge_dev *bd =3D bn->bd; + int len, i; + + len =3D sizeof(bd->irq_tbl[0].name); + for (i =3D 0; i < bd->nq_nr_rings; i++) { + int map_idx =3D bnge_cp_num_to_irq_num(bn, i); + char *attr; + + if (bd->flags & BNGE_EN_SHARED_CHNL) + attr =3D "TxRx"; + else if (i < bd->rx_nr_rings) + attr =3D "rx"; + else + attr =3D "tx"; + + snprintf(bd->irq_tbl[map_idx].name, len, "%s-%s-%d", dev->name, + attr, i); + bd->irq_tbl[map_idx].handler =3D bnge_msix; + } +} + +static int bnge_set_real_num_queues(struct bnge_net *bn) +{ + struct net_device *dev =3D bn->netdev; + struct bnge_dev *bd =3D bn->bd; + int rc; + + rc =3D netif_set_real_num_tx_queues(dev, bd->tx_nr_rings); + if (rc) + return rc; + + return netif_set_real_num_rx_queues(dev, bd->rx_nr_rings); +} + +static int bnge_setup_interrupts(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + + if (!bd->irq_tbl) { + if (bnge_alloc_irqs(bd)) + return -ENODEV; + } + + bnge_setup_msix(bn); + + return bnge_set_real_num_queues(bn); +} + +static int bnge_request_irq(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i, rc; + + rc =3D bnge_setup_interrupts(bn); + if (rc) { + netdev_err(bn->netdev, "bnge_setup_interrupts err: %d\n", rc); + return rc; + } + for (i =3D 0; i < bd->nq_nr_rings; i++) { + int map_idx =3D bnge_cp_num_to_irq_num(bn, i); + struct bnge_irq *irq =3D &bd->irq_tbl[map_idx]; + + rc =3D request_irq(irq->vector, irq->handler, 0, irq->name, + bn->bnapi[i]); + if (rc) + break; + + netif_napi_set_irq_locked(&bn->bnapi[i]->napi, irq->vector); + irq->requested =3D 1; + + if (zalloc_cpumask_var(&irq->cpu_mask, GFP_KERNEL)) { + int numa_node =3D dev_to_node(&bd->pdev->dev); + + irq->have_cpumask =3D 1; + cpumask_set_cpu(cpumask_local_spread(i, numa_node), + irq->cpu_mask); + rc =3D irq_set_affinity_hint(irq->vector, irq->cpu_mask); + if (rc) { + netdev_warn(bn->netdev, + "Set affinity failed, IRQ =3D %d\n", + irq->vector); + break; + } + } + } + return rc; } =20 +static int bnge_napi_poll(struct napi_struct *napi, int budget) +{ + int work_done =3D 0; + + /* defer NAPI implementation to next patch series */ + napi_complete_done(napi, work_done); + + return work_done; +} + +static void bnge_init_napi(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + struct bnge_napi *bnapi; + int i; + + for (i =3D 0; i < bd->nq_nr_rings; i++) { + bnapi =3D bn->bnapi[i]; + netif_napi_add_config(bn->netdev, &bnapi->napi, bnge_napi_poll, + bnapi->index); + } +} + +static void bnge_del_napi(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i; + + if (!bn->bnapi) + return; + + for (i =3D 0; i < bd->rx_nr_rings; i++) + netif_queue_set_napi(bn->netdev, i, NETDEV_QUEUE_TYPE_RX, NULL); + for (i =3D 0; i < bd->tx_nr_rings; i++) + netif_queue_set_napi(bn->netdev, i, NETDEV_QUEUE_TYPE_TX, NULL); + + for (i =3D 0; i < bd->nq_nr_rings; i++) { + struct bnge_napi *bnapi =3D bn->bnapi[i]; + + __netif_napi_del(&bnapi->napi); + } + + /* Wait for RCU grace period after removing NAPI instances */ + synchronize_net(); +} + +static void bnge_free_irq(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + struct bnge_irq *irq; + int i; + + if (!bd->irq_tbl || !bn->bnapi) + return; + + for (i =3D 0; i < bd->nq_nr_rings; i++) { + int map_idx =3D bnge_cp_num_to_irq_num(bn, i); + + irq =3D &bd->irq_tbl[map_idx]; + if (irq->requested) { + if (irq->have_cpumask) { + irq_set_affinity_hint(irq->vector, NULL); + free_cpumask_var(irq->cpu_mask); + irq->have_cpumask =3D 0; + } + free_irq(irq->vector, bn->bnapi[i]); + } + + irq->requested =3D 0; + } +} + static int bnge_open_core(struct bnge_net *bn) { struct bnge_dev *bd =3D bn->bd; @@ -336,8 +753,22 @@ static int bnge_open_core(struct bnge_net *bn) return rc; } =20 + bnge_init_napi(bn); + rc =3D bnge_request_irq(bn); + if (rc) { + netdev_err(bn->netdev, "bnge_request_irq err: %d\n", rc); + goto err_del_napi; + } + set_bit(BNGE_STATE_OPEN, &bd->state); + return 0; + +err_del_napi: + bnge_del_napi(bn); + bnge_free_core(bn); + + return rc; } =20 static netdev_tx_t bnge_start_xmit(struct sk_buff *skb, struct net_device = *dev) @@ -364,6 +795,9 @@ static void bnge_close_core(struct bnge_net *bn) struct bnge_dev *bd =3D bn->bd; =20 clear_bit(BNGE_STATE_OPEN, &bd->state); + bnge_free_irq(bn); + bnge_del_napi(bn); + bnge_free_core(bn); } =20 diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.h index b78b5e6d3edd..665a20380ded 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h @@ -132,6 +132,9 @@ enum { =20 #define BNGE_NET_EN_TPA (BNGE_NET_EN_GRO | BNGE_NET_EN_LRO) =20 +#define BNGE_NQ_HDL_TYPE_RX 0x00 +#define BNGE_NQ_HDL_TYPE_TX 0x01 + struct bnge_net { struct bnge_dev *bd; struct net_device *netdev; @@ -171,6 +174,10 @@ struct bnge_net { =20 u16 *tx_ring_map; enum dma_data_direction rx_dir; + + /* grp_info indexed by napi/nq index */ + struct bnge_ring_grp_info *grp_info; + int total_irqs; }; =20 #define BNGE_DEFAULT_RX_RING_SIZE 511 @@ -222,6 +229,8 @@ struct bnge_cp_ring_info { dma_addr_t *desc_mapping; struct tx_cmp **desc_ring; struct bnge_ring_struct ring_struct; + u8 cp_ring_type; + u8 cp_idx; }; =20 struct bnge_nq_ring_info { @@ -229,6 +238,9 @@ struct bnge_nq_ring_info { dma_addr_t *desc_mapping; struct nqe_cn **desc_ring; struct bnge_ring_struct ring_struct; + + int cp_ring_count; + struct bnge_cp_ring_info *cp_ring_arr; }; =20 struct bnge_rx_ring_info { diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_resc.c b/drivers/net/e= thernet/broadcom/bnge/bnge_resc.c index c79a3607a1b7..5597af1b3b7c 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_resc.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_resc.c @@ -46,7 +46,7 @@ static int bnge_aux_get_dflt_msix(struct bnge_dev *bd) return min_t(int, roce_msix, num_online_cpus() + 1); } =20 -static u16 bnge_aux_get_msix(struct bnge_dev *bd) +u16 bnge_aux_get_msix(struct bnge_dev *bd) { if (bnge_is_roce_en(bd)) return bd->aux_num_msix; --=20 2.47.3 From nobody Sat Oct 4 00:32:14 2025 Received: from mail-il1-f228.google.com (mail-il1-f228.google.com [209.85.166.228]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB6802D8DDF for ; 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[144.49.247.13]) by smtp-relay.gmail.com with ESMTPS id e9e14a558f8ab-3e57e775ccasm12502865ab.50.2025.08.21.08.48.49 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Aug 2025 08:48:49 -0700 (PDT) X-Relaying-Domain: broadcom.com X-CFilter-Loop: Reflected Received: by mail-pg1-f200.google.com with SMTP id 41be03b00d2f7-b47173bb3daso955543a12.1 for ; Thu, 21 Aug 2025 08:48:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1755791328; x=1756396128; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KnXY64Xbv47cQNmR9ZiiLeZWxiI1/oDkLLaPlw1U/MA=; b=TAIONkGfzDxYHUJhhG75kp91xK9bTPNiqlDtwruHYzBU2EADWu8xYaxlA6qh8fzHMp zRzGsO4hHmY1Lwu96f6t0fUgorZTbskpyJ06ElkPyUiCJKZ+XJxLIAwCuG556CcvfqH5 rMdbGRYYKRJTZ/ZSa/9dH/vOprbAVFnJmjB0c= X-Forwarded-Encrypted: i=1; AJvYcCVbgfHvLPkWKi8OaSVpd2D3gILc95Y4wj5gLr7dUqikSkt9hTBmmKqWb8NalVfbUTtxv+aZW6Nl5t9Pr0g=@vger.kernel.org X-Received: by 2002:a05:6a21:339e:b0:243:78a:8289 with SMTP id adf61e73a8af0-24330aaa91cmr4097366637.48.1755791328135; Thu, 21 Aug 2025 08:48:48 -0700 (PDT) X-Received: by 2002:a05:6a21:339e:b0:243:78a:8289 with SMTP id adf61e73a8af0-24330aaa91cmr4097335637.48.1755791327694; Thu, 21 Aug 2025 08:48:47 -0700 (PDT) Received: from hyd-csg-thor2-h1-server2.dhcp.broadcom.net ([192.19.203.250]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b47640b2d37sm5046894a12.46.2025.08.21.08.48.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Aug 2025 08:48:47 -0700 (PDT) From: Bhargava Marreddy To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, andrew+netdev@lunn.ch, horms@kernel.org Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, michael.chan@broadcom.com, pavan.chebbi@broadcom.com, vsrama-krishna.nemani@broadcom.com, Bhargava Marreddy , Vikas Gupta , Rajashekar Hudumula Subject: [v3, net-next 3/9] bng_en: Introduce VNIC Date: Thu, 21 Aug 2025 21:15:11 +0000 Message-ID: <20250821211517.16578-4-bhargava.marreddy@broadcom.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20250821211517.16578-1-bhargava.marreddy@broadcom.com> References: <20250821211517.16578-1-bhargava.marreddy@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-DetectorID-Processed: b00c1d49-9d2e-4205-b15f-d015386d3d5e Content-Type: text/plain; charset="utf-8" Add the VNIC-specific structures and DMA memory necessary to support UC/MC and RSS functionality. Signed-off-by: Bhargava Marreddy Reviewed-by: Vikas Gupta Reviewed-by: Rajashekar Hudumula --- .../net/ethernet/broadcom/bnge/bnge_netdev.c | 130 ++++++++++++++++++ .../net/ethernet/broadcom/bnge/bnge_netdev.h | 30 ++++ 2 files changed, 160 insertions(+) diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.c index d8976faabd3c..cc7c2aa59fe6 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c @@ -428,6 +428,123 @@ static int bnge_alloc_tx_rings(struct bnge_net *bn) return 0; } =20 +static void bnge_free_vnic_attributes(struct bnge_net *bn) +{ + struct pci_dev *pdev =3D bn->bd->pdev; + struct bnge_vnic_info *vnic; + int i; + + if (!bn->vnic_info) + return; + + for (i =3D 0; i < bn->nr_vnics; i++) { + vnic =3D &bn->vnic_info[i]; + + kfree(vnic->uc_list); + vnic->uc_list =3D NULL; + + if (vnic->mc_list) { + dma_free_coherent(&pdev->dev, vnic->mc_list_size, + vnic->mc_list, vnic->mc_list_mapping); + vnic->mc_list =3D NULL; + } + + if (vnic->rss_table) { + dma_free_coherent(&pdev->dev, vnic->rss_table_size, + vnic->rss_table, + vnic->rss_table_dma_addr); + vnic->rss_table =3D NULL; + } + + vnic->rss_hash_key =3D NULL; + vnic->flags =3D 0; + } +} + +static int bnge_alloc_vnic_attributes(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + struct bnge_vnic_info *vnic; + int i, rc =3D 0, size; + + for (i =3D 0; i < bn->nr_vnics; i++) { + vnic =3D &bn->vnic_info[i]; + + if (vnic->flags & BNGE_VNIC_UCAST_FLAG) { + int mem_size =3D (BNGE_MAX_UC_ADDRS - 1) * ETH_ALEN; + + if (mem_size > 0) { + vnic->uc_list =3D kmalloc(mem_size, GFP_KERNEL); + if (!vnic->uc_list) { + rc =3D -ENOMEM; + goto out; + } + } + } + + if (vnic->flags & BNGE_VNIC_MCAST_FLAG) { + vnic->mc_list_size =3D BNGE_MAX_MC_ADDRS * ETH_ALEN; + vnic->mc_list =3D + dma_alloc_coherent(bd->dev, + vnic->mc_list_size, + &vnic->mc_list_mapping, + GFP_KERNEL); + if (!vnic->mc_list) { + rc =3D -ENOMEM; + goto out; + } + } + + /* Allocate rss table and hash key */ + size =3D L1_CACHE_ALIGN(HW_HASH_INDEX_SIZE * sizeof(u16)); + size =3D L1_CACHE_ALIGN(BNGE_MAX_RSS_TABLE_SIZE); + + vnic->rss_table_size =3D size + HW_HASH_KEY_SIZE; + vnic->rss_table =3D dma_alloc_coherent(bd->dev, + vnic->rss_table_size, + &vnic->rss_table_dma_addr, + GFP_KERNEL); + if (!vnic->rss_table) { + rc =3D -ENOMEM; + goto out; + } + + vnic->rss_hash_key =3D ((void *)vnic->rss_table) + size; + vnic->rss_hash_key_dma_addr =3D vnic->rss_table_dma_addr + size; + } + + return 0; + +out: + return rc; +} + +static int bnge_alloc_vnics(struct bnge_net *bn) +{ + int num_vnics; + + /* Allocate only 1 VNIC for now + * Additional VNICs will be added based on RFS/NTUPLE in future patches + */ + num_vnics =3D 1; + + bn->vnic_info =3D kcalloc(num_vnics, sizeof(struct bnge_vnic_info), + GFP_KERNEL); + if (!bn->vnic_info) + return -ENOMEM; + + bn->nr_vnics =3D num_vnics; + + return 0; +} + +static void bnge_free_vnics(struct bnge_net *bn) +{ + kfree(bn->vnic_info); + bn->vnic_info =3D NULL; + bn->nr_vnics =3D 0; +} + static void bnge_free_ring_grps(struct bnge_net *bn) { kfree(bn->grp_info); @@ -436,11 +553,13 @@ static void bnge_free_ring_grps(struct bnge_net *bn) =20 static void bnge_free_core(struct bnge_net *bn) { + bnge_free_vnic_attributes(bn); bnge_free_tx_rings(bn); bnge_free_rx_rings(bn); bnge_free_nq_tree(bn); bnge_free_nq_arrays(bn); bnge_free_ring_grps(bn); + bnge_free_vnics(bn); kfree(bn->tx_ring_map); bn->tx_ring_map =3D NULL; kfree(bn->tx_ring); @@ -528,6 +647,10 @@ static int bnge_alloc_core(struct bnge_net *bn) txr->bnapi =3D bnapi2; } =20 + rc =3D bnge_alloc_vnics(bn); + if (rc) + goto err_free_core; + rc =3D bnge_alloc_nq_arrays(bn); if (rc) goto err_free_core; @@ -546,6 +669,13 @@ static int bnge_alloc_core(struct bnge_net *bn) if (rc) goto err_free_core; =20 + bn->vnic_info[BNGE_VNIC_DEFAULT].flags |=3D BNGE_VNIC_RSS_FLAG | + BNGE_VNIC_MCAST_FLAG | + BNGE_VNIC_UCAST_FLAG; + rc =3D bnge_alloc_vnic_attributes(bn); + if (rc) + goto err_free_core; + return 0; =20 err_free_core: diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.h index 665a20380ded..8bc0d09e0419 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h @@ -177,6 +177,8 @@ struct bnge_net { =20 /* grp_info indexed by napi/nq index */ struct bnge_ring_grp_info *grp_info; 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This will help enable these resources in future patches. Signed-off-by: Bhargava Marreddy Reviewed-by: Vikas Gupta Reviewed-by: Rajashekar Hudumula --- .../net/ethernet/broadcom/bnge/bnge_netdev.c | 216 ++++++++++++++++++ .../net/ethernet/broadcom/bnge/bnge_netdev.h | 48 ++++ .../net/ethernet/broadcom/bnge/bnge_rmem.h | 1 + 3 files changed, 265 insertions(+) diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.c index cc7c2aa59fe6..a5724d389b03 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c @@ -700,6 +700,204 @@ static irqreturn_t bnge_msix(int irq, void *dev_insta= nce) return IRQ_HANDLED; } =20 +static void bnge_init_nq_tree(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i, j; + + for (i =3D 0; i < bd->nq_nr_rings; i++) { + struct bnge_nq_ring_info *nqr =3D &bn->bnapi[i]->nq_ring; + struct bnge_ring_struct *ring =3D &nqr->ring_struct; + + ring->fw_ring_id =3D INVALID_HW_RING_ID; + if (!nqr->cp_ring_arr) + continue; + for (j =3D 0; j < nqr->cp_ring_count; j++) { + struct bnge_cp_ring_info *cpr =3D &nqr->cp_ring_arr[j]; + + ring =3D &cpr->ring_struct; + ring->fw_ring_id =3D INVALID_HW_RING_ID; + } + } +} + +static void bnge_init_rxbd_pages(struct bnge_ring_struct *ring, u32 type) +{ + struct rx_bd **rx_desc_ring; + u32 prod; + int i; + + rx_desc_ring =3D (struct rx_bd **)ring->ring_mem.pg_arr; + for (i =3D 0, prod =3D 0; i < ring->ring_mem.nr_pages; i++) { + struct rx_bd *rxbd; + int j; + + rxbd =3D rx_desc_ring[i]; + if (!rxbd) + continue; + + for (j =3D 0; j < RX_DESC_CNT; j++, rxbd++, prod++) { + rxbd->rx_bd_len_flags_type =3D cpu_to_le32(type); + rxbd->rx_bd_opaque =3D prod; + } + } +} + +static void bnge_init_one_rx_ring_rxbd(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr) +{ + struct bnge_ring_struct *ring; + u32 type; + + type =3D (bn->rx_buf_use_size << RX_BD_LEN_SHIFT) | + RX_BD_TYPE_RX_PACKET_BD | RX_BD_FLAGS_EOP; + + if (NET_IP_ALIGN =3D=3D 2) + type |=3D RX_BD_FLAGS_SOP; + + ring =3D &rxr->rx_ring_struct; + bnge_init_rxbd_pages(ring, type); + ring->fw_ring_id =3D INVALID_HW_RING_ID; +} + +static void bnge_init_one_rx_agg_ring_rxbd(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr) +{ + struct bnge_ring_struct *ring; + u32 type; + + ring =3D &rxr->rx_agg_ring_struct; + ring->fw_ring_id =3D INVALID_HW_RING_ID; + if (bnge_is_agg_reqd(bn->bd)) { + type =3D ((u32)BNGE_RX_PAGE_SIZE << RX_BD_LEN_SHIFT) | + RX_BD_TYPE_RX_AGG_BD | RX_BD_FLAGS_SOP; + + bnge_init_rxbd_pages(ring, type); + } +} + +static int bnge_init_one_rx_ring(struct bnge_net *bn, int ring_nr) +{ + struct bnge_rx_ring_info *rxr; + + rxr =3D &bn->rx_ring[ring_nr]; + bnge_init_one_rx_ring_rxbd(bn, rxr); + + netif_queue_set_napi(bn->netdev, ring_nr, NETDEV_QUEUE_TYPE_RX, + &rxr->bnapi->napi); + + bnge_init_one_rx_agg_ring_rxbd(bn, rxr); + + return 0; +} + +static int bnge_init_rx_rings(struct bnge_net *bn) +{ + int i, rc =3D 0; + +#define BNGE_RX_OFFSET (NET_SKB_PAD + NET_IP_ALIGN) +#define BNGE_RX_DMA_OFFSET NET_SKB_PAD + bn->rx_offset =3D BNGE_RX_OFFSET; + bn->rx_dma_offset =3D BNGE_RX_DMA_OFFSET; + + for (i =3D 0; i < bn->bd->rx_nr_rings; i++) { + rc =3D bnge_init_one_rx_ring(bn, i); + if (rc) + break; + } + + return rc; +} + +static int bnge_init_tx_rings(struct bnge_net *bn) +{ + int i; + + bn->tx_wake_thresh =3D max_t(int, bn->tx_ring_size / 2, + BNGE_MIN_TX_DESC_CNT); + + for (i =3D 0; i < bn->bd->tx_nr_rings; i++) { + struct bnge_tx_ring_info *txr =3D &bn->tx_ring[i]; + struct bnge_ring_struct *ring =3D &txr->tx_ring_struct; + + ring->fw_ring_id =3D INVALID_HW_RING_ID; + + netif_queue_set_napi(bn->netdev, i, NETDEV_QUEUE_TYPE_TX, + &txr->bnapi->napi); + } + + return 0; +} + +static int bnge_init_ring_grps(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i; + + bn->grp_info =3D kcalloc(bd->nq_nr_rings, + sizeof(struct bnge_ring_grp_info), + GFP_KERNEL); + if (!bn->grp_info) + return -ENOMEM; + for (i =3D 0; i < bd->nq_nr_rings; i++) { + bn->grp_info[i].fw_stats_ctx =3D INVALID_HW_RING_ID; + bn->grp_info[i].fw_grp_id =3D INVALID_HW_RING_ID; + bn->grp_info[i].rx_fw_ring_id =3D INVALID_HW_RING_ID; + bn->grp_info[i].agg_fw_ring_id =3D INVALID_HW_RING_ID; + bn->grp_info[i].nq_fw_ring_id =3D INVALID_HW_RING_ID; + } + + return 0; +} + +static void bnge_init_vnics(struct bnge_net *bn) +{ + struct bnge_vnic_info *vnic0 =3D &bn->vnic_info[BNGE_VNIC_DEFAULT]; + int i; + + for (i =3D 0; i < bn->nr_vnics; i++) { + struct bnge_vnic_info *vnic =3D &bn->vnic_info[i]; + int j; + + vnic->fw_vnic_id =3D INVALID_HW_RING_ID; + vnic->vnic_id =3D i; + for (j =3D 0; j < BNGE_MAX_CTX_PER_VNIC; j++) + vnic->fw_rss_cos_lb_ctx[j] =3D INVALID_HW_RING_ID; + + if (bn->vnic_info[i].rss_hash_key) { + if (i =3D=3D BNGE_VNIC_DEFAULT) { + u8 *key =3D (void *)vnic->rss_hash_key; + int k; + + if (!bn->rss_hash_key_valid && + !bn->rss_hash_key_updated) { + get_random_bytes(bn->rss_hash_key, + HW_HASH_KEY_SIZE); + bn->rss_hash_key_updated =3D true; + } + + memcpy(vnic->rss_hash_key, bn->rss_hash_key, + HW_HASH_KEY_SIZE); + + if (!bn->rss_hash_key_updated) + continue; + + bn->rss_hash_key_updated =3D false; + bn->rss_hash_key_valid =3D true; + + bn->toeplitz_prefix =3D 0; + for (k =3D 0; k < 8; k++) { + bn->toeplitz_prefix <<=3D 8; + bn->toeplitz_prefix |=3D key[k]; + } + } else { + memcpy(vnic->rss_hash_key, vnic0->rss_hash_key, + HW_HASH_KEY_SIZE); + } + } + } +} + static void bnge_setup_msix(struct bnge_net *bn) { struct net_device *dev =3D bn->netdev; @@ -864,6 +1062,17 @@ static void bnge_free_irq(struct bnge_net *bn) } } =20 +static int bnge_init_nic(struct bnge_net *bn) +{ + bnge_init_nq_tree(bn); + bnge_init_rx_rings(bn); + bnge_init_tx_rings(bn); + bnge_init_ring_grps(bn); + bnge_init_vnics(bn); + + return 0; +} + static int bnge_open_core(struct bnge_net *bn) { struct bnge_dev *bd =3D bn->bd; @@ -890,10 +1099,17 @@ static int bnge_open_core(struct bnge_net *bn) goto err_del_napi; } =20 + rc =3D bnge_init_nic(bn); + if (rc) { + netdev_err(bn->netdev, "bnge_init_nic err: %d\n", rc); + goto err_free_irq; + } set_bit(BNGE_STATE_OPEN, &bd->state); =20 return 0; =20 +err_free_irq: + bnge_free_irq(bn); err_del_napi: bnge_del_napi(bn); bnge_free_core(bn); diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.h index 8bc0d09e0419..0859f500b3f4 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h @@ -117,6 +117,20 @@ struct bnge_sw_rx_agg_bd { dma_addr_t mapping; }; =20 +#define HWRM_RING_ALLOC_TX 0x1 +#define HWRM_RING_ALLOC_RX 0x2 +#define HWRM_RING_ALLOC_AGG 0x4 +#define HWRM_RING_ALLOC_CMPL 0x8 +#define HWRM_RING_ALLOC_NQ 0x10 + +struct bnge_ring_grp_info { + u16 fw_stats_ctx; + u16 fw_grp_id; + u16 rx_fw_ring_id; + u16 agg_fw_ring_id; + u16 nq_fw_ring_id; +}; + #define BNGE_RX_COPY_THRESH 256 =20 #define BNGE_HW_FEATURE_VLAN_ALL_RX \ @@ -132,6 +146,28 @@ enum { =20 #define BNGE_NET_EN_TPA (BNGE_NET_EN_GRO | BNGE_NET_EN_LRO) =20 +/* Minimum TX BDs for a TX packet with MAX_SKB_FRAGS + 1. We need one extra + * BD because the first TX BD is always a long BD. + */ +#define BNGE_MIN_TX_DESC_CNT (MAX_SKB_FRAGS + 2) + +#define RX_RING(bn, x) (((x) & (bn)->rx_ring_mask) >> (BNGE_PAGE_SHIFT - 4= )) +#define RX_AGG_RING(bn, x) (((x) & (bn)->rx_agg_ring_mask) >> \ + (BNGE_PAGE_SHIFT - 4)) +#define RX_IDX(x) ((x) & (RX_DESC_CNT - 1)) + +#define TX_RING(bn, x) (((x) & (bn)->tx_ring_mask) >> (BNGE_PAGE_SHIFT - 4= )) +#define TX_IDX(x) ((x) & (TX_DESC_CNT - 1)) + +#define CP_RING(x) (((x) & ~(CP_DESC_CNT - 1)) >> (BNGE_PAGE_SHIFT - 4)) +#define CP_IDX(x) ((x) & (CP_DESC_CNT - 1)) + +#define RING_RX(bn, idx) ((idx) & (bn)->rx_ring_mask) +#define NEXT_RX(idx) ((idx) + 1) + +#define RING_RX_AGG(bn, idx) ((idx) & (bn)->rx_agg_ring_mask) +#define NEXT_RX_AGG(idx) ((idx) + 1) + #define BNGE_NQ_HDL_TYPE_RX 0x00 #define BNGE_NQ_HDL_TYPE_TX 0x01 =20 @@ -180,6 +216,14 @@ struct bnge_net { struct bnge_vnic_info *vnic_info; int nr_vnics; int total_irqs; + + int tx_wake_thresh; + u16 rx_offset; + u16 rx_dma_offset; + + u8 rss_hash_key[HW_HASH_KEY_SIZE]; + u8 rss_hash_key_valid:1; + u8 rss_hash_key_updated:1; }; =20 #define BNGE_DEFAULT_RX_RING_SIZE 511 @@ -308,6 +352,9 @@ struct bnge_napi { #define BNGE_MAX_UC_ADDRS 4 =20 struct bnge_vnic_info { + u16 fw_vnic_id; +#define BNGE_MAX_CTX_PER_VNIC 8 + u16 fw_rss_cos_lb_ctx[BNGE_MAX_CTX_PER_VNIC]; u8 *uc_list; dma_addr_t rss_table_dma_addr; __le16 *rss_table; @@ -330,5 +377,6 @@ struct bnge_vnic_info { #define BNGE_VNIC_RSS_FLAG 1 #define BNGE_VNIC_MCAST_FLAG 4 #define BNGE_VNIC_UCAST_FLAG 8 + u32 vnic_id; }; #endif /* _BNGE_NETDEV_H_ */ diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h b/drivers/net/e= thernet/broadcom/bnge/bnge_rmem.h index 162a66c79830..0e7684e20714 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h @@ -184,6 +184,7 @@ struct bnge_ctx_mem_info { struct bnge_ring_struct { struct bnge_ring_mem_info ring_mem; =20 + u16 fw_ring_id; union { u16 grp_idx; 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[144.49.247.13]) by smtp-relay.gmail.com with ESMTPS id 00721157ae682-71e796ec4f4sm10378347b3.49.2025.08.21.08.48.58 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Aug 2025 08:48:58 -0700 (PDT) X-Relaying-Domain: broadcom.com X-CFilter-Loop: Reflected Received: by mail-pg1-f197.google.com with SMTP id 41be03b00d2f7-b47174bdce2so941728a12.2 for ; Thu, 21 Aug 2025 08:48:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1755791337; x=1756396137; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=v6aoqtH+BT1fe73flFq/kGc8d3asSL3bP7IUTlIcfJA=; b=LJDyEv253MOudHqQ6GXW05KMVQ4lZRXI5Ww97VsyBt8990QouEIbDsLqs+5Ok3jusI gR6vqlq9uyuP2prJnAJhZoPH4gQl7pe9AtZC0NQ+pYJIzLhpr5Svj073BFDJueNqHz8n zP+7R+ezvNmcqkRgdcqNK6TjONcrac9bvdCFI= X-Forwarded-Encrypted: i=1; AJvYcCVLM4+ND9zO5j9QVo7H0O362GUFggPwlIQSTOCD19Uj+t5m22mq+1IZ3F3nZrX/KW75ff5bJNu8a8QeBtc=@vger.kernel.org X-Received: by 2002:a17:903:2310:b0:240:84b:a11a with SMTP id d9443c01a7336-245fec07482mr47187215ad.17.1755791337398; Thu, 21 Aug 2025 08:48:57 -0700 (PDT) X-Received: by 2002:a17:903:2310:b0:240:84b:a11a with SMTP id d9443c01a7336-245fec07482mr47186855ad.17.1755791336939; Thu, 21 Aug 2025 08:48:56 -0700 (PDT) Received: from hyd-csg-thor2-h1-server2.dhcp.broadcom.net ([192.19.203.250]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b47640b2d37sm5046894a12.46.2025.08.21.08.48.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Aug 2025 08:48:56 -0700 (PDT) From: Bhargava Marreddy To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, andrew+netdev@lunn.ch, horms@kernel.org Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, michael.chan@broadcom.com, pavan.chebbi@broadcom.com, vsrama-krishna.nemani@broadcom.com, Bhargava Marreddy , Vikas Gupta , Rajashekar Hudumula Subject: [v3, net-next 5/9] bng_en: Allocate packet buffers Date: Thu, 21 Aug 2025 21:15:13 +0000 Message-ID: <20250821211517.16578-6-bhargava.marreddy@broadcom.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20250821211517.16578-1-bhargava.marreddy@broadcom.com> References: <20250821211517.16578-1-bhargava.marreddy@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-DetectorID-Processed: b00c1d49-9d2e-4205-b15f-d015386d3d5e Content-Type: text/plain; charset="utf-8" Populate packet buffers into the RX and AGG rings while these rings are being initialized. Signed-off-by: Bhargava Marreddy Reviewed-by: Vikas Gupta Reviewed-by: Rajashekar Hudumula --- .../net/ethernet/broadcom/bnge/bnge_netdev.c | 218 +++++++++++++++++- 1 file changed, 217 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.c index a5724d389b03..d1674408d6aa 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c @@ -251,6 +251,76 @@ static bool bnge_separate_head_pool(struct bnge_rx_rin= g_info *rxr) return rxr->need_head_pool || PAGE_SIZE > BNGE_RX_PAGE_SIZE; } =20 +static void bnge_free_one_rx_ring(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr) +{ + int i, max_idx; + + if (!rxr->rx_buf_ring) + return; + + max_idx =3D bn->rx_nr_pages * RX_DESC_CNT; + + for (i =3D 0; i < max_idx; i++) { + struct bnge_sw_rx_bd *rx_buf =3D &rxr->rx_buf_ring[i]; + void *data =3D rx_buf->data; + + if (!data) + continue; + + rx_buf->data =3D NULL; + page_pool_free_va(rxr->head_pool, data, true); + } +} + +static void bnge_free_one_rx_agg_ring(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr) +{ + int i, max_idx; + + if (!rxr->rx_agg_buf_ring) + return; + + max_idx =3D bn->rx_agg_nr_pages * RX_DESC_CNT; + + for (i =3D 0; i < max_idx; i++) { + struct bnge_sw_rx_agg_bd *rx_agg_buf =3D &rxr->rx_agg_buf_ring[i]; + netmem_ref netmem =3D rx_agg_buf->netmem; + + if (!netmem) + continue; + + rx_agg_buf->netmem =3D 0; + __clear_bit(i, rxr->rx_agg_bmap); + + page_pool_recycle_direct_netmem(rxr->page_pool, netmem); + } +} + +static void bnge_free_one_rx_pkt_mem(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr) +{ + bnge_free_one_rx_ring(bn, rxr); + bnge_free_one_rx_agg_ring(bn, rxr); +} + +static void bnge_free_rx_pkt_bufs(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i; + + if (!bn->rx_ring) + return; + + for (i =3D 0; i < bd->rx_nr_rings; i++) + bnge_free_one_rx_pkt_mem(bn, &bn->rx_ring[i]); +} + +static void bnge_free_pkts_mem(struct bnge_net *bn) +{ + bnge_free_rx_pkt_bufs(bn); +} + static void bnge_free_rx_rings(struct bnge_net *bn) { struct bnge_dev *bd =3D bn->bd; @@ -721,6 +791,151 @@ static void bnge_init_nq_tree(struct bnge_net *bn) } } =20 +static netmem_ref __bnge_alloc_rx_netmem(struct bnge_net *bn, + dma_addr_t *mapping, + struct bnge_rx_ring_info *rxr, + gfp_t gfp) +{ + netmem_ref netmem; + + netmem =3D page_pool_alloc_netmems(rxr->page_pool, gfp); + if (!netmem) + return 0; + + *mapping =3D page_pool_get_dma_addr_netmem(netmem); + return netmem; +} + +static u8 *__bnge_alloc_rx_frag(struct bnge_net *bn, dma_addr_t *mapping, + struct bnge_rx_ring_info *rxr, + gfp_t gfp) +{ + unsigned int offset; + struct page *page; + + page =3D page_pool_alloc_frag(rxr->head_pool, &offset, + bn->rx_buf_size, gfp); + if (!page) + return NULL; + + *mapping =3D page_pool_get_dma_addr(page) + bn->rx_dma_offset + offset; + return page_address(page) + offset; +} + +static int bnge_alloc_rx_data(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr, + u16 prod, gfp_t gfp) +{ + struct bnge_sw_rx_bd *rx_buf =3D &rxr->rx_buf_ring[RING_RX(bn, prod)]; + struct rx_bd *rxbd; + dma_addr_t mapping; + u8 *data; + + rxbd =3D &rxr->rx_desc_ring[RX_RING(bn, prod)][RX_IDX(prod)]; + data =3D __bnge_alloc_rx_frag(bn, &mapping, rxr, gfp); + if (!data) + return -ENOMEM; + + rx_buf->data =3D data; + rx_buf->data_ptr =3D data + bn->rx_offset; + rx_buf->mapping =3D mapping; + + rxbd->rx_bd_haddr =3D cpu_to_le64(mapping); + + return 0; +} + +static void bnge_alloc_one_rx_pkt_mem(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr, + int ring_nr) +{ + u32 prod; + int i; + + prod =3D rxr->rx_prod; + for (i =3D 0; i < bn->rx_ring_size; i++) { + if (bnge_alloc_rx_data(bn, rxr, prod, GFP_KERNEL)) { + netdev_warn(bn->netdev, "init'ed rx ring %d with %d/%d skbs only\n", + ring_nr, i, bn->rx_ring_size); + break; + } + prod =3D NEXT_RX(prod); + } + rxr->rx_prod =3D prod; +} + +static u16 bnge_find_next_agg_idx(struct bnge_rx_ring_info *rxr, u16 idx) +{ + u16 next, max =3D rxr->rx_agg_bmap_size; + + next =3D find_next_zero_bit(rxr->rx_agg_bmap, max, idx); + if (next >=3D max) + next =3D find_first_zero_bit(rxr->rx_agg_bmap, max); + return next; +} + +static int bnge_alloc_rx_netmem(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr, + u16 prod, gfp_t gfp) +{ + struct bnge_sw_rx_agg_bd *rx_agg_buf; + u16 sw_prod =3D rxr->rx_sw_agg_prod; + struct rx_bd *rxbd; + dma_addr_t mapping; + netmem_ref netmem; + + rxbd =3D &rxr->rx_agg_desc_ring[RX_AGG_RING(bn, prod)][RX_IDX(prod)]; + netmem =3D __bnge_alloc_rx_netmem(bn, &mapping, rxr, gfp); + if (!netmem) + return -ENOMEM; + + if (unlikely(test_bit(sw_prod, rxr->rx_agg_bmap))) + sw_prod =3D bnge_find_next_agg_idx(rxr, sw_prod); + + __set_bit(sw_prod, rxr->rx_agg_bmap); + rx_agg_buf =3D &rxr->rx_agg_buf_ring[sw_prod]; + rxr->rx_sw_agg_prod =3D RING_RX_AGG(bn, NEXT_RX_AGG(sw_prod)); + + rx_agg_buf->netmem =3D netmem; + rx_agg_buf->mapping =3D mapping; + rxbd->rx_bd_haddr =3D cpu_to_le64(mapping); + rxbd->rx_bd_opaque =3D sw_prod; + return 0; +} + +static void bnge_alloc_one_rx_ring_netmem(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr, + int ring_nr) +{ + u32 prod; + int i; + + prod =3D rxr->rx_agg_prod; + for (i =3D 0; i < bn->rx_agg_ring_size; i++) { + if (bnge_alloc_rx_netmem(bn, rxr, prod, GFP_KERNEL)) { + netdev_warn(bn->netdev, "init'ed rx ring %d with %d/%d pages only\n", + ring_nr, i, bn->rx_ring_size); + break; + } + prod =3D NEXT_RX_AGG(prod); + } + rxr->rx_agg_prod =3D prod; +} + +static int bnge_alloc_one_rx_ring(struct bnge_net *bn, int ring_nr) +{ + struct bnge_rx_ring_info *rxr =3D &bn->rx_ring[ring_nr]; + + bnge_alloc_one_rx_pkt_mem(bn, rxr, ring_nr); + + if (!(bnge_is_agg_reqd(bn->bd))) + return 0; + + bnge_alloc_one_rx_ring_netmem(bn, rxr, ring_nr); + + return 0; +} + static void bnge_init_rxbd_pages(struct bnge_ring_struct *ring, u32 type) { struct rx_bd **rx_desc_ring; @@ -788,7 +1003,7 @@ static int bnge_init_one_rx_ring(struct bnge_net *bn, = int ring_nr) =20 bnge_init_one_rx_agg_ring_rxbd(bn, rxr); =20 - return 0; + return bnge_alloc_one_rx_ring(bn, ring_nr); } =20 static int bnge_init_rx_rings(struct bnge_net *bn) @@ -1141,6 +1356,7 @@ static void bnge_close_core(struct bnge_net *bn) struct bnge_dev *bd =3D bn->bd; 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This helps the driver to collect ring statistics provided by the firmware. Signed-off-by: Bhargava Marreddy Reviewed-by: Vikas Gupta Reviewed-by: Rajashekar Hudumula --- .../ethernet/broadcom/bnge/bnge_hwrm_lib.c | 59 +++++++++++ .../ethernet/broadcom/bnge/bnge_hwrm_lib.h | 2 + .../net/ethernet/broadcom/bnge/bnge_netdev.c | 97 ++++++++++++++++++- .../net/ethernet/broadcom/bnge/bnge_netdev.h | 12 +++ 4 files changed, 169 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c b/drivers/n= et/ethernet/broadcom/bnge/bnge_hwrm_lib.c index 6992066690bd..d77ea5536e7c 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c @@ -701,3 +701,62 @@ int bnge_hwrm_queue_qportcfg(struct bnge_dev *bd) bnge_hwrm_req_drop(bd, req); return rc; } + +void bnge_hwrm_stat_ctx_free(struct bnge_net *bn) +{ + struct hwrm_stat_ctx_free_input *req; + struct bnge_dev *bd =3D bn->bd; + int i; + + if (!bn->bnapi) + return; + + if (bnge_hwrm_req_init(bd, req, HWRM_STAT_CTX_FREE)) + return; + + bnge_hwrm_req_hold(bd, req); + for (i =3D 0; i < bd->nq_nr_rings; i++) { + struct bnge_napi *bnapi =3D bn->bnapi[i]; + struct bnge_nq_ring_info *nqr =3D &bnapi->nq_ring; + + if (nqr->hw_stats_ctx_id !=3D INVALID_STATS_CTX_ID) { + req->stat_ctx_id =3D cpu_to_le32(nqr->hw_stats_ctx_id); + bnge_hwrm_req_send(bd, req); + + nqr->hw_stats_ctx_id =3D INVALID_STATS_CTX_ID; + } + } + bnge_hwrm_req_drop(bd, req); +} + +int bnge_hwrm_stat_ctx_alloc(struct bnge_net *bn) +{ + struct hwrm_stat_ctx_alloc_output *resp; + struct hwrm_stat_ctx_alloc_input *req; + struct bnge_dev *bd =3D bn->bd; + int rc, i; + + rc =3D bnge_hwrm_req_init(bd, req, HWRM_STAT_CTX_ALLOC); + if (rc) + return rc; + + req->stats_dma_length =3D cpu_to_le16(bd->hw_ring_stats_size); + req->update_period_ms =3D cpu_to_le32(bn->stats_coal_ticks / 1000); + + resp =3D bnge_hwrm_req_hold(bd, req); + for (i =3D 0; i < bd->nq_nr_rings; i++) { + struct bnge_napi *bnapi =3D bn->bnapi[i]; + struct bnge_nq_ring_info *nqr =3D &bnapi->nq_ring; + + req->stats_dma_addr =3D cpu_to_le64(nqr->stats.hw_stats_map); + + rc =3D bnge_hwrm_req_send(bd, req); + if (rc) + break; + + nqr->hw_stats_ctx_id =3D le32_to_cpu(resp->stat_ctx_id); + bn->grp_info[i].fw_stats_ctx =3D nqr->hw_stats_ctx_id; + } + bnge_hwrm_req_drop(bd, req); + return rc; +} diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h b/drivers/n= et/ethernet/broadcom/bnge/bnge_hwrm_lib.h index 6c03923eb559..1c3fd02d7e0a 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h @@ -24,4 +24,6 @@ int bnge_hwrm_func_qcfg(struct bnge_dev *bd); int bnge_hwrm_func_resc_qcaps(struct bnge_dev *bd); int bnge_hwrm_queue_qportcfg(struct bnge_dev *bd); =20 +void bnge_hwrm_stat_ctx_free(struct bnge_net *bn); +int bnge_hwrm_stat_ctx_alloc(struct bnge_net *bn); #endif /* _BNGE_HWRM_LIB_H_ */ diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.c index d1674408d6aa..046219c11f91 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c @@ -30,6 +30,70 @@ #define BNGE_TC_TO_RING_BASE(bd, tc) \ ((tc) * (bd)->tx_nr_rings_per_tc) =20 +static void bnge_free_stats_mem(struct bnge_net *bn, + struct bnge_stats_mem *stats) +{ + struct bnge_dev *bd =3D bn->bd; + + if (stats->hw_stats) { + dma_free_coherent(bd->dev, stats->len, stats->hw_stats, + stats->hw_stats_map); + stats->hw_stats =3D NULL; + } +} + +static int bnge_alloc_stats_mem(struct bnge_net *bn, + struct bnge_stats_mem *stats) +{ + struct bnge_dev *bd =3D bn->bd; + + stats->hw_stats =3D dma_alloc_coherent(bd->dev, stats->len, + &stats->hw_stats_map, GFP_KERNEL); + if (!stats->hw_stats) + return -ENOMEM; + + return 0; +} + +static void bnge_free_ring_stats(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i; + + if (!bn->bnapi) + return; + + for (i =3D 0; i < bd->nq_nr_rings; i++) { + struct bnge_napi *bnapi =3D bn->bnapi[i]; + struct bnge_nq_ring_info *nqr =3D &bnapi->nq_ring; + + bnge_free_stats_mem(bn, &nqr->stats); + } +} + +static int bnge_alloc_ring_stats(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + u32 size, i; + int rc; + + size =3D bd->hw_ring_stats_size; + + for (i =3D 0; i < bd->nq_nr_rings; i++) { + struct bnge_napi *bnapi =3D bn->bnapi[i]; + struct bnge_nq_ring_info *nqr =3D &bnapi->nq_ring; + + nqr->stats.len =3D size; + rc =3D bnge_alloc_stats_mem(bn, &nqr->stats); + if (rc) + return rc; + + nqr->hw_stats_ctx_id =3D INVALID_STATS_CTX_ID; + } + + return 0; +} + static void bnge_free_nq_desc_arr(struct bnge_nq_ring_info *nqr) { struct bnge_ring_struct *ring =3D &nqr->ring_struct; @@ -628,6 +692,7 @@ static void bnge_free_core(struct bnge_net *bn) bnge_free_rx_rings(bn); bnge_free_nq_tree(bn); bnge_free_nq_arrays(bn); + bnge_free_ring_stats(bn); bnge_free_ring_grps(bn); bnge_free_vnics(bn); kfree(bn->tx_ring_map); @@ -717,6 +782,10 @@ static int bnge_alloc_core(struct bnge_net *bn) txr->bnapi =3D bnapi2; } =20 + rc =3D bnge_alloc_ring_stats(bn); + if (rc) + goto err_free_core; + rc =3D bnge_alloc_vnics(bn); if (rc) goto err_free_core; @@ -1164,6 +1233,11 @@ static int bnge_setup_interrupts(struct bnge_net *bn) return bnge_set_real_num_queues(bn); } =20 +static void bnge_hwrm_resource_free(struct bnge_net *bn, bool close_path) +{ + bnge_hwrm_stat_ctx_free(bn); +} + static int bnge_request_irq(struct bnge_net *bn) { struct bnge_dev *bd =3D bn->bd; @@ -1205,6 +1279,27 @@ static int bnge_request_irq(struct bnge_net *bn) return rc; } =20 +static int bnge_init_chip(struct bnge_net *bn) +{ + int rc =3D 0; + +#define BNGE_DEF_STATS_COAL_TICKS 1000000 + bn->stats_coal_ticks =3D BNGE_DEF_STATS_COAL_TICKS; + + rc =3D bnge_hwrm_stat_ctx_alloc(bn); + if (rc) { + netdev_err(bn->netdev, "hwrm stat ctx alloc failure rc: %d\n", + rc); + goto err_out; + } + + return 0; +err_out: + bnge_hwrm_resource_free(bn, 0); + + return rc; +} + static int bnge_napi_poll(struct napi_struct *napi, int budget) { int work_done =3D 0; @@ -1285,7 +1380,7 @@ static int bnge_init_nic(struct bnge_net *bn) bnge_init_ring_grps(bn); bnge_init_vnics(bn); =20 - return 0; + return bnge_init_chip(bn); } =20 static int bnge_open_core(struct bnge_net *bn) diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.h index 0859f500b3f4..387f68d24a4e 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h @@ -224,6 +224,7 @@ struct bnge_net { u8 rss_hash_key[HW_HASH_KEY_SIZE]; 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[144.49.247.19]) by smtp-relay.gmail.com with ESMTPS id 6a1803df08f44-70ba924f4c3sm10514096d6.35.2025.08.21.08.49.08 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Aug 2025 08:49:08 -0700 (PDT) X-Relaying-Domain: broadcom.com X-CFilter-Loop: Reflected Received: by mail-pf1-f197.google.com with SMTP id d2e1a72fcca58-76e2eb787f2so1345737b3a.3 for ; Thu, 21 Aug 2025 08:49:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1755791347; x=1756396147; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4WtW2jttHYkEi+bMfPj4L+F2ZgVs7s/xK1fCVfBPIp4=; b=J8JrjsIsxEj0HYCwPrYQtmFpKnyiD2uDbzCMkD3QyGow9ZuZcS5uezbC0CUmz1pRBa gVksKcKUM2xEKGdhu2NkNs1lpEH1iC9Hmvb5bt9vyBmbMe5kMaUhfC97lX+DDM8z0ijH Pbxy3X1zNr13BGJZUAeRSovAB3RFb7tqUoVls= X-Forwarded-Encrypted: i=1; AJvYcCVbRvvH0zYxlR5J66P0J8IkuR0Lyy9uvEI+2KuX8AvEnOrzj35czA43oE2HECcbjecaW3aFS3vqddn6Nss=@vger.kernel.org X-Received: by 2002:a05:6a20:938e:b0:206:a9bd:a3a3 with SMTP id adf61e73a8af0-243309d0042mr4752601637.24.1755791346951; Thu, 21 Aug 2025 08:49:06 -0700 (PDT) X-Received: by 2002:a05:6a20:938e:b0:206:a9bd:a3a3 with SMTP id adf61e73a8af0-243309d0042mr4752555637.24.1755791346351; Thu, 21 Aug 2025 08:49:06 -0700 (PDT) Received: from hyd-csg-thor2-h1-server2.dhcp.broadcom.net ([192.19.203.250]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b47640b2d37sm5046894a12.46.2025.08.21.08.49.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Aug 2025 08:49:05 -0700 (PDT) From: Bhargava Marreddy To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, andrew+netdev@lunn.ch, horms@kernel.org Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, michael.chan@broadcom.com, pavan.chebbi@broadcom.com, vsrama-krishna.nemani@broadcom.com, Bhargava Marreddy , Vikas Gupta , Rajashekar Hudumula Subject: [v3, net-next 7/9] bng_en: Register rings with the firmware Date: Thu, 21 Aug 2025 21:15:15 +0000 Message-ID: <20250821211517.16578-8-bhargava.marreddy@broadcom.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20250821211517.16578-1-bhargava.marreddy@broadcom.com> References: <20250821211517.16578-1-bhargava.marreddy@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-DetectorID-Processed: b00c1d49-9d2e-4205-b15f-d015386d3d5e Content-Type: text/plain; charset="utf-8" Enable ring functionality by registering RX, AGG, TX, CMPL, and NQ rings with the firmware. Initialise the doorbells associated with the rings. Signed-off-by: Bhargava Marreddy Reviewed-by: Vikas Gupta Reviewed-by: Rajashekar Hudumula --- drivers/net/ethernet/broadcom/bnge/bnge.h | 24 ++ .../net/ethernet/broadcom/bnge/bnge_core.c | 4 + drivers/net/ethernet/broadcom/bnge/bnge_db.h | 34 ++ .../ethernet/broadcom/bnge/bnge_hwrm_lib.c | 147 ++++++++ .../ethernet/broadcom/bnge/bnge_hwrm_lib.h | 6 + .../net/ethernet/broadcom/bnge/bnge_netdev.c | 349 ++++++++++++++++++ .../net/ethernet/broadcom/bnge/bnge_netdev.h | 16 + .../net/ethernet/broadcom/bnge/bnge_rmem.h | 1 + 8 files changed, 581 insertions(+) create mode 100644 drivers/net/ethernet/broadcom/bnge/bnge_db.h diff --git a/drivers/net/ethernet/broadcom/bnge/bnge.h b/drivers/net/ethern= et/broadcom/bnge/bnge.h index 07df86f0061f..642e16f511d5 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge.h @@ -106,6 +106,10 @@ struct bnge_dev { u16 chip_num; u8 chip_rev; =20 +#if BITS_PER_LONG =3D=3D 32 + /* ensure atomic 64-bit doorbell writes on 32-bit systems. */ + spinlock_t db_lock; +#endif int db_offset; /* db_offset within db_size */ int db_size; =20 @@ -218,6 +222,26 @@ static inline bool bnge_is_agg_reqd(struct bnge_dev *b= d) return true; } =20 +static inline void bnge_writeq(struct bnge_dev *bd, u64 val, + void __iomem *addr) +{ +#if BITS_PER_LONG =3D=3D 32 + spin_lock(&bd->db_lock); + lo_hi_writeq(val, addr); + spin_unlock(&bd->db_lock); +#else + writeq(val, addr); +#endif +} + +/* For TX and RX ring doorbells */ +static inline void bnge_db_write(struct bnge_dev *bd, struct bnge_db_info = *db, + u32 idx) +{ + bnge_writeq(bd, db->db_key64 | DB_RING_IDX(db, idx), + db->doorbell); +} + bool bnge_aux_registered(struct bnge_dev *bd); u16 bnge_aux_get_msix(struct bnge_dev *bd); =20 diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_core.c b/drivers/net/e= thernet/broadcom/bnge/bnge_core.c index 51e93b7f9899..56a3dd2a23ee 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_core.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_core.c @@ -302,6 +302,10 @@ static int bnge_probe_one(struct pci_dev *pdev, const = struct pci_device_id *ent) goto err_config_uninit; } =20 +#if BITS_PER_LONG =3D=3D 32 + spin_lock_init(&bd->db_lock); +#endif + rc =3D bnge_alloc_irqs(bd); if (rc) { dev_err(&pdev->dev, "Error IRQ allocation rc =3D %d\n", rc); diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_db.h b/drivers/net/eth= ernet/broadcom/bnge/bnge_db.h new file mode 100644 index 000000000000..950ed582f1d8 --- /dev/null +++ b/drivers/net/ethernet/broadcom/bnge/bnge_db.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2025 Broadcom */ + +#ifndef _BNGE_DB_H_ +#define _BNGE_DB_H_ + +/* 64-bit doorbell */ +#define DBR_EPOCH_SFT 24 +#define DBR_TOGGLE_SFT 25 +#define DBR_XID_SFT 32 +#define DBR_PATH_L2 (0x1ULL << 56) +#define DBR_VALID (0x1ULL << 58) +#define DBR_TYPE_SQ (0x0ULL << 60) +#define DBR_TYPE_SRQ (0x2ULL << 60) +#define DBR_TYPE_CQ (0x4ULL << 60) +#define DBR_TYPE_CQ_ARMALL (0x6ULL << 60) +#define DBR_TYPE_NQ (0xaULL << 60) +#define DBR_TYPE_NQ_ARM (0xbULL << 60) +#define DBR_TYPE_NQ_MASK (0xeULL << 60) + +struct bnge_db_info { + void __iomem *doorbell; + u64 db_key64; + u32 db_ring_mask; + u32 db_epoch_mask; + u8 db_epoch_shift; +}; + +#define DB_EPOCH(db, idx) (((idx) & (db)->db_epoch_mask) << \ + ((db)->db_epoch_shift)) +#define DB_RING_IDX(db, idx) (((idx) & (db)->db_ring_mask) | \ + DB_EPOCH(db, idx)) + +#endif /* _BNGE_DB_H_ */ diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c b/drivers/n= et/ethernet/broadcom/bnge/bnge_hwrm_lib.c index d77ea5536e7c..a7c18a57fbca 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c @@ -760,3 +760,150 @@ int bnge_hwrm_stat_ctx_alloc(struct bnge_net *bn) bnge_hwrm_req_drop(bd, req); return rc; } + +int hwrm_ring_free_send_msg(struct bnge_net *bn, + struct bnge_ring_struct *ring, + u32 ring_type, int cmpl_ring_id) +{ + struct hwrm_ring_free_input *req; + struct bnge_dev *bd =3D bn->bd; + int rc; + + rc =3D bnge_hwrm_req_init(bd, req, HWRM_RING_FREE); + if (rc) + goto exit; + + req->cmpl_ring =3D cpu_to_le16(cmpl_ring_id); + req->ring_type =3D ring_type; + req->ring_id =3D cpu_to_le16(ring->fw_ring_id); + + bnge_hwrm_req_hold(bd, req); + rc =3D bnge_hwrm_req_send(bd, req); + bnge_hwrm_req_drop(bd, req); +exit: + if (rc) { + netdev_err(bd->netdev, "hwrm_ring_free type %d failed. rc:%d\n", ring_ty= pe, rc); + return -EIO; + } + return 0; +} + +int hwrm_ring_alloc_send_msg(struct bnge_net *bn, + struct bnge_ring_struct *ring, + u32 ring_type, u32 map_index) +{ + struct bnge_ring_mem_info *rmem =3D &ring->ring_mem; + struct bnge_ring_grp_info *grp_info; + struct hwrm_ring_alloc_output *resp; + struct hwrm_ring_alloc_input *req; + struct bnge_dev *bd =3D bn->bd; + u16 ring_id, flags =3D 0; + int rc; + + rc =3D bnge_hwrm_req_init(bd, req, HWRM_RING_ALLOC); + if (rc) + goto exit; + + req->enables =3D 0; + if (rmem->nr_pages > 1) { + req->page_tbl_addr =3D cpu_to_le64(rmem->dma_pg_tbl); + /* Page size is in log2 units */ + req->page_size =3D BNGE_PAGE_SHIFT; + req->page_tbl_depth =3D 1; + } else { + req->page_tbl_addr =3D cpu_to_le64(rmem->dma_arr[0]); + } + req->fbo =3D 0; + /* Association of ring index with doorbell index and MSIX number */ + req->logical_id =3D cpu_to_le16(map_index); + + switch (ring_type) { + case HWRM_RING_ALLOC_TX: { + struct bnge_tx_ring_info *txr; + + txr =3D container_of(ring, struct bnge_tx_ring_info, + tx_ring_struct); + req->ring_type =3D RING_ALLOC_REQ_RING_TYPE_TX; + /* Association of transmit ring with completion ring */ + grp_info =3D &bn->grp_info[ring->grp_idx]; + req->cmpl_ring_id =3D cpu_to_le16(bnge_cp_ring_for_tx(txr)); + req->length =3D cpu_to_le32(bn->tx_ring_mask + 1); + req->stat_ctx_id =3D cpu_to_le32(grp_info->fw_stats_ctx); + req->queue_id =3D cpu_to_le16(ring->queue_id); + req->flags =3D cpu_to_le16(flags); + break; + } + case HWRM_RING_ALLOC_RX: + req->ring_type =3D RING_ALLOC_REQ_RING_TYPE_RX; + req->length =3D cpu_to_le32(bn->rx_ring_mask + 1); + + /* Association of rx ring with stats context */ + grp_info =3D &bn->grp_info[ring->grp_idx]; + req->rx_buf_size =3D cpu_to_le16(bn->rx_buf_use_size); + req->stat_ctx_id =3D cpu_to_le32(grp_info->fw_stats_ctx); + req->enables |=3D + cpu_to_le32(RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID); + if (NET_IP_ALIGN =3D=3D 2) + flags =3D RING_ALLOC_REQ_FLAGS_RX_SOP_PAD; + req->flags =3D cpu_to_le16(flags); + break; + case HWRM_RING_ALLOC_AGG: + req->ring_type =3D RING_ALLOC_REQ_RING_TYPE_RX_AGG; + /* Association of agg ring with rx ring */ + grp_info =3D &bn->grp_info[ring->grp_idx]; + req->rx_ring_id =3D cpu_to_le16(grp_info->rx_fw_ring_id); + req->rx_buf_size =3D cpu_to_le16(BNGE_RX_PAGE_SIZE); + req->stat_ctx_id =3D cpu_to_le32(grp_info->fw_stats_ctx); + req->enables |=3D + cpu_to_le32(RING_ALLOC_REQ_ENABLES_RX_RING_ID_VALID | + RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID); + req->length =3D cpu_to_le32(bn->rx_agg_ring_mask + 1); + break; + case HWRM_RING_ALLOC_CMPL: + req->ring_type =3D RING_ALLOC_REQ_RING_TYPE_L2_CMPL; + req->length =3D cpu_to_le32(bn->cp_ring_mask + 1); + /* Association of cp ring with nq */ + grp_info =3D &bn->grp_info[map_index]; + req->nq_ring_id =3D cpu_to_le16(grp_info->nq_fw_ring_id); + req->cq_handle =3D cpu_to_le64(ring->handle); + req->enables |=3D + cpu_to_le32(RING_ALLOC_REQ_ENABLES_NQ_RING_ID_VALID); + break; + case HWRM_RING_ALLOC_NQ: + req->ring_type =3D RING_ALLOC_REQ_RING_TYPE_NQ; + req->length =3D cpu_to_le32(bn->cp_ring_mask + 1); + req->int_mode =3D RING_ALLOC_REQ_INT_MODE_MSIX; + break; + default: + netdev_err(bn->netdev, "hwrm alloc invalid ring type %d\n", ring_type); + return -EINVAL; + } + + resp =3D bnge_hwrm_req_hold(bd, req); + rc =3D bnge_hwrm_req_send(bd, req); + ring_id =3D le16_to_cpu(resp->ring_id); + bnge_hwrm_req_drop(bd, req); + +exit: + if (rc) { + netdev_err(bd->netdev, "hwrm_ring_alloc type %d failed. rc:%d\n", ring_t= ype, rc); + return -EIO; + } + ring->fw_ring_id =3D ring_id; + return rc; +} + +int bnge_hwrm_set_async_event_cr(struct bnge_dev *bd, int idx) +{ + struct hwrm_func_cfg_input *req; + int rc; + + rc =3D bnge_hwrm_req_init(bd, req, HWRM_FUNC_CFG); + if (rc) + return rc; + + req->fid =3D cpu_to_le16(0xffff); + req->enables =3D cpu_to_le32(FUNC_CFG_REQ_ENABLES_ASYNC_EVENT_CR); + req->async_event_cr =3D cpu_to_le16(idx); + return bnge_hwrm_req_send(bd, req); +} diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h b/drivers/n= et/ethernet/broadcom/bnge/bnge_hwrm_lib.h index 1c3fd02d7e0a..b2e2ec47be2e 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h @@ -26,4 +26,10 @@ int bnge_hwrm_queue_qportcfg(struct bnge_dev *bd); =20 void bnge_hwrm_stat_ctx_free(struct bnge_net *bn); int bnge_hwrm_stat_ctx_alloc(struct bnge_net *bn); +int hwrm_ring_free_send_msg(struct bnge_net *bn, struct bnge_ring_struct *= ring, + u32 ring_type, int cmpl_ring_id); +int hwrm_ring_alloc_send_msg(struct bnge_net *bn, + struct bnge_ring_struct *ring, + u32 ring_type, u32 map_index); +int bnge_hwrm_set_async_event_cr(struct bnge_dev *bd, int idx); #endif /* _BNGE_HWRM_LIB_H_ */ diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.c index 046219c11f91..c74b2343acde 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c @@ -823,6 +823,28 @@ static int bnge_alloc_core(struct bnge_net *bn) return rc; } =20 +u16 bnge_cp_ring_for_rx(struct bnge_rx_ring_info *rxr) +{ + return rxr->rx_cpr->ring_struct.fw_ring_id; +} + +u16 bnge_cp_ring_for_tx(struct bnge_tx_ring_info *txr) +{ + return txr->tx_cpr->ring_struct.fw_ring_id; +} + +static void bnge_db_nq(struct bnge_net *bn, struct bnge_db_info *db, u32 i= dx) +{ + bnge_writeq(bn->bd, db->db_key64 | DBR_TYPE_NQ_MASK | + DB_RING_IDX(db, idx), db->doorbell); +} + +static void bnge_db_cq(struct bnge_net *bn, struct bnge_db_info *db, u32 i= dx) +{ + bnge_writeq(bn->bd, db->db_key64 | DBR_TYPE_CQ_ARMALL | + DB_RING_IDX(db, idx), db->doorbell); +} + static int bnge_cp_num_to_irq_num(struct bnge_net *bn, int n) { struct bnge_napi *bnapi =3D bn->bnapi[n]; @@ -1182,6 +1204,326 @@ static void bnge_init_vnics(struct bnge_net *bn) } } =20 +static void bnge_set_db_mask(struct bnge_net *bn, struct bnge_db_info *db, + u32 ring_type) +{ + switch (ring_type) { + case HWRM_RING_ALLOC_TX: + db->db_ring_mask =3D bn->tx_ring_mask; + break; + case HWRM_RING_ALLOC_RX: + db->db_ring_mask =3D bn->rx_ring_mask; + break; + case HWRM_RING_ALLOC_AGG: + db->db_ring_mask =3D bn->rx_agg_ring_mask; + break; + case HWRM_RING_ALLOC_CMPL: + case HWRM_RING_ALLOC_NQ: + db->db_ring_mask =3D bn->cp_ring_mask; + break; + } + db->db_epoch_mask =3D db->db_ring_mask + 1; + db->db_epoch_shift =3D DBR_EPOCH_SFT - ilog2(db->db_epoch_mask); +} + +static void bnge_set_db(struct bnge_net *bn, struct bnge_db_info *db, + u32 ring_type, u32 map_idx, u32 xid) +{ + struct bnge_dev *bd =3D bn->bd; + + switch (ring_type) { + case HWRM_RING_ALLOC_TX: + db->db_key64 =3D DBR_PATH_L2 | DBR_TYPE_SQ; + break; + case HWRM_RING_ALLOC_RX: + case HWRM_RING_ALLOC_AGG: + db->db_key64 =3D DBR_PATH_L2 | DBR_TYPE_SRQ; + break; + case HWRM_RING_ALLOC_CMPL: + db->db_key64 =3D DBR_PATH_L2; + break; + case HWRM_RING_ALLOC_NQ: + db->db_key64 =3D DBR_PATH_L2; + break; + } + db->db_key64 |=3D ((u64)xid << DBR_XID_SFT) | DBR_VALID; + + db->doorbell =3D bd->bar1 + bd->db_offset; + bnge_set_db_mask(bn, db, ring_type); +} + +static int bnge_hwrm_cp_ring_alloc(struct bnge_net *bn, + struct bnge_cp_ring_info *cpr) +{ + const u32 type =3D HWRM_RING_ALLOC_CMPL; + struct bnge_napi *bnapi =3D cpr->bnapi; + struct bnge_ring_struct *ring; + u32 map_idx =3D bnapi->index; + int rc; + + ring =3D &cpr->ring_struct; + ring->handle =3D BNGE_SET_NQ_HDL(cpr); + rc =3D hwrm_ring_alloc_send_msg(bn, ring, type, map_idx); + if (rc) + return rc; + + bnge_set_db(bn, &cpr->cp_db, type, map_idx, ring->fw_ring_id); + bnge_db_cq(bn, &cpr->cp_db, cpr->cp_raw_cons); + + return 0; +} + +static int bnge_hwrm_tx_ring_alloc(struct bnge_net *bn, + struct bnge_tx_ring_info *txr, u32 tx_idx) +{ + struct bnge_ring_struct *ring =3D &txr->tx_ring_struct; + const u32 type =3D HWRM_RING_ALLOC_TX; + int rc; + + rc =3D hwrm_ring_alloc_send_msg(bn, ring, type, tx_idx); + if (rc) + return rc; + + bnge_set_db(bn, &txr->tx_db, type, tx_idx, ring->fw_ring_id); + + return 0; +} + +static int bnge_hwrm_rx_agg_ring_alloc(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr) +{ + struct bnge_ring_struct *ring =3D &rxr->rx_agg_ring_struct; + u32 type =3D HWRM_RING_ALLOC_AGG; + struct bnge_dev *bd =3D bn->bd; + u32 grp_idx =3D ring->grp_idx; + u32 map_idx; + int rc; + + map_idx =3D grp_idx + bd->rx_nr_rings; + rc =3D hwrm_ring_alloc_send_msg(bn, ring, type, map_idx); + if (rc) + return rc; + + bnge_set_db(bn, &rxr->rx_agg_db, type, map_idx, + ring->fw_ring_id); + bnge_db_write(bn->bd, &rxr->rx_agg_db, rxr->rx_agg_prod); + bnge_db_write(bn->bd, &rxr->rx_db, rxr->rx_prod); + bn->grp_info[grp_idx].agg_fw_ring_id =3D ring->fw_ring_id; + + return 0; +} + +static int bnge_hwrm_rx_ring_alloc(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr) +{ + struct bnge_ring_struct *ring =3D &rxr->rx_ring_struct; + struct bnge_napi *bnapi =3D rxr->bnapi; + u32 type =3D HWRM_RING_ALLOC_RX; + u32 map_idx =3D bnapi->index; + int rc; + + rc =3D hwrm_ring_alloc_send_msg(bn, ring, type, map_idx); + if (rc) + return rc; + + bnge_set_db(bn, &rxr->rx_db, type, map_idx, ring->fw_ring_id); + bn->grp_info[map_idx].rx_fw_ring_id =3D ring->fw_ring_id; + + return 0; +} + +static int bnge_hwrm_ring_alloc(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + bool agg_rings; + int i, rc =3D 0; + + agg_rings =3D !!(bnge_is_agg_reqd(bd)); + for (i =3D 0; i < bd->nq_nr_rings; i++) { + struct bnge_napi *bnapi =3D bn->bnapi[i]; + struct bnge_nq_ring_info *nqr =3D &bnapi->nq_ring; + struct bnge_ring_struct *ring =3D &nqr->ring_struct; + u32 type =3D HWRM_RING_ALLOC_NQ; + u32 map_idx =3D ring->map_idx; + unsigned int vector; + + vector =3D bd->irq_tbl[map_idx].vector; + disable_irq_nosync(vector); + rc =3D hwrm_ring_alloc_send_msg(bn, ring, type, map_idx); + if (rc) { + enable_irq(vector); + goto err_out; + } + bnge_set_db(bn, &nqr->nq_db, type, map_idx, ring->fw_ring_id); + bnge_db_nq(bn, &nqr->nq_db, nqr->nq_raw_cons); + enable_irq(vector); + bn->grp_info[i].nq_fw_ring_id =3D ring->fw_ring_id; + + if (!i) { + rc =3D bnge_hwrm_set_async_event_cr(bd, ring->fw_ring_id); + if (rc) + netdev_warn(bn->netdev, "Failed to set async event completion ring.\n"= ); + } + } + + for (i =3D 0; i < bd->tx_nr_rings; i++) { + struct bnge_tx_ring_info *txr =3D &bn->tx_ring[i]; + + rc =3D bnge_hwrm_cp_ring_alloc(bn, txr->tx_cpr); + if (rc) + goto err_out; + rc =3D bnge_hwrm_tx_ring_alloc(bn, txr, i); + if (rc) + goto err_out; + } + + for (i =3D 0; i < bd->rx_nr_rings; i++) { + struct bnge_rx_ring_info *rxr =3D &bn->rx_ring[i]; + struct bnge_cp_ring_info *cpr; + struct bnge_ring_struct *ring; + struct bnge_napi *bnapi; + u32 map_idx, type; + + rc =3D bnge_hwrm_rx_ring_alloc(bn, rxr); + if (rc) + goto err_out; + /* If we have agg rings, post agg buffers first. */ + if (!agg_rings) + bnge_db_write(bn->bd, &rxr->rx_db, rxr->rx_prod); + + cpr =3D rxr->rx_cpr; + bnapi =3D rxr->bnapi; + type =3D HWRM_RING_ALLOC_CMPL; + map_idx =3D bnapi->index; + + ring =3D &cpr->ring_struct; + ring->handle =3D BNGE_SET_NQ_HDL(cpr); + rc =3D hwrm_ring_alloc_send_msg(bn, ring, type, map_idx); + if (rc) + goto err_out; + bnge_set_db(bn, &cpr->cp_db, type, map_idx, + ring->fw_ring_id); + bnge_db_cq(bn, &cpr->cp_db, cpr->cp_raw_cons); + } + + if (agg_rings) { + for (i =3D 0; i < bd->rx_nr_rings; i++) { + rc =3D bnge_hwrm_rx_agg_ring_alloc(bn, &bn->rx_ring[i]); + if (rc) + goto err_out; + } + } +err_out: + return rc; +} + +static void bnge_hwrm_rx_ring_free(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr, + bool close_path) +{ + struct bnge_ring_struct *ring =3D &rxr->rx_ring_struct; + u32 grp_idx =3D rxr->bnapi->index; + u32 cmpl_ring_id; + + if (ring->fw_ring_id =3D=3D INVALID_HW_RING_ID) + return; + + cmpl_ring_id =3D bnge_cp_ring_for_rx(rxr); + hwrm_ring_free_send_msg(bn, ring, + RING_FREE_REQ_RING_TYPE_RX, + close_path ? cmpl_ring_id : + INVALID_HW_RING_ID); + ring->fw_ring_id =3D INVALID_HW_RING_ID; + bn->grp_info[grp_idx].rx_fw_ring_id =3D INVALID_HW_RING_ID; +} + +static void bnge_hwrm_rx_agg_ring_free(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr, + bool close_path) +{ + struct bnge_ring_struct *ring =3D &rxr->rx_agg_ring_struct; + u32 grp_idx =3D rxr->bnapi->index; + u32 cmpl_ring_id; + + if (ring->fw_ring_id =3D=3D INVALID_HW_RING_ID) + return; + + cmpl_ring_id =3D bnge_cp_ring_for_rx(rxr); + hwrm_ring_free_send_msg(bn, ring, RING_FREE_REQ_RING_TYPE_RX_AGG, + close_path ? cmpl_ring_id : + INVALID_HW_RING_ID); + ring->fw_ring_id =3D INVALID_HW_RING_ID; + bn->grp_info[grp_idx].agg_fw_ring_id =3D INVALID_HW_RING_ID; +} + +static void bnge_hwrm_tx_ring_free(struct bnge_net *bn, + struct bnge_tx_ring_info *txr, + bool close_path) +{ + struct bnge_ring_struct *ring =3D &txr->tx_ring_struct; + u32 cmpl_ring_id; + + if (ring->fw_ring_id =3D=3D INVALID_HW_RING_ID) + return; + + cmpl_ring_id =3D close_path ? bnge_cp_ring_for_tx(txr) : + INVALID_HW_RING_ID; + hwrm_ring_free_send_msg(bn, ring, RING_FREE_REQ_RING_TYPE_TX, + cmpl_ring_id); + ring->fw_ring_id =3D INVALID_HW_RING_ID; +} + +static void bnge_hwrm_cp_ring_free(struct bnge_net *bn, + struct bnge_cp_ring_info *cpr) +{ + struct bnge_ring_struct *ring; + + ring =3D &cpr->ring_struct; + if (ring->fw_ring_id =3D=3D INVALID_HW_RING_ID) + return; + + hwrm_ring_free_send_msg(bn, ring, RING_FREE_REQ_RING_TYPE_L2_CMPL, + INVALID_HW_RING_ID); + ring->fw_ring_id =3D INVALID_HW_RING_ID; +} + +static void bnge_hwrm_ring_free(struct bnge_net *bn, bool close_path) +{ + struct bnge_dev *bd =3D bn->bd; + int i; + + if (!bn->bnapi) + return; + + for (i =3D 0; i < bd->tx_nr_rings; i++) + bnge_hwrm_tx_ring_free(bn, &bn->tx_ring[i], close_path); + + for (i =3D 0; i < bd->rx_nr_rings; i++) { + bnge_hwrm_rx_ring_free(bn, &bn->rx_ring[i], close_path); + bnge_hwrm_rx_agg_ring_free(bn, &bn->rx_ring[i], close_path); + } + + for (i =3D 0; i < bd->nq_nr_rings; i++) { + struct bnge_napi *bnapi =3D bn->bnapi[i]; + struct bnge_nq_ring_info *nqr; + struct bnge_ring_struct *ring; + int j; + + nqr =3D &bnapi->nq_ring; + for (j =3D 0; j < nqr->cp_ring_count && nqr->cp_ring_arr; j++) + bnge_hwrm_cp_ring_free(bn, &nqr->cp_ring_arr[j]); + + ring =3D &nqr->ring_struct; + if (ring->fw_ring_id !=3D INVALID_HW_RING_ID) { + hwrm_ring_free_send_msg(bn, ring, + RING_FREE_REQ_RING_TYPE_NQ, + INVALID_HW_RING_ID); + ring->fw_ring_id =3D INVALID_HW_RING_ID; + bn->grp_info[i].nq_fw_ring_id =3D INVALID_HW_RING_ID; + } + } +} + static void bnge_setup_msix(struct bnge_net *bn) { struct net_device *dev =3D bn->netdev; @@ -1235,6 +1577,7 @@ static int bnge_setup_interrupts(struct bnge_net *bn) =20 static void bnge_hwrm_resource_free(struct bnge_net *bn, bool close_path) { + bnge_hwrm_ring_free(bn, close_path); bnge_hwrm_stat_ctx_free(bn); } =20 @@ -1293,6 +1636,12 @@ static int bnge_init_chip(struct bnge_net *bn) goto err_out; } =20 + rc =3D bnge_hwrm_ring_alloc(bn); + if (rc) { + netdev_err(bn->netdev, "hwrm ring alloc failure rc: %d\n", rc); + goto err_out; + } + return 0; err_out: bnge_hwrm_resource_free(bn, 0); diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.h index 387f68d24a4e..b9d0e66fa6b8 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h @@ -5,6 +5,8 @@ #define _BNGE_NETDEV_H_ =20 #include +#include +#include "bnge_db.h" =20 struct tx_bd { __le32 tx_bd_len_flags_type; @@ -168,6 +170,7 @@ enum { #define RING_RX_AGG(bn, idx) ((idx) & (bn)->rx_agg_ring_mask) #define NEXT_RX_AGG(idx) ((idx) + 1) =20 +#define BNGE_NQ_HDL_TYPE_SHIFT 24 #define BNGE_NQ_HDL_TYPE_RX 0x00 #define BNGE_NQ_HDL_TYPE_TX 0x01 =20 @@ -271,6 +274,9 @@ void bnge_set_ring_params(struct bnge_dev *bd); txr =3D (iter < BNGE_MAX_TXR_PER_NAPI - 1) ? \ (bnapi)->tx_ring[++iter] : NULL) =20 +#define BNGE_SET_NQ_HDL(cpr) \ + (((cpr)->cp_ring_type << BNGE_NQ_HDL_TYPE_SHIFT) | (cpr)->cp_idx) + struct bnge_stats_mem { u64 *sw_stats; u64 *hw_masks; @@ -286,6 +292,8 @@ struct bnge_cp_ring_info { struct bnge_ring_struct ring_struct; u8 cp_ring_type; u8 cp_idx; + u32 cp_raw_cons; + struct bnge_db_info cp_db; }; =20 struct bnge_nq_ring_info { @@ -293,6 +301,8 @@ struct bnge_nq_ring_info { dma_addr_t *desc_mapping; struct nqe_cn **desc_ring; struct bnge_ring_struct ring_struct; + u32 nq_raw_cons; + struct bnge_db_info nq_db; =20 struct bnge_stats_mem stats; u32 hw_stats_ctx_id; @@ -308,6 +318,8 @@ struct bnge_rx_ring_info { u16 rx_agg_prod; u16 rx_sw_agg_prod; u16 rx_next_cons; + struct bnge_db_info rx_db; + struct bnge_db_info rx_agg_db; =20 struct rx_bd *rx_desc_ring[MAX_RX_PAGES]; struct bnge_sw_rx_bd *rx_buf_ring; @@ -337,6 +349,7 @@ struct bnge_tx_ring_info { u16 txq_index; u8 tx_napi_idx; u8 kick_pending; + struct bnge_db_info tx_db; =20 struct tx_bd *tx_desc_ring[MAX_TX_PAGES]; struct bnge_sw_tx_bd *tx_buf_ring; @@ -391,4 +404,7 @@ struct bnge_vnic_info { #define BNGE_VNIC_UCAST_FLAG 8 u32 vnic_id; }; + +u16 bnge_cp_ring_for_rx(struct bnge_rx_ring_info *rxr); +u16 bnge_cp_ring_for_tx(struct bnge_tx_ring_info *txr); #endif /* _BNGE_NETDEV_H_ */ diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h b/drivers/net/e= thernet/broadcom/bnge/bnge_rmem.h index 0e7684e20714..341c7f81ed09 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h @@ -189,6 +189,7 @@ struct bnge_ring_struct { u16 grp_idx; u16 map_idx; /* Used by NQs */ }; + u32 handle; u8 queue_id; }; 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[144.49.247.19]) by smtp-relay.gmail.com with ESMTPS id d9443c01a7336-245ed493352sm5293775ad.61.2025.08.21.08.49.13 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Aug 2025 08:49:13 -0700 (PDT) X-Relaying-Domain: broadcom.com X-CFilter-Loop: Reflected Received: by mail-pf1-f197.google.com with SMTP id d2e1a72fcca58-76e1ff27cfaso2508574b3a.1 for ; Thu, 21 Aug 2025 08:49:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1755791352; x=1756396152; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dhRjhIwcA/UF1jYjql+h/UJhlX3Z/ZwVqSHkEMIV4EM=; b=LscjiifCyUCrthBT/XUwObHEfOGYh7MVJekLfFtBaYDOpMiPf/Jd0/RJFr8WvxVlaj M/RKGKh+agaEDPG3MjtEeBWQA22C8XrXG89xEpn0FpfxLiAS7M6eerRVoW2KMbFeEdcu SBicHy6lwESge0Quoq4LCrJJ74yNqjJg5tkLg= X-Forwarded-Encrypted: i=1; AJvYcCVz7uNkd4hxJWegYVjuhKYI3mjZt9bsfiq2bF6hFm5SuagtJ6DboTytQxVGY1yGjFpUax2kWFq0CkdQ5F0=@vger.kernel.org X-Received: by 2002:a05:6300:492:b0:23d:6475:40aa with SMTP id adf61e73a8af0-2433035c0f0mr3591596637.0.1755791351590; Thu, 21 Aug 2025 08:49:11 -0700 (PDT) X-Received: by 2002:a05:6300:492:b0:23d:6475:40aa with SMTP id adf61e73a8af0-2433035c0f0mr3591567637.0.1755791351085; Thu, 21 Aug 2025 08:49:11 -0700 (PDT) Received: from hyd-csg-thor2-h1-server2.dhcp.broadcom.net ([192.19.203.250]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b47640b2d37sm5046894a12.46.2025.08.21.08.49.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Aug 2025 08:49:10 -0700 (PDT) From: Bhargava Marreddy To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, andrew+netdev@lunn.ch, horms@kernel.org Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, michael.chan@broadcom.com, pavan.chebbi@broadcom.com, vsrama-krishna.nemani@broadcom.com, Bhargava Marreddy , Vikas Gupta , Rajashekar Hudumula Subject: [v3, net-next 8/9] bng_en: Register default VNIC Date: Thu, 21 Aug 2025 21:15:16 +0000 Message-ID: <20250821211517.16578-9-bhargava.marreddy@broadcom.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20250821211517.16578-1-bhargava.marreddy@broadcom.com> References: <20250821211517.16578-1-bhargava.marreddy@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-DetectorID-Processed: b00c1d49-9d2e-4205-b15f-d015386d3d5e Content-Type: text/plain; charset="utf-8" Allocate the default VNIC with the firmware and configure its RSS, HDS, and Jumbo parameters. Add related functions to support VNIC configuration for these parameters. Signed-off-by: Bhargava Marreddy Reviewed-by: Vikas Gupta Reviewed-by: Rajashekar Hudumula --- drivers/net/ethernet/broadcom/bnge/bnge.h | 1 + .../net/ethernet/broadcom/bnge/bnge_core.c | 12 + .../ethernet/broadcom/bnge/bnge_hwrm_lib.c | 207 ++++++++++++++++++ .../ethernet/broadcom/bnge/bnge_hwrm_lib.h | 19 ++ .../net/ethernet/broadcom/bnge/bnge_netdev.c | 134 ++++++++++++ .../net/ethernet/broadcom/bnge/bnge_netdev.h | 4 + .../net/ethernet/broadcom/bnge/bnge_resc.c | 2 +- .../net/ethernet/broadcom/bnge/bnge_resc.h | 1 + 8 files changed, 379 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/broadcom/bnge/bnge.h b/drivers/net/ethern= et/broadcom/bnge/bnge.h index 642e16f511d5..d4c05688fc2e 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge.h @@ -164,6 +164,7 @@ struct bnge_dev { u16 rss_indir_tbl_entries; =20 u32 rss_cap; + u32 rss_hash_cfg; =20 u16 rx_nr_rings; u16 tx_nr_rings; diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_core.c b/drivers/net/e= thernet/broadcom/bnge/bnge_core.c index 56a3dd2a23ee..b3524db56115 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_core.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_core.c @@ -102,6 +102,16 @@ static void bnge_fw_unregister_dev(struct bnge_dev *bd) bnge_free_ctx_mem(bd); } =20 +static void bnge_set_dflt_rss_hash_type(struct bnge_dev *bd) +{ + bd->rss_hash_cfg =3D VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4 | + VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4 | + VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6 | + VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6 | + VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4 | + VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; +} + static int bnge_fw_register_dev(struct bnge_dev *bd) { int rc; @@ -143,6 +153,8 @@ static int bnge_fw_register_dev(struct bnge_dev *bd) goto err_func_unrgtr; } =20 + bnge_set_dflt_rss_hash_type(bd); + return 0; =20 err_func_unrgtr: diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c b/drivers/n= et/ethernet/broadcom/bnge/bnge_hwrm_lib.c index a7c18a57fbca..fd54c72b0ad0 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c @@ -6,6 +6,8 @@ #include #include #include +#include +#include =20 #include "bnge.h" #include "bnge_hwrm.h" @@ -702,6 +704,211 @@ int bnge_hwrm_queue_qportcfg(struct bnge_dev *bd) return rc; } =20 +int bnge_hwrm_vnic_set_hds(struct bnge_net *bn, struct bnge_vnic_info *vni= c) +{ + u16 hds_thresh =3D (u16)bn->netdev->cfg_pending->hds_thresh; + struct hwrm_vnic_plcmodes_cfg_input *req; + struct bnge_dev *bd =3D bn->bd; + int rc; + + rc =3D bnge_hwrm_req_init(bd, req, HWRM_VNIC_PLCMODES_CFG); + if (rc) + return rc; + + req->flags =3D cpu_to_le32(VNIC_PLCMODES_CFG_REQ_FLAGS_JUMBO_PLACEMENT); + req->enables =3D cpu_to_le32(BNGE_PLC_EN_JUMBO_THRES_VALID); + req->jumbo_thresh =3D cpu_to_le16(bn->rx_buf_use_size); + + if (bnge_is_agg_reqd(bd)) { + req->flags |=3D cpu_to_le32(VNIC_PLCMODES_CFG_REQ_FLAGS_HDS_IPV4 | + VNIC_PLCMODES_CFG_REQ_FLAGS_HDS_IPV6); + req->enables |=3D + cpu_to_le32(BNGE_PLC_EN_HDS_THRES_VALID); + req->hds_threshold =3D cpu_to_le16(hds_thresh); + } + req->vnic_id =3D cpu_to_le32(vnic->fw_vnic_id); + return bnge_hwrm_req_send(bd, req); +} + +int bnge_hwrm_vnic_ctx_alloc(struct bnge_dev *bd, + struct bnge_vnic_info *vnic, u16 ctx_idx) +{ + struct hwrm_vnic_rss_cos_lb_ctx_alloc_output *resp; + struct hwrm_vnic_rss_cos_lb_ctx_alloc_input *req; + int rc; + + rc =3D bnge_hwrm_req_init(bd, req, HWRM_VNIC_RSS_COS_LB_CTX_ALLOC); + if (rc) + return rc; + + resp =3D bnge_hwrm_req_hold(bd, req); + rc =3D bnge_hwrm_req_send(bd, req); + if (!rc) + vnic->fw_rss_cos_lb_ctx[ctx_idx] =3D + le16_to_cpu(resp->rss_cos_lb_ctx_id); + bnge_hwrm_req_drop(bd, req); + + return rc; +} + +static void +__bnge_hwrm_vnic_set_rss(struct bnge_net *bn, + struct hwrm_vnic_rss_cfg_input *req, + struct bnge_vnic_info *vnic) +{ + struct bnge_dev *bd =3D bn->bd; + + bnge_fill_hw_rss_tbl(bn, vnic); + req->flags |=3D VNIC_RSS_CFG_REQ_FLAGS_IPSEC_HASH_TYPE_CFG_SUPPORT; + + req->hash_type =3D cpu_to_le32(bd->rss_hash_cfg); + req->hash_mode_flags =3D VNIC_RSS_CFG_REQ_HASH_MODE_FLAGS_DEFAULT; + req->ring_grp_tbl_addr =3D cpu_to_le64(vnic->rss_table_dma_addr); + req->hash_key_tbl_addr =3D cpu_to_le64(vnic->rss_hash_key_dma_addr); +} + +int bnge_hwrm_vnic_set_rss(struct bnge_net *bn, + struct bnge_vnic_info *vnic, bool set_rss) +{ + struct hwrm_vnic_rss_cfg_input *req; + struct bnge_dev *bd =3D bn->bd; + dma_addr_t ring_tbl_map; + u32 i, nr_ctxs; + int rc; + + rc =3D bnge_hwrm_req_init(bd, req, HWRM_VNIC_RSS_CFG); + if (rc) + return rc; + + req->vnic_id =3D cpu_to_le16(vnic->fw_vnic_id); + if (!set_rss) + return bnge_hwrm_req_send(bd, req); + + __bnge_hwrm_vnic_set_rss(bn, req, vnic); + ring_tbl_map =3D vnic->rss_table_dma_addr; + nr_ctxs =3D bnge_get_nr_rss_ctxs(bd->rx_nr_rings); + + bnge_hwrm_req_hold(bd, req); + for (i =3D 0; i < nr_ctxs; ring_tbl_map +=3D BNGE_RSS_TABLE_SIZE, i++) { + req->ring_grp_tbl_addr =3D cpu_to_le64(ring_tbl_map); + req->ring_table_pair_index =3D i; + req->rss_ctx_idx =3D cpu_to_le16(vnic->fw_rss_cos_lb_ctx[i]); + rc =3D bnge_hwrm_req_send(bd, req); + if (rc) + goto exit; + } + +exit: + bnge_hwrm_req_drop(bd, req); + return rc; +} + +int bnge_hwrm_vnic_cfg(struct bnge_net *bn, struct bnge_vnic_info *vnic) +{ + struct bnge_rx_ring_info *rxr =3D &bn->rx_ring[0]; + struct hwrm_vnic_cfg_input *req; + struct bnge_dev *bd =3D bn->bd; + int rc; + + rc =3D bnge_hwrm_req_init(bd, req, HWRM_VNIC_CFG); + if (rc) + return rc; + + req->default_rx_ring_id =3D + cpu_to_le16(rxr->rx_ring_struct.fw_ring_id); + req->default_cmpl_ring_id =3D + cpu_to_le16(bnge_cp_ring_for_rx(rxr)); + req->enables =3D + cpu_to_le32(VNIC_CFG_REQ_ENABLES_DEFAULT_RX_RING_ID | + VNIC_CFG_REQ_ENABLES_DEFAULT_CMPL_RING_ID); + vnic->mru =3D bd->netdev->mtu + ETH_HLEN + VLAN_HLEN; + req->mru =3D cpu_to_le16(vnic->mru); + + req->vnic_id =3D cpu_to_le16(vnic->fw_vnic_id); + + if (bd->flags & BNGE_EN_STRIP_VLAN) + req->flags |=3D cpu_to_le32(VNIC_CFG_REQ_FLAGS_VLAN_STRIP_MODE); + if (vnic->vnic_id =3D=3D BNGE_VNIC_DEFAULT && bnge_aux_registered(bd)) + req->flags |=3D cpu_to_le32(BNGE_VNIC_CFG_ROCE_DUAL_MODE); + + return bnge_hwrm_req_send(bd, req); +} + +void bnge_hwrm_update_rss_hash_cfg(struct bnge_net *bn) +{ + struct bnge_vnic_info *vnic =3D &bn->vnic_info[BNGE_VNIC_DEFAULT]; + struct hwrm_vnic_rss_qcfg_output *resp; + struct hwrm_vnic_rss_qcfg_input *req; + struct bnge_dev *bd =3D bn->bd; + + if (bnge_hwrm_req_init(bd, req, HWRM_VNIC_RSS_QCFG)) + return; + + req->vnic_id =3D cpu_to_le16(vnic->fw_vnic_id); + /* all contexts configured to same hash_type, zero always exists */ + req->rss_ctx_idx =3D cpu_to_le16(vnic->fw_rss_cos_lb_ctx[0]); + resp =3D bnge_hwrm_req_hold(bd, req); + if (!bnge_hwrm_req_send(bd, req)) + bd->rss_hash_cfg =3D + le32_to_cpu(resp->hash_type) ?: bd->rss_hash_cfg; + bnge_hwrm_req_drop(bd, req); +} + +int bnge_hwrm_vnic_alloc(struct bnge_dev *bd, struct bnge_vnic_info *vnic, + unsigned int nr_rings) +{ + struct hwrm_vnic_alloc_output *resp; + struct hwrm_vnic_alloc_input *req; + unsigned int i; + int rc; + + rc =3D bnge_hwrm_req_init(bd, req, HWRM_VNIC_ALLOC); + if (rc) + return rc; + + for (i =3D 0; i < BNGE_MAX_CTX_PER_VNIC; i++) + vnic->fw_rss_cos_lb_ctx[i] =3D INVALID_HW_RING_ID; + if (vnic->vnic_id =3D=3D BNGE_VNIC_DEFAULT) + req->flags =3D cpu_to_le32(VNIC_ALLOC_REQ_FLAGS_DEFAULT); + + resp =3D bnge_hwrm_req_hold(bd, req); + rc =3D bnge_hwrm_req_send(bd, req); + if (!rc) + vnic->fw_vnic_id =3D le32_to_cpu(resp->vnic_id); + bnge_hwrm_req_drop(bd, req); + return rc; +} + +void bnge_hwrm_vnic_free_one(struct bnge_dev *bd, struct bnge_vnic_info *v= nic) +{ + if (vnic->fw_vnic_id !=3D INVALID_HW_RING_ID) { + struct hwrm_vnic_free_input *req; + + if (bnge_hwrm_req_init(bd, req, HWRM_VNIC_FREE)) + return; + + req->vnic_id =3D cpu_to_le32(vnic->fw_vnic_id); + + bnge_hwrm_req_send(bd, req); + vnic->fw_vnic_id =3D INVALID_HW_RING_ID; + } +} + +void bnge_hwrm_vnic_ctx_free_one(struct bnge_dev *bd, + struct bnge_vnic_info *vnic, u16 ctx_idx) +{ + struct hwrm_vnic_rss_cos_lb_ctx_free_input *req; + + if (bnge_hwrm_req_init(bd, req, HWRM_VNIC_RSS_COS_LB_CTX_FREE)) + return; + + req->rss_cos_lb_ctx_id =3D + cpu_to_le16(vnic->fw_rss_cos_lb_ctx[ctx_idx]); + + bnge_hwrm_req_send(bd, req); + vnic->fw_rss_cos_lb_ctx[ctx_idx] =3D INVALID_HW_RING_ID; +} + void bnge_hwrm_stat_ctx_free(struct bnge_net *bn) { struct hwrm_stat_ctx_free_input *req; diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h b/drivers/n= et/ethernet/broadcom/bnge/bnge_hwrm_lib.h index b2e2ec47be2e..09517ffb1a21 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h @@ -4,6 +4,13 @@ #ifndef _BNGE_HWRM_LIB_H_ #define _BNGE_HWRM_LIB_H_ =20 +#define BNGE_PLC_EN_JUMBO_THRES_VALID \ + VNIC_PLCMODES_CFG_REQ_ENABLES_JUMBO_THRESH_VALID +#define BNGE_PLC_EN_HDS_THRES_VALID \ + VNIC_PLCMODES_CFG_REQ_ENABLES_HDS_THRESHOLD_VALID +#define BNGE_VNIC_CFG_ROCE_DUAL_MODE \ + VNIC_CFG_REQ_FLAGS_ROCE_DUAL_VNIC_MODE + int bnge_hwrm_ver_get(struct bnge_dev *bd); int bnge_hwrm_func_reset(struct bnge_dev *bd); int bnge_hwrm_fw_set_time(struct bnge_dev *bd); @@ -24,6 +31,18 @@ int bnge_hwrm_func_qcfg(struct bnge_dev *bd); int bnge_hwrm_func_resc_qcaps(struct bnge_dev *bd); int bnge_hwrm_queue_qportcfg(struct bnge_dev *bd); =20 +int bnge_hwrm_vnic_set_hds(struct bnge_net *bn, struct bnge_vnic_info *vni= c); +int bnge_hwrm_vnic_ctx_alloc(struct bnge_dev *bd, + struct bnge_vnic_info *vnic, u16 ctx_idx); +int bnge_hwrm_vnic_set_rss(struct bnge_net *bn, + struct bnge_vnic_info *vnic, bool set_rss); +int bnge_hwrm_vnic_cfg(struct bnge_net *bn, struct bnge_vnic_info *vnic); +void bnge_hwrm_update_rss_hash_cfg(struct bnge_net *bn); +int bnge_hwrm_vnic_alloc(struct bnge_dev *bd, struct bnge_vnic_info *vnic, + unsigned int nr_rings); +void bnge_hwrm_vnic_free_one(struct bnge_dev *bd, struct bnge_vnic_info *v= nic); +void bnge_hwrm_vnic_ctx_free_one(struct bnge_dev *bd, + struct bnge_vnic_info *vnic, u16 ctx_idx); void bnge_hwrm_stat_ctx_free(struct bnge_net *bn); int bnge_hwrm_stat_ctx_alloc(struct bnge_net *bn); int hwrm_ring_free_send_msg(struct bnge_net *bn, struct bnge_ring_struct *= ring, diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.c index c74b2343acde..10d845b091cf 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c @@ -1417,6 +1417,117 @@ static int bnge_hwrm_ring_alloc(struct bnge_net *bn) return rc; } =20 +int bnge_get_nr_rss_ctxs(int rx_rings) +{ + if (!rx_rings) + return 0; + return bnge_adjust_pow_two(rx_rings - 1, BNGE_RSS_TABLE_ENTRIES); +} + +void bnge_fill_hw_rss_tbl(struct bnge_net *bn, struct bnge_vnic_info *vnic) +{ + __le16 *ring_tbl =3D vnic->rss_table; + struct bnge_rx_ring_info *rxr; + struct bnge_dev *bd =3D bn->bd; + u16 tbl_size, i; + + tbl_size =3D bnge_get_rxfh_indir_size(bd); + + for (i =3D 0; i < tbl_size; i++) { + u16 ring_id, j; + + j =3D bd->rss_indir_tbl[i]; + rxr =3D &bn->rx_ring[j]; + + ring_id =3D rxr->rx_ring_struct.fw_ring_id; + *ring_tbl++ =3D cpu_to_le16(ring_id); + ring_id =3D bnge_cp_ring_for_rx(rxr); + *ring_tbl++ =3D cpu_to_le16(ring_id); + } +} + +static int bnge_hwrm_vnic_rss_cfg(struct bnge_net *bn, + struct bnge_vnic_info *vnic) +{ + int rc; + + rc =3D bnge_hwrm_vnic_set_rss(bn, vnic, true); + if (rc) { + netdev_err(bn->netdev, "hwrm vnic %d set rss failure rc: %d\n", + vnic->vnic_id, rc); + return rc; + } + rc =3D bnge_hwrm_vnic_cfg(bn, vnic); + if (rc) + netdev_err(bn->netdev, "hwrm vnic %d cfg failure rc: %d\n", + vnic->vnic_id, rc); + return rc; +} + +static int bnge_setup_vnic(struct bnge_net *bn, struct bnge_vnic_info *vni= c) +{ + struct bnge_dev *bd =3D bn->bd; + int rc, i, nr_ctxs; + + nr_ctxs =3D bnge_get_nr_rss_ctxs(bd->rx_nr_rings); + for (i =3D 0; i < nr_ctxs; i++) { + rc =3D bnge_hwrm_vnic_ctx_alloc(bd, vnic, i); + if (rc) { + netdev_err(bn->netdev, "hwrm vnic %d ctx %d alloc failure rc: %d\n", + vnic->vnic_id, i, rc); + break; + } + bn->rsscos_nr_ctxs++; + } + if (i < nr_ctxs) + return -ENOMEM; + + rc =3D bnge_hwrm_vnic_rss_cfg(bn, vnic); + if (rc) + return rc; + + if (bnge_is_agg_reqd(bd)) { + rc =3D bnge_hwrm_vnic_set_hds(bn, vnic); + if (rc) { + netdev_err(bn->netdev, "hwrm vnic %d set hds failure rc: %d\n", + vnic->vnic_id, rc); + } + } + return rc; +} + +static void bnge_hwrm_vnic_free(struct bnge_net *bn) +{ + int i; + + for (i =3D 0; i < bn->nr_vnics; i++) + bnge_hwrm_vnic_free_one(bn->bd, &bn->vnic_info[i]); +} + +static void bnge_hwrm_vnic_ctx_free(struct bnge_net *bn) +{ + int i, j; + + for (i =3D 0; i < bn->nr_vnics; i++) { + struct bnge_vnic_info *vnic =3D &bn->vnic_info[i]; + + for (j =3D 0; j < BNGE_MAX_CTX_PER_VNIC; j++) { + if (vnic->fw_rss_cos_lb_ctx[j] !=3D INVALID_HW_RING_ID) + bnge_hwrm_vnic_ctx_free_one(bn->bd, vnic, j); + } + } + bn->rsscos_nr_ctxs =3D 0; +} + +static void bnge_clear_vnic(struct bnge_net *bn) +{ + if (!bn->vnic_info) + return; + + bnge_hwrm_vnic_free(bn); + bnge_hwrm_vnic_ctx_free(bn); +} + static void bnge_hwrm_rx_ring_free(struct bnge_net *bn, struct bnge_rx_ring_info *rxr, bool close_path) @@ -1577,6 +1688,7 @@ static int bnge_setup_interrupts(struct bnge_net *bn) =20 static void bnge_hwrm_resource_free(struct bnge_net *bn, bool close_path) { + bnge_clear_vnic(bn); bnge_hwrm_ring_free(bn, close_path); bnge_hwrm_stat_ctx_free(bn); } @@ -1624,6 +1736,8 @@ static int bnge_request_irq(struct bnge_net *bn) =20 static int bnge_init_chip(struct bnge_net *bn) { + struct bnge_vnic_info *vnic =3D &bn->vnic_info[BNGE_VNIC_DEFAULT]; + struct bnge_dev *bd =3D bn->bd; int rc =3D 0; =20 #define BNGE_DEF_STATS_COAL_TICKS 1000000 @@ -1642,6 +1756,18 @@ static int bnge_init_chip(struct bnge_net *bn) goto err_out; } =20 + rc =3D bnge_hwrm_vnic_alloc(bd, vnic, bd->rx_nr_rings); + if (rc) { + netdev_err(bn->netdev, "hwrm vnic alloc failure rc: %d\n", rc); + goto err_out; + } + + rc =3D bnge_setup_vnic(bn, vnic); + if (rc) + goto err_out; + if (bd->rss_cap & BNGE_RSS_CAP_RSS_HASH_TYPE_DELTA) + bnge_hwrm_update_rss_hash_cfg(bn); + return 0; err_out: bnge_hwrm_resource_free(bn, 0); @@ -1795,11 +1921,19 @@ static int bnge_open(struct net_device *dev) return rc; } =20 +static int bnge_shutdown_nic(struct bnge_net *bn) +{ + /* TODO: close_path =3D 0 until we make NAPI functional */ + bnge_hwrm_resource_free(bn, 0); + return 0; +} + static void bnge_close_core(struct bnge_net *bn) { struct bnge_dev *bd =3D bn->bd; =20 clear_bit(BNGE_STATE_OPEN, &bd->state); + bnge_shutdown_nic(bn); bnge_free_pkts_mem(bn); bnge_free_irq(bn); bnge_del_napi(bn); diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.h index b9d0e66fa6b8..43c64633ed50 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h @@ -227,6 +227,7 @@ struct bnge_net { u8 rss_hash_key[HW_HASH_KEY_SIZE]; u8 rss_hash_key_valid:1; u8 rss_hash_key_updated:1; + int rsscos_nr_ctxs; u32 stats_coal_ticks; }; =20 @@ -380,6 +381,7 @@ struct bnge_vnic_info { u16 fw_vnic_id; #define BNGE_MAX_CTX_PER_VNIC 8 u16 fw_rss_cos_lb_ctx[BNGE_MAX_CTX_PER_VNIC]; + u16 mru; u8 *uc_list; dma_addr_t rss_table_dma_addr; __le16 *rss_table; @@ -407,4 +409,6 @@ struct bnge_vnic_info { =20 u16 bnge_cp_ring_for_rx(struct bnge_rx_ring_info *rxr); u16 bnge_cp_ring_for_tx(struct bnge_tx_ring_info *txr); +int bnge_get_nr_rss_ctxs(int rx_rings); +void bnge_fill_hw_rss_tbl(struct bnge_net *bn, struct bnge_vnic_info *vnic= ); #endif /* _BNGE_NETDEV_H_ */ diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_resc.c b/drivers/net/e= thernet/broadcom/bnge/bnge_resc.c index 5597af1b3b7c..e05560975938 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_resc.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_resc.c @@ -184,7 +184,7 @@ static u16 bnge_get_total_vnics(struct bnge_dev *bd, u1= 6 rx_rings) return 1; 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[144.49.247.19]) by smtp-relay.gmail.com with ESMTPS id 41be03b00d2f7-b47706c29a1sm228657a12.14.2025.08.21.08.49.18 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Aug 2025 08:49:18 -0700 (PDT) X-Relaying-Domain: broadcom.com X-CFilter-Loop: Reflected Received: by mail-pj1-f69.google.com with SMTP id 98e67ed59e1d1-324fbd47789so631822a91.3 for ; Thu, 21 Aug 2025 08:49:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1755791357; x=1756396157; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dI4mte+2XC3hMm1QTzxaNmd4rdx0AI16Ne+5vaYpu78=; b=YhkvSnZPaK0elopTbgBdwexDQtjSoCAFfwJTlv5O4d6UbkbnxRjTeQ0TyU3nvUWqff SbJV27nODYyuAPsQqboTHl8tP9NU+vsO6e1AQ3+4LFrLKqGlm/ul1pSdjCBg8hs7eXvP HwagoDmr4v8fGOVVmtVt6me4TR9g95FnHOlTE= X-Forwarded-Encrypted: i=1; AJvYcCX2wkm9Spxnse5hWa+HtV0xC77R/po/Op48IkoFV2Sk7P8zptYQpdF8QYHgKY6RCx7Kq9VZWITh6g5FU88=@vger.kernel.org X-Received: by 2002:a17:90b:4a09:b0:31e:3bbc:e9e6 with SMTP id 98e67ed59e1d1-324ed1bf38amr4103887a91.19.1755791356329; Thu, 21 Aug 2025 08:49:16 -0700 (PDT) X-Received: by 2002:a17:90b:4a09:b0:31e:3bbc:e9e6 with SMTP id 98e67ed59e1d1-324ed1bf38amr4103850a91.19.1755791355768; Thu, 21 Aug 2025 08:49:15 -0700 (PDT) Received: from hyd-csg-thor2-h1-server2.dhcp.broadcom.net ([192.19.203.250]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b47640b2d37sm5046894a12.46.2025.08.21.08.49.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Aug 2025 08:49:15 -0700 (PDT) From: Bhargava Marreddy To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, andrew+netdev@lunn.ch, horms@kernel.org Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, michael.chan@broadcom.com, pavan.chebbi@broadcom.com, vsrama-krishna.nemani@broadcom.com, Bhargava Marreddy , Vikas Gupta , Rajashekar Hudumula Subject: [v3, net-next 9/9] bng_en: Configure default VNIC Date: Thu, 21 Aug 2025 21:15:17 +0000 Message-ID: <20250821211517.16578-10-bhargava.marreddy@broadcom.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20250821211517.16578-1-bhargava.marreddy@broadcom.com> References: <20250821211517.16578-1-bhargava.marreddy@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-DetectorID-Processed: b00c1d49-9d2e-4205-b15f-d015386d3d5e Content-Type: text/plain; charset="utf-8" Add functions to add a filter to the VNIC to configure unicast addresses. Also, add multicast, broadcast, and promiscuous settings to the default VNIC. Signed-off-by: Bhargava Marreddy Reviewed-by: Vikas Gupta Reviewed-by: Rajashekar Hudumula --- .../ethernet/broadcom/bnge/bnge_hwrm_lib.c | 72 +++++ .../ethernet/broadcom/bnge/bnge_hwrm_lib.h | 4 + .../net/ethernet/broadcom/bnge/bnge_netdev.c | 271 ++++++++++++++++++ .../net/ethernet/broadcom/bnge/bnge_netdev.h | 41 +++ 4 files changed, 388 insertions(+) diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c b/drivers/n= et/ethernet/broadcom/bnge/bnge_hwrm_lib.c index fd54c72b0ad0..f4ef27c307ab 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c @@ -854,6 +854,78 @@ void bnge_hwrm_update_rss_hash_cfg(struct bnge_net *bn) bnge_hwrm_req_drop(bd, req); } =20 +int bnge_hwrm_l2_filter_free(struct bnge_dev *bd, struct bnge_l2_filter *f= ltr) +{ + struct hwrm_cfa_l2_filter_free_input *req; + int rc; + + rc =3D bnge_hwrm_req_init(bd, req, HWRM_CFA_L2_FILTER_FREE); + if (rc) + return rc; + + req->l2_filter_id =3D fltr->base.filter_id; + return bnge_hwrm_req_send(bd, req); +} + +int bnge_hwrm_l2_filter_alloc(struct bnge_dev *bd, struct bnge_l2_filter *= fltr) +{ + struct hwrm_cfa_l2_filter_alloc_output *resp; + struct hwrm_cfa_l2_filter_alloc_input *req; + int rc; + + rc =3D bnge_hwrm_req_init(bd, req, HWRM_CFA_L2_FILTER_ALLOC); + if (rc) + return rc; + + req->flags =3D cpu_to_le32(CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH_RX); + + req->flags |=3D cpu_to_le32(CFA_L2_FILTER_ALLOC_REQ_FLAGS_OUTERMOST); + req->dst_id =3D cpu_to_le16(fltr->base.fw_vnic_id); + req->enables =3D + cpu_to_le32(CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_ADDR | + CFA_L2_FILTER_ALLOC_REQ_ENABLES_DST_ID | + CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_ADDR_MASK); + ether_addr_copy(req->l2_addr, fltr->l2_key.dst_mac_addr); + eth_broadcast_addr(req->l2_addr_mask); + + if (fltr->l2_key.vlan) { + req->enables |=3D + cpu_to_le32(CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_IVLAN | + CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_IVLAN_MASK | + CFA_L2_FILTER_ALLOC_REQ_ENABLES_NUM_VLANS); + req->num_vlans =3D 1; + req->l2_ivlan =3D cpu_to_le16(fltr->l2_key.vlan); + req->l2_ivlan_mask =3D cpu_to_le16(0xfff); + } + + resp =3D bnge_hwrm_req_hold(bd, req); + rc =3D bnge_hwrm_req_send(bd, req); + if (!rc) + fltr->base.filter_id =3D resp->l2_filter_id; + + bnge_hwrm_req_drop(bd, req); + return rc; +} + +int bnge_hwrm_cfa_l2_set_rx_mask(struct bnge_dev *bd, + struct bnge_vnic_info *vnic) +{ + struct hwrm_cfa_l2_set_rx_mask_input *req; + int rc; + + rc =3D bnge_hwrm_req_init(bd, req, HWRM_CFA_L2_SET_RX_MASK); + if (rc) + return rc; + + req->vnic_id =3D cpu_to_le32(vnic->fw_vnic_id); + if (vnic->rx_mask & CFA_L2_SET_RX_MASK_REQ_MASK_MCAST) { + req->num_mc_entries =3D cpu_to_le32(vnic->mc_list_count); + req->mc_tbl_addr =3D cpu_to_le64(vnic->mc_list_mapping); + } + req->mask =3D cpu_to_le32(vnic->rx_mask); + return bnge_hwrm_req_send_silent(bd, req); +} + int bnge_hwrm_vnic_alloc(struct bnge_dev *bd, struct bnge_vnic_info *vnic, unsigned int nr_rings) { diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h b/drivers/n= et/ethernet/broadcom/bnge/bnge_hwrm_lib.h index 09517ffb1a21..042f28e84a05 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h @@ -43,6 +43,10 @@ int bnge_hwrm_vnic_alloc(struct bnge_dev *bd, struct bng= e_vnic_info *vnic, void bnge_hwrm_vnic_free_one(struct bnge_dev *bd, struct bnge_vnic_info *v= nic); void bnge_hwrm_vnic_ctx_free_one(struct bnge_dev *bd, struct bnge_vnic_info *vnic, u16 ctx_idx); +int bnge_hwrm_l2_filter_free(struct bnge_dev *bd, struct bnge_l2_filter *f= ltr); +int bnge_hwrm_l2_filter_alloc(struct bnge_dev *bd, struct bnge_l2_filter *= fltr); +int bnge_hwrm_cfa_l2_set_rx_mask(struct bnge_dev *bd, + struct bnge_vnic_info *vnic); void bnge_hwrm_stat_ctx_free(struct bnge_net *bn); int bnge_hwrm_stat_ctx_alloc(struct bnge_net *bn); int hwrm_ring_free_send_msg(struct bnge_net *bn, struct bnge_ring_struct *= ring, diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.c index 10d845b091cf..419669520dc2 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c @@ -1496,6 +1496,231 @@ static int bnge_setup_vnic(struct bnge_net *bn, str= uct bnge_vnic_info *vnic) return rc; } =20 +static void bnge_del_l2_filter(struct bnge_net *bn, struct bnge_l2_filter = *fltr) +{ + if (!refcount_dec_and_test(&fltr->refcnt)) + return; + hlist_del_rcu(&fltr->base.hash); + kfree_rcu(fltr, base.rcu); +} + +static int bnge_init_l2_filter(struct bnge_net *bn, struct bnge_l2_filter = *fltr, + struct bnge_l2_key *key, u32 idx) +{ + struct hlist_head *head; + + ether_addr_copy(fltr->l2_key.dst_mac_addr, key->dst_mac_addr); + fltr->l2_key.vlan =3D key->vlan; + fltr->base.type =3D BNGE_FLTR_TYPE_L2; + + head =3D &bn->l2_fltr_hash_tbl[idx]; + hlist_add_head_rcu(&fltr->base.hash, head); + refcount_set(&fltr->refcnt, 1); + return 0; +} + +static struct bnge_l2_filter *__bnge_lookup_l2_filter(struct bnge_net *bn, + struct bnge_l2_key *key, + u32 idx) +{ + struct bnge_l2_filter *fltr; + struct hlist_head *head; + + head =3D &bn->l2_fltr_hash_tbl[idx]; + hlist_for_each_entry_rcu(fltr, head, base.hash) { + struct bnge_l2_key *l2_key =3D &fltr->l2_key; + + if (ether_addr_equal(l2_key->dst_mac_addr, key->dst_mac_addr) && + l2_key->vlan =3D=3D key->vlan) + return fltr; + } + return NULL; +} + +static struct bnge_l2_filter *bnge_lookup_l2_filter(struct bnge_net *bn, + struct bnge_l2_key *key, + u32 idx) +{ + struct bnge_l2_filter *fltr; + + rcu_read_lock(); + fltr =3D __bnge_lookup_l2_filter(bn, key, idx); + if (fltr) + refcount_inc(&fltr->refcnt); + rcu_read_unlock(); + return fltr; +} + +static struct bnge_l2_filter *bnge_alloc_l2_filter(struct bnge_net *bn, + struct bnge_l2_key *key, + gfp_t gfp) +{ + struct bnge_l2_filter *fltr; + u32 idx; + int rc; + + idx =3D jhash2(&key->filter_key, BNGE_L2_KEY_SIZE, bn->hash_seed) & + BNGE_L2_FLTR_HASH_MASK; + fltr =3D bnge_lookup_l2_filter(bn, key, idx); + if (fltr) + return fltr; + + fltr =3D kzalloc(sizeof(*fltr), gfp); + if (!fltr) + return ERR_PTR(-ENOMEM); + rc =3D bnge_init_l2_filter(bn, fltr, key, idx); + if (rc) { + bnge_del_l2_filter(bn, fltr); + fltr =3D ERR_PTR(rc); + } + return fltr; +} + +static int bnge_hwrm_set_vnic_filter(struct bnge_net *bn, u16 vnic_id, u16= idx, + const u8 *mac_addr) +{ + struct bnge_l2_filter *fltr; + struct bnge_l2_key key; + int rc; + + ether_addr_copy(key.dst_mac_addr, mac_addr); + key.vlan =3D 0; + fltr =3D bnge_alloc_l2_filter(bn, &key, GFP_KERNEL); + if (IS_ERR(fltr)) + return PTR_ERR(fltr); + + fltr->base.fw_vnic_id =3D bn->vnic_info[vnic_id].fw_vnic_id; + rc =3D bnge_hwrm_l2_filter_alloc(bn->bd, fltr); + if (rc) + bnge_del_l2_filter(bn, fltr); + else + bn->vnic_info[vnic_id].l2_filters[idx] =3D fltr; + return rc; +} + +static bool bnge_mc_list_updated(struct bnge_net *bn, u32 *rx_mask) +{ + struct bnge_vnic_info *vnic =3D &bn->vnic_info[BNGE_VNIC_DEFAULT]; + struct net_device *dev =3D bn->netdev; + struct netdev_hw_addr *ha; + int mc_count =3D 0, off =3D 0; + bool update =3D false; + u8 *haddr; + + netdev_for_each_mc_addr(ha, dev) { + if (mc_count >=3D BNGE_MAX_MC_ADDRS) { + *rx_mask |=3D CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST; + vnic->mc_list_count =3D 0; + return false; + } + haddr =3D ha->addr; + if (!ether_addr_equal(haddr, vnic->mc_list + off)) { + memcpy(vnic->mc_list + off, haddr, ETH_ALEN); + update =3D true; + } + off +=3D ETH_ALEN; + mc_count++; + } + if (mc_count) + *rx_mask |=3D CFA_L2_SET_RX_MASK_REQ_MASK_MCAST; + + if (mc_count !=3D vnic->mc_list_count) { + vnic->mc_list_count =3D mc_count; + update =3D true; + } + return update; +} + +static bool bnge_uc_list_updated(struct bnge_net *bn) +{ + struct bnge_vnic_info *vnic =3D &bn->vnic_info[BNGE_VNIC_DEFAULT]; + struct net_device *dev =3D bn->netdev; + struct netdev_hw_addr *ha; + int off =3D 0; + + if (netdev_uc_count(dev) !=3D (vnic->uc_filter_count - 1)) + return true; + + netdev_for_each_uc_addr(ha, dev) { + if (!ether_addr_equal(ha->addr, vnic->uc_list + off)) + return true; + + off +=3D ETH_ALEN; + } + return false; +} + +static bool bnge_promisc_ok(struct bnge_net *bn) +{ + return true; +} + +static int bnge_cfg_def_vnic(struct bnge_net *bn) +{ + struct bnge_vnic_info *vnic =3D &bn->vnic_info[BNGE_VNIC_DEFAULT]; + struct net_device *dev =3D bn->netdev; + struct bnge_dev *bd =3D bn->bd; + struct netdev_hw_addr *ha; + int i, off =3D 0, rc; + bool uc_update; + + netif_addr_lock_bh(dev); + uc_update =3D bnge_uc_list_updated(bn); + netif_addr_unlock_bh(dev); + + if (!uc_update) + goto skip_uc; + + for (i =3D 1; i < vnic->uc_filter_count; i++) { + struct bnge_l2_filter *fltr =3D vnic->l2_filters[i]; + + bnge_hwrm_l2_filter_free(bd, fltr); + bnge_del_l2_filter(bn, fltr); + } + + vnic->uc_filter_count =3D 1; + + netif_addr_lock_bh(dev); + if (netdev_uc_count(dev) > (BNGE_MAX_UC_ADDRS - 1)) { + vnic->rx_mask |=3D CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS; + } else { + netdev_for_each_uc_addr(ha, dev) { + memcpy(vnic->uc_list + off, ha->addr, ETH_ALEN); + off +=3D ETH_ALEN; + vnic->uc_filter_count++; + } + } + netif_addr_unlock_bh(dev); + + for (i =3D 1, off =3D 0; i < vnic->uc_filter_count; i++, off +=3D ETH_ALE= N) { + rc =3D bnge_hwrm_set_vnic_filter(bn, 0, i, vnic->uc_list + off); + if (rc) { + netdev_err(dev, "HWRM vnic filter failure rc: %d\n", rc); + vnic->uc_filter_count =3D i; + return rc; + } + } + +skip_uc: + if ((vnic->rx_mask & CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS) && + !bnge_promisc_ok(bn)) + vnic->rx_mask &=3D ~CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS; + rc =3D bnge_hwrm_cfa_l2_set_rx_mask(bd, vnic); + if (rc && (vnic->rx_mask & CFA_L2_SET_RX_MASK_REQ_MASK_MCAST)) { + netdev_info(dev, "Failed setting MC filters rc: %d, turning on ALL_MCAST= mode\n", + rc); + vnic->rx_mask &=3D ~CFA_L2_SET_RX_MASK_REQ_MASK_MCAST; + vnic->rx_mask |=3D CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST; + vnic->mc_list_count =3D 0; + rc =3D bnge_hwrm_cfa_l2_set_rx_mask(bd, vnic); + } + if (rc) + netdev_err(dev, "HWRM cfa l2 rx mask failure rc: %d\n", + rc); + + return rc; +} + static void bnge_hwrm_vnic_free(struct bnge_net *bn) { int i; @@ -1519,11 +1744,27 @@ static void bnge_hwrm_vnic_ctx_free(struct bnge_net= *bn) bn->rsscos_nr_ctxs =3D 0; } =20 +static void bnge_hwrm_clear_vnic_filter(struct bnge_net *bn) +{ + struct bnge_vnic_info *vnic =3D &bn->vnic_info[BNGE_VNIC_DEFAULT]; + int i; + + for (i =3D 0; i < vnic->uc_filter_count; i++) { + struct bnge_l2_filter *fltr =3D vnic->l2_filters[i]; + + bnge_hwrm_l2_filter_free(bn->bd, fltr); + bnge_del_l2_filter(bn, fltr); + } + + vnic->uc_filter_count =3D 0; +} + static void bnge_clear_vnic(struct bnge_net *bn) { if (!bn->vnic_info) return; =20 + bnge_hwrm_clear_vnic_filter(bn); bnge_hwrm_vnic_free(bn); bnge_hwrm_vnic_ctx_free(bn); } @@ -1768,6 +2009,36 @@ static int bnge_init_chip(struct bnge_net *bn) if (bd->rss_cap & BNGE_RSS_CAP_RSS_HASH_TYPE_DELTA) bnge_hwrm_update_rss_hash_cfg(bn); =20 + /* Filter for default vnic 0 */ + rc =3D bnge_hwrm_set_vnic_filter(bn, 0, 0, bn->netdev->dev_addr); + if (rc) { + netdev_err(bn->netdev, "HWRM vnic filter failure rc: %d\n", rc); + goto err_out; + } + vnic->uc_filter_count =3D 1; + + vnic->rx_mask =3D 0; + + if (bn->netdev->flags & IFF_BROADCAST) + vnic->rx_mask |=3D CFA_L2_SET_RX_MASK_REQ_MASK_BCAST; + + if (bn->netdev->flags & IFF_PROMISC) + vnic->rx_mask |=3D CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS; + + if (bn->netdev->flags & IFF_ALLMULTI) { + vnic->rx_mask |=3D CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST; + vnic->mc_list_count =3D 0; + } else if (bn->netdev->flags & IFF_MULTICAST) { + u32 mask =3D 0; + + bnge_mc_list_updated(bn, &mask); + vnic->rx_mask |=3D mask; + } + + rc =3D bnge_cfg_def_vnic(bn); + if (rc) + goto err_out; + return 0; err_out: bnge_hwrm_resource_free(bn, 0); diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.h index 43c64633ed50..b12cf5ddf038 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h @@ -6,6 +6,7 @@ =20 #include #include +#include #include "bnge_db.h" =20 struct tx_bd { @@ -382,6 +383,10 @@ struct bnge_vnic_info { #define BNGE_MAX_CTX_PER_VNIC 8 u16 fw_rss_cos_lb_ctx[BNGE_MAX_CTX_PER_VNIC]; u16 mru; +#define BNGE_MAX_UC_ADDRS 4 + /* index 0 always dev_addr */ + struct bnge_l2_filter *l2_filters[BNGE_MAX_UC_ADDRS]; + u16 uc_filter_count; u8 *uc_list; dma_addr_t rss_table_dma_addr; __le16 *rss_table; @@ -393,6 +398,7 @@ struct bnge_vnic_info { #define BNGE_RSS_TABLE_MAX_TBL 8 #define BNGE_MAX_RSS_TABLE_SIZE \ (BNGE_RSS_TABLE_SIZE * BNGE_RSS_TABLE_MAX_TBL) + u32 rx_mask; =20 u8 *mc_list; int mc_list_size; @@ -407,6 +413,41 @@ struct bnge_vnic_info { u32 vnic_id; }; =20 +struct bnge_filter_base { + struct hlist_node hash; + struct list_head list; + __le64 filter_id; + u8 type; +#define BNGE_FLTR_TYPE_L2 2 + u8 flags; + u16 rxq; + u16 fw_vnic_id; + u16 vf_idx; + unsigned long state; +#define BNGE_FLTR_VALID 0 +#define BNGE_FLTR_FW_DELETED 2 + + struct rcu_head rcu; +}; + +struct bnge_l2_key { + union { + struct { + u8 dst_mac_addr[ETH_ALEN]; + u16 vlan; + }; + u32 filter_key; + }; +}; + +#define BNGE_L2_KEY_SIZE (sizeof(struct bnge_l2_key) / 4) +struct bnge_l2_filter { + /* base filter must be the first member */ + struct bnge_filter_base base; + struct bnge_l2_key l2_key; + refcount_t refcnt; +}; + u16 bnge_cp_ring_for_rx(struct bnge_rx_ring_info *rxr); u16 bnge_cp_ring_for_tx(struct bnge_tx_ring_info *txr); int bnge_get_nr_rss_ctxs(int rx_rings); --=20 2.47.3