From nobody Sat Oct 4 01:44:55 2025 Received: from smtpbgeu2.qq.com (smtpbgeu2.qq.com [18.194.254.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 194CF1DF271; Thu, 21 Aug 2025 11:11:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=18.194.254.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755774707; cv=none; b=iBdY15bbHi0cKyC9U1IenYD9eYZwxq0rYAykXGgIv3lMQWjPOoP6G+MUwKZwYKWRxEbdXDm3xtvoNza1aGobyWlSGGswYfBfymPEpDV6UwBiJHd7bWCYo6XG+Kqszghnx+Y2N52G5ni/P5JQf1q8IY/KzZXvPyp0hSuMxbBBVTY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755774707; c=relaxed/simple; bh=adO14fuYJ5yqehwrSznPIOFEMUFv94+LQYJ6lal0CB0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=gUcf9MnJNHl7mg+oV8hFsRAircKt1HoCRUdP1UPaf8pVuO05fEl512dxTEB7aWO1L3o1ulMVPibsKKXnAsaICDbDGk05dfXIMUp9Q39NrAYEDRJDfjU6w2ucU1I1ug0vC563+cdXRtZTjjaBIYCP2L/8gbA00w1unszhPE6uqIo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=chainsx.cn; spf=none smtp.mailfrom=chainsx.cn; arc=none smtp.client-ip=18.194.254.142 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=chainsx.cn Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=chainsx.cn X-QQ-mid: zesmtpip2t1755774593t81369842 X-QQ-Originating-IP: Ag73yM+7wvdFdbNm9yHrmkwzqg+tb/7BJP3xAKS4ils= Received: from chainsx-ubuntu-server.lan ( [localhost]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 21 Aug 2025 19:09:51 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 14449137100758401658 EX-QQ-RecipientCnt: 16 From: Hsun Lai To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: i@chainsx.cn, heiko@sntech.de, andrew@lunn.ch, inindev@gmail.com, quentin.schulz@cherry.de, jonas@kwiboo.se, sfr@canb.auug.org.au, nicolas.frattaroli@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, krzysztof.kozlowski@linaro.org, linux-rockchip@lists.infradead.org Subject: [PATCH v1 1/2] dt-bindings: arm: rockchip: Add 100ASK DShanPi A1 Date: Thu, 21 Aug 2025 19:09:41 +0800 Message-Id: <20250821110942.172150-2-i@chainsx.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250821110942.172150-1-i@chainsx.cn> References: <20250821110942.172150-1-i@chainsx.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-QQ-SENDSIZE: 520 Feedback-ID: zesmtpip:chainsx.cn:qybglogicsvrsz:qybglogicsvrsz3a-0 X-QQ-XMAILINFO: MAelC2bHk4BLleqiFxdwbElLhtVCFq+8q6HzPL2LSfVow4E4fJZE25rr aqXkpqwlOsm/7p4WHg6dZTVsRXUGyIXTOPQN9TeE97ypeT++tvXu5EzzbLSHaJwr53ulS3v ev21guAEavBM4xPDT6vHQ6Ohs3wnRqZ1W3alFqEqV3kWtGomzmEdSSer8uIYnEHJqIT2/Cg RLpRTPZLVytujgo5xe8YSSlmkHVzJH46kWuj4rjLSsrIhZ57l8BLBL98awnyZiJAqD8OguO O0AD/jdyU/yUQx044c3OlgJxTM3CfLNC/SvXe7FVcw69qUj4SnQK1uExPWiaFVTvjLeYhaI cDKBI/hiL5LFrp/k/qH0W5HNhXGnadd4VPR3BKBtk93T4GDR22b5lycQfEfi+7H+6l+gu6E siFtu9+X38XfTjAFfjy0rKygpHEZtMMzjmZ6HE6FaMoS9FHdB7Tf6P+RRVLUr9Y3jWorkJ8 mcmmyuGXfGAVCgG0cFLidwflhnwgQyEHjwhHJ5wtDTdMRvMYFoiiEhBAZHEWqVhT6BPbWhP /5SLSCbg3/E6J6PalEl6qt6qQfIQPiPReYjHabufZB+NF4x2OLwxFTrB7ysX5URCwaQKQIa mZlD4H1q7vOaB3NGljCVaEEawmffcgXHn+LX+O5k75jhVVGUr7ibcIxNVbFnZyhy7GOoM7X wi3l3aZcCcvWqTKChBcbsRlDESzpRexB6LrbTpyW+cCVaCotEWBPb/GA9RSVem3YislCF8R 5MNGdGDwRIZOUeYpESYI9wcaYHMCI2Mv1oRni930UUP/xAoHHpBUpxsUV/+2vt0gNEw5x50 1mPkBKnLIdOGOyMN47VKhKrvkeeNeDeogRGYRl8Zi2t8TvPlC+edmhUu7Ljbaz7EqQfZAOJ 64V5qSPsBvSzWs8LJzy4FeiwI/+z2D9xdcz8Ff86aTbEZcvqlt7Fgg/9Vn6l10dmR36AT/m 1S7erGwVjau1MHvmErv+PsDJVP6iNvn3CEMThj+GIJQ67jvwrrD67So9mXJRFo9CeKlcsI9 6p6VQQLT+YXBI7Zh3alIaX95WkTNI= X-QQ-XMRINFO: MPJ6Tf5t3I/ycC2BItcBVIA= X-QQ-RECHKSPAM: 0 Content-Type: text/plain; charset="utf-8" This documents 100ASK DShanPi A1 which is a SBC based on RK3576 SoC. Link: https://wiki.dshanpi.org/en/docs/DshanPi-A1/intro/ Signed-off-by: Hsun Lai Acked-by: Conor Dooley --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Document= ation/devicetree/bindings/arm/rockchip.yaml index 28db6bd6a..033730861 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -15,6 +15,11 @@ properties: compatible: oneOf: =20 + - description: 100ASK DshanPi A1 board + items: + - const: 100ask,dshanpi-a1 + - const: rockchip,rk3576 + - description: 96boards RK3399 Ficus (ROCK960 Enterprise Edition) items: - const: vamrs,ficus --=20 2.34.1 From nobody Sat Oct 4 01:44:55 2025 Received: from smtpbgbr2.qq.com (smtpbgbr2.qq.com [54.207.22.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 00F1A36CE08; Thu, 21 Aug 2025 11:11:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=54.207.22.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755774673; cv=none; b=pRJ9+rWmMhuRsIzezDzE/k7sGAqzC7/6riqSIZZ39rBFM2wala+4DsJw1dwRU99OdBmxcmijhotdI2VbdNZDfE8zRFqVQ1AdDcRAJ3SwbUxjODDlrobXCO3/wZgdKogCgARALvj+lq+HzGfl+gev/wZmWoyCmORxvjJilQ+rF3c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755774673; c=relaxed/simple; bh=/nPyKLRazf2swpWLMcyIudjRjpnxabSHeTiTnDq9f88=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=hXTJEZY52pBieiCfOS1mKuD7ehvmsaBINnikmiCYrLnVRktPzBTOvjecvBodMhNaFDSNfQUvoSlniPk/0buaU1N9RMwu28f2i5on/DP68LMuvXNcjainiMjRdMeml2a9BZxUgGpzHNBjFYY+F7pdUKW2t9FwFhbZCgdwf6v2hMM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=chainsx.cn; spf=none smtp.mailfrom=chainsx.cn; arc=none smtp.client-ip=54.207.22.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=chainsx.cn Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=chainsx.cn X-QQ-mid: zesmtpip2t1755774597t16fd24cc X-QQ-Originating-IP: KQbqvmhGzduxM8x3EvvIcqC2CSf8YANGFseinsl3T9Q= Received: from chainsx-ubuntu-server.lan ( [localhost]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 21 Aug 2025 19:09:54 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 3291375309173251695 EX-QQ-RecipientCnt: 16 From: Hsun Lai To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: i@chainsx.cn, heiko@sntech.de, andrew@lunn.ch, inindev@gmail.com, quentin.schulz@cherry.de, jonas@kwiboo.se, sfr@canb.auug.org.au, nicolas.frattaroli@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, krzysztof.kozlowski@linaro.org, linux-rockchip@lists.infradead.org Subject: [PATCH v1 2/2] arm64: dts: rockchip: add DTs for 100ASK DShanPi A1 Date: Thu, 21 Aug 2025 19:09:42 +0800 Message-Id: <20250821110942.172150-3-i@chainsx.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250821110942.172150-1-i@chainsx.cn> References: <20250821110942.172150-1-i@chainsx.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-QQ-SENDSIZE: 520 Feedback-ID: zesmtpip:chainsx.cn:qybglogicsvrsz:qybglogicsvrsz3a-0 X-QQ-XMAILINFO: McJfg7Aee/FZyPA6ET/x4cZp5KJXTY2j68I1c98PtaWuk1GUCftJF4Hm 0vYmOfGfVkUw5GHl1CyiqPbsaPER9JnPoxgRNC9gkK1Bn6ogSw0PW8OnPDuh5JIuO76eWV8 vXkPKLgZR63cqjUT6qtMevK7I/PZF8K4kZ6vX4VupEHAaTGh/AZps+D8AdDid/hBctgdWtj vF5e4lpeXstbSXUBo+jwwfFpyFs3D1c9/+mfmQMEwurJZGWnHtV34AnCcNOnZAQg+jlVoA3 iA8tjJE73C/yB+EIDSnLzkbl5ugD6sbTPJoagiNsspFocxSgryUf3Qc3FXBH7YQRpHOQmhR cMdnDe7mk4XAXvp/VHA8A4/A9Zp0MF5DXsSLKMC+HTfk49+J1tp9CGjWHC2Qfdns4yBqr9W Z9/oUGIye05m1slSdb6WUObHYcxoz0pBW5k0/OZk5Vug1bQtRnQMcAiUxMedR2tV1EbetKF x0lapx1pmRrAC5HMt5KQh939lrZd6bVVLeBSMFKgwlhAep6BmE7SyzaOtVmZY2wEMx5uj5+ /6GHsXO8/yPhWsyzVuvdbWpQi3ZCjga132/RmJlBU3jAIZC/m0FjqLeVuJ77olwC91iqMvl D8vK7H9V+1Ey2Nxtj6/ulXNDUobvwqsgTg/Uk/LyQBrJHgoYjBnWeMKkBcMeJzBjowGl9KK wGIbwPXkJu3/dNN2Ho6+TD+2FSSVL4kU8TDTmPwJ0qTMeomBDtHRQdnXOnNCeJRPiymjhbH e5FKlkzw2Df1GOw87y1784yijokn3zO6k2TAdfYRFQ77oYqJxy1gmbtlGrs5ShCWV3VlFTJ YNkzT7T6ffWE8TWh3QA88BmYdTmOza5wZTUhHGQBFidlQtWMriUyuZwcX396whRp6xC1L5A /Fdj4E84I0poBhK7hg/sLAKwwIIt/Ch0VSXXwsnR5MHxCUkjO6y6yZW9OHE5v04Qv7/o3eX oG7mHxa26CawMXSWZqtWUzaO7KVb7RC4UBWCoSxdoxGQ2YZyeQi0YMsF4BhSpPm4AF7GivQ fVXIMlJRvJFE3OYgBiuuLDyDy2GbGXO6mpvaZ29A== X-QQ-XMRINFO: Mp0Kj//9VHAxr69bL5MkOOs= X-QQ-RECHKSPAM: 0 Content-Type: text/plain; charset="utf-8" Add device tree for 100ASK DShanPi A1 with Rockchip RK3576 SoC (4x Cortex-A72, 4x Cortex-A53, Mali-G52 MC3 GPU, 6 TOPS NPU). Enables basic booting and connectivity. Link: https://wiki.dshanpi.org/en/docs/DshanPi-A1/intro/ The device contains the following hardware that is tested/working: - 32 or 64GB eMMC - SDMMC card slot - M.2 WiFi slot - 4 or 8GB of RAM - 2x 1Gbps Ethernet - 2x USB 3.2 Gen 1 Type-A ports - USB 3.0 port - HDMI port - RTC with HYM8563TS Signed-off-by: Hsun Lai Reviewed-by: Andrew Lunn --- Changes in v1: - Add support for 100ASK DShanPi A1 arch/arm64/boot/dts/rockchip/Makefile | 1 + .../dts/rockchip/rk3576-100ask-dshanpi-a1.dts | 841 ++++++++++++++++++ 2 files changed, 842 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.d= ts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 099520962..2a8a8f263 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -144,6 +144,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-rock-3b.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-wolfvision-pf5.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-wolfvision-pf5-display-vz.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-wolfvision-pf5-io-expander.dtbo +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-100ask-dshanpi-a1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-armsom-sige5.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-armsom-sige5-v1.2-wifibt.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-evb1-v10.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts b/ar= ch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts new file mode 100644 index 000000000..5fb7937f4 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts @@ -0,0 +1,841 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Rockchip Electronics Co., Ltd. + * + */ + +/dts-v1/; + +#include +#include +#include +#include +#include +#include "rk3576.dtsi" + +/ { + model =3D "100ASK DshanPi A1 board"; + compatible =3D "100ask,dshanpi-a1", "rockchip,rk3576"; + + aliases { + ethernet0 =3D &gmac0; + ethernet1 =3D &gmac1; + }; + + chosen { + stdout-path =3D "serial0:1500000n8"; + }; + + es8388_sound: es8388-sound { + compatible =3D "simple-audio-card"; + simple-audio-card,format =3D "i2s"; + simple-audio-card,mclk-fs =3D <256>; + simple-audio-card,name =3D "On-board Analog ES8388"; + simple-audio-card,widgets =3D "Microphone", "Headphone Mic", + "Microphone", "Mic Pads", + "Headphone", "Headphone", + "Line Out", "Line Out"; + simple-audio-card,routing =3D "Headphone", "LOUT1", + "Headphone", "ROUT1", + "Line Out", "LOUT2", + "Line Out", "ROUT2", + "RINPUT1", "Headphone Mic", + "LINPUT2", "Mic Pads", + "RINPUT2", "Mic Pads"; + simple-audio-card,pin-switches =3D "Headphone", "Line Out"; + + simple-audio-card,cpu { + sound-dai =3D <&sai1>; + }; + + simple-audio-card,codec { + sound-dai =3D <&es8388>; + system-clock-frequency =3D <12288000>; + }; + }; + + hdmi-con { + compatible =3D "hdmi-connector"; + type =3D "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint =3D <&hdmi_out_con>; + }; + }; + }; + + vcc_12v0_dcin: regulator-vcc-12v0-dcin { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_12v0_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <12000000>; + regulator-max-microvolt =3D <12000000>; + }; + + vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_1v1_nldo_s3"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + vin-supply =3D <&vcc_5v0_sys>; + }; + + vcc_1v2_ufs_vccq_s0: regulator-vcc-1v2-ufs-vccq-s0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_1v2_ufs_vccq_s0"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + vin-supply =3D <&vcc_5v0_sys>; + }; + + vcc_1v8_s0: regulator-vcc-1v8-s0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_1v8_s0"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc_1v8_s3>; + }; + + vcc_1v8_ufs_vccq2_s0: regulator-vcc-1v8-ufs-vccq2-s0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_1v8_ufs_vccq2_s0"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc_1v8_s3>; + }; + + vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_2v0_pldo_s3"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <2000000>; + regulator-max-microvolt =3D <2000000>; + vin-supply =3D <&vcc_5v0_sys>; + }; + + vcc3v3_pcie: regulator-vcc3v3-pcie { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&gpio1 RK_PB7 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie_pwren_h>; + regulator-name =3D "vcc3v3_pcie"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + startup-delay-us =3D <5000>; + vin-supply =3D <&vcc_12v0_dcin>; + }; + + vcc_3v3_rtc_s5: regulator-vcc-3v3-rtc-s5 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_3v3_rtc_s5"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_5v0_sys>; + }; + + vcc_3v3_s0: regulator-vcc-3v3-s0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_3v3_s0"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_3v3_s3>; + }; + + vcc_5v0_sys: regulator-vcc-5v0-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc_12v0_dcin>; + }; + + vcc_5v0_device: regulator-vcc-5v0-device { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_5v0_device"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc_12v0_dcin>; + }; + + vcc_5v0_typec0: regulator-vcc-5v0-typec0 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_otg0_pwren>; + regulator-name =3D "vcc_5v0_typec0"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc_5v0_device>; + }; + + vcc_5v0_usbhost: regulator-vcc-5v0-usbhost { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_host_pwren>; + regulator-name =3D "vcc_5v0_usbhost"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc_5v0_device>; + }; + + vcc_3v3_ufs_s0: regulator-vcc-ufs-s0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_3v3_ufs_s0"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_5v0_sys>; + }; +}; + +&combphy1_psu { + status =3D "okay"; +}; + +&combphy0_ps { + status =3D "okay"; +}; + +&cpu_b0 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + +&cpu_b1 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + +&cpu_b2 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + +&cpu_b3 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + +&cpu_l0 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&gmac0 { + phy-mode =3D "rgmii-id"; + clock_in_out =3D "output"; + phy-handle =3D <&rgmii_phy0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <ð0m0_miim + ð0m0_tx_bus2 + ð0m0_rx_bus2 + ð0m0_rgmii_clk + ð0m0_rgmii_bus>; + status =3D "okay"; +}; + +&gmac1 { + phy-mode =3D "rgmii-id"; + clock_in_out =3D "output"; + phy-handle =3D <&rgmii_phy1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <ð1m0_miim + ð1m0_tx_bus2 + ð1m0_rx_bus2 + ð1m0_rgmii_clk + ð1m0_rgmii_bus + ðm0_clk1_25m_out>; + status =3D "okay"; +}; + +&gpu { + mali-supply =3D <&vdd_gpu_s0>; + status =3D "okay"; +}; + +&hdmi { + status =3D "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint =3D <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint =3D <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status =3D "okay"; +}; + +&hdptxphy { + status =3D "okay"; +}; + +&i2c1 { + status =3D "okay"; + + pmic@23 { + compatible =3D "rockchip,rk806"; + reg =3D <0x23>; + + interrupt-parent =3D <&gpio0>; + interrupts =3D <6 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + + system-power-controller; + + vcc1-supply =3D <&vcc_5v0_sys>; + vcc2-supply =3D <&vcc_5v0_sys>; + vcc3-supply =3D <&vcc_5v0_sys>; + vcc4-supply =3D <&vcc_5v0_sys>; + vcc5-supply =3D <&vcc_5v0_sys>; + vcc6-supply =3D <&vcc_5v0_sys>; + vcc7-supply =3D <&vcc_5v0_sys>; + vcc8-supply =3D <&vcc_5v0_sys>; + vcc9-supply =3D <&vcc_5v0_sys>; + vcc10-supply =3D <&vcc_5v0_sys>; + vcc11-supply =3D <&vcc_2v0_pldo_s3>; + vcc12-supply =3D <&vcc_5v0_sys>; + vcc13-supply =3D <&vcc_1v1_nldo_s3>; + vcc14-supply =3D <&vcc_1v1_nldo_s3>; + vcca-supply =3D <&vcc_5v0_sys>; + + gpio-controller; + #gpio-cells =3D <2>; + + rk806_dvs1_null: dvs1-null-pins { + pins =3D "gpio_pwrctrl1"; + function =3D "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun0"; + }; + + rk806_dvs1_slp: dvs1-slp-pins { + pins =3D "gpio_pwrctrl1"; + function =3D "pin_fun1"; + }; + + rk806_dvs1_pwrdn: dvs1-pwrdn-pins { + pins =3D "gpio_pwrctrl1"; + function =3D "pin_fun2"; + }; + + rk806_dvs1_rst: dvs1-rst-pins { + pins =3D "gpio_pwrctrl1"; + function =3D "pin_fun3"; + }; + + rk806_dvs2_slp: dvs2-slp-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun1"; + }; + + rk806_dvs2_pwrdn: dvs2-pwrdn-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun2"; + }; + + rk806_dvs2_rst: dvs2-rst-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun3"; + }; + + rk806_dvs2_dvs: dvs2-dvs-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun4"; + }; + + rk806_dvs2_gpio: dvs2-gpio-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun5"; + }; + + rk806_dvs3_slp: dvs3-slp-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun1"; + }; + + rk806_dvs3_pwrdn: dvs3-pwrdn-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun2"; + }; + + rk806_dvs3_rst: dvs3-rst-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun3"; + }; + + rk806_dvs3_dvs: dvs3-dvs-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun4"; + }; + + rk806_dvs3_gpio: dvs3-gpio-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun5"; + }; + + regulators { + vdd_cpu_big_s0: dcdc-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-ramp-delay =3D <12500>; + regulator-name =3D "vdd_cpu_big_s0"; + regulator-enable-ramp-delay =3D <400>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_npu_s0: dcdc-reg2 { + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-ramp-delay =3D <12500>; + regulator-name =3D "vdd_npu_s0"; + regulator-enable-ramp-delay =3D <400>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: dcdc-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-ramp-delay =3D <12500>; + regulator-name =3D "vdd_cpu_lit_s0"; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <750000>; + }; + }; + + vcc_3v3_s3: dcdc-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vcc_3v3_s3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vdd_gpu_s0: dcdc-reg5 { + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <900000>; + regulator-ramp-delay =3D <12500>; + regulator-name =3D "vdd_gpu_s0"; + regulator-enable-ramp-delay =3D <400>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <850000>; + }; + }; + + vddq_ddr_s0: dcdc-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-name =3D "vddq_ddr_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_logic_s0: dcdc-reg7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <800000>; + regulator-name =3D "vdd_logic_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcc_1v8_s3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg9 { + regulator-always-on; + regulator-boot-on; + regulator-name =3D "vdd2_ddr_s3"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg10 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <1200000>; + regulator-name =3D "vdd_ddr_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_1v8_s0: pldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcca_1v8_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pldo2_s0: pldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcca1v8_pldo2_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_1v2_s0: pldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-name =3D "vdda_1v2_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_3v3_s0: pldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vcca_3v3_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vccio_sd_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pldo6_s3: pldo-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcca1v8_pldo6_s3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <750000>; + regulator-name =3D "vdd_0v75_s3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <750000>; + }; + }; + + vdda_ddr_pll_s0: nldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-name =3D "vdda_ddr_pll_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v75_hdmi_s0: nldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <837500>; + regulator-max-microvolt =3D <837500>; + regulator-name =3D "vdda0v75_hdmi_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v85_s0: nldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-name =3D "vdda_0v85_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v75_s0: nldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <750000>; + regulator-name =3D "vdda_0v75_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&i2c2 { + status =3D "okay"; + + hym8563: rtc@51 { + compatible =3D "haoyu,hym8563"; + reg =3D <0x51>; + clock-output-names =3D "hym8563"; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hym8563_int>; + wakeup-source; + #clock-cells =3D <0>; + }; +}; + +&i2c4 { + status =3D "okay"; + + es8388: audio-codec@10 { + compatible =3D "everest,es8388", "everest,es8328"; + reg =3D <0x10>; + clocks =3D <&cru CLK_SAI1_MCLKOUT_TO_IO>; + AVDD-supply =3D <&vcca_3v3_s0>; + DVDD-supply =3D <&vcc_3v3_s0>; + HPVDD-supply =3D <&vcca_3v3_s0>; + PVDD-supply =3D <&vcc_3v3_s0>; + assigned-clocks =3D <&cru CLK_SAI1_MCLKOUT_TO_IO>; + assigned-clock-rates =3D <12288000>; + #sound-dai-cells =3D <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sai1m0_mclk>; + }; +}; + +&mdio0 { + rgmii_phy0: phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1>; + clocks =3D <&cru REFCLKO25M_GMAC0_OUT>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac0_rst>; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; + }; +}; + +&mdio1 { + rgmii_phy1: phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1>; + clocks =3D <&cru REFCLKO25M_GMAC1_OUT>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac1_rst>; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>; + }; +}; + +&pinctrl { + gmac { + gmac0_rst: gmac0-rst { + rockchip,pins =3D <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + gmac1_rst: gmac1-rst { + rockchip,pins =3D <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + headphone { + hp_det: hp-det { + rockchip,pins =3D <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + hym8563 { + hym8563_int: hym8563-int { + rockchip,pins =3D <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pcie { + pcie_pwren_h: pcie-pwren-h { + rockchip,pins =3D <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + usb_host_pwren: usb-host-pwren { + rockchip,pins =3D <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + usb_otg0_pwren: usb-otg0-pwren { + rockchip,pins =3D <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&sai1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sai1m0_lrck + &sai1m0_sclk + &sai1m0_sdi0 + &sai1m0_sdo0>; + status =3D "okay"; +}; + +&sai6 { + status =3D "okay"; +}; + +&sdhci { + bus-width =3D <8>; + full-pwr-cycle-in-suspend; + max-frequency =3D <200000000>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + no-sdio; + no-sd; + non-removable; + status =3D "okay"; +}; + +&sdmmc { + bus-width =3D <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + max-frequency =3D <200000000>; + no-sdio; + no-mmc; + sd-uhs-sdr104; + vmmc-supply =3D <&vcc_3v3_s3>; + vqmmc-supply =3D <&vccio_sd_s0>; + status =3D "okay"; +}; + +&u2phy0 { + status =3D "okay"; +}; + +&u2phy0_otg { + status =3D "okay"; +}; + +&u2phy1 { + status =3D "okay"; +}; + +&u2phy1_otg { + phy-supply =3D <&vcc_5v0_usbhost>; + status =3D "okay"; +}; + +&uart0 { + pinctrl-0 =3D <&uart0m0_xfer>; + status =3D "okay"; +}; + +&vop { + status =3D "okay"; +}; + +&vop_mmu { + status =3D "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg =3D ; + remote-endpoint =3D <&hdmi_in_vp0>; + }; +}; --=20 2.34.1