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Shenoy" To: Mario Limonciello , Perry Yuan , "Rafael J . Wysocki" , Viresh Kumar CC: , , "Gautham R. Shenoy" Subject: [PATCH] cpufreq/amd-pstate: Fix setting of CPPC.min_perf in active mode for performance governor Date: Thu, 21 Aug 2025 09:56:38 +0530 Message-ID: <20250821042638.356-1-gautham.shenoy@amd.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D0:EE_|SA0PR12MB4413:EE_ X-MS-Office365-Filtering-Correlation-Id: 3ab210b4-0ddc-4a5e-c387-08dde06afd03 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?MHBvbMPLXVPizLrj3Fif0peGZpoiierCFi75fKlAzb9xx+NGyC/Uyj0e3/v6?= =?us-ascii?Q?f7Jg57PrEDt9qVkPOF9dT0jESlxJE0+BgYlO4d4wJWdZw6n+1ghJA7BYrhfe?= =?us-ascii?Q?7+cREiZkotaVZBDl5j1/7jig25M/QglBt13n1SUL+4LLcvn/OeFVmo+TL/ss?= =?us-ascii?Q?HrkMeVmUBFZNR1Q4Zj2YsekQV96/Q1deJ5k1Gb5FJTR17sOvBLprSfFsdnoj?= =?us-ascii?Q?3984FjWRKpvPdtsKDTCWAUH/Dc9ASSx6fNS1c46r6Z80pNDZjeh80XZiwsyV?= =?us-ascii?Q?zYoITTrsnKf9gSBUJeYdHT2QSTq3kX3n3qw0MGXhMWvuA+3GCGhLEfQkDHHB?= =?us-ascii?Q?R8pjjbOeSzJcOf9etAJSrbDereE1LNiB3Zx8t+OLQrjYOV5ydW5XlqXogoQB?= =?us-ascii?Q?7guYyqXUfA32Dq0KvJDI2HsmWmG5hdie6rsPRqkXNA4lSomJUmf8kuBfK8hF?= =?us-ascii?Q?K1D0gZ9SGNvCc6mTvOewTncH0kzGOhQN6huEEHX4BQ+WHfcUTUsCSvQmmcBX?= =?us-ascii?Q?ZZFVYqP7i0OPs9j8ZM3zoccnX74cD7H1AsPbbqUU8S5Pyfd0gbOWHruACLox?= =?us-ascii?Q?9/uttHncJB3X08iTiC0m+EL9BbpBy9NQegmJyFqOF+3WrlvpMwpWVpg4n383?= =?us-ascii?Q?vapyuVU0yE81QxbYyfitnQeNztvMglxlQay9GADm61dF9dsXijPxT+yaE55S?= =?us-ascii?Q?LjzIHWQb7Srj9R8lvCfV6it/r2TN2SgyplCDtgrYGB44Kl3tjG2ltPQXWRfo?= =?us-ascii?Q?NcxYhw2L6A84xsisdfOkVgCdZm9bWBH6X+lsR0IeJvJt2onU8xSbLBk3/0bw?= =?us-ascii?Q?gBGYI6LLpzEaJu2S4pc/Lv4JP6N38lLBXNdC1eM3sxDjTyqVsY57H6en+UAH?= =?us-ascii?Q?o8B6cRsr/ExUvHrS4KyBea5u3vKLlUwKmG4Q4qd+WtLh9mCABK8gxUXMDR6T?= =?us-ascii?Q?hOl8TPQjX1HLeZ7rbnZfDfPYJQ1Zn7+fWIKZl2h3VwxqAVmY9ee5eDXdI+ts?= =?us-ascii?Q?R2ZmqzaSh78UzsjmFhKlNDr5IA5ljizSHCA7g/rSv1iaiuftKnOVEZYWFmg2?= =?us-ascii?Q?lr/axj0P3hxA3Pz/CA2+x6kRTHI3jUN7KDYqsLffAu3GiyuVkXkfkA2XUYg5?= =?us-ascii?Q?WTcHks9yWzxHXuGj6kp0TsabL3nTjCEMZEE7J8A/NxZhgXf1oGYLGWwaVkQ0?= =?us-ascii?Q?DgzDxQynFOqqgr4VikaaOhzpfAIxBHrRhz3e2QL9Ik0RW4AUXMp6dC0n9Mht?= =?us-ascii?Q?Gm8N8tzfJLUZTBaA226xdH4DdYxT5NKeIKNvem/AUUkTCf1lPztQWSNsL32C?= =?us-ascii?Q?LxGa+lY84qyJhcUQpT5uhOYqtB6GDcA4jTUQTtYXOKaz81iAq33br/QG1mCx?= =?us-ascii?Q?9t7mEmIeAku+yzRRUkgOWF2It8GRYp0824TxypEmufopQSwOqUvr8FEnA+f2?= =?us-ascii?Q?yNrIUtgOBmSmttgGXi7nPl41o0EGo2L4tY8etnez5Hi+ht+kp31uKB7bHef0?= =?us-ascii?Q?spaVKMA1teKSp3uXE0oENrp7RljIiLnQld67?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(376014)(1800799024)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Aug 2025 04:27:07.1643 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3ab210b4-0ddc-4a5e-c387-08dde06afd03 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D0.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4413 Content-Type: text/plain; charset="utf-8" In the "active" mode of the amd-pstate driver with performance governor, the CPPC.min_perf is expected to be the nominal_perf. However after commit a9b9b4c2a4cd ("cpufreq/amd-pstate: Drop min and max cached frequencies"), this is not the case when the governor is switched from performance to powersave and back to performance, and the CPPC.min_perf will be equal to the scaling_min_freq that was set for the powersave governor. This is because prior to commit a9b9b4c2a4cd ("cpufreq/amd-pstate: Drop min and max cached frequencies"), amd_pstate_epp_update_limit() would unconditionally call amd_pstate_update_min_max_limit() and the latter function would enforce the CPPC.min_perf constraint when the governor is performance. However, after the aforementioned commit, amd_pstate_update_min_max_limit() is called by amd_pstate_epp_update_limit() only when either the scaling_{min/max}_freq is different from the cached value of cpudata->{min/max}_limit_freq, which wouldn't have changed on a governor transition from powersave to performance, thus missing out on enforcing the CPPC.min_perf constraint for the performance governor. Fix this by invoking amd_pstate_epp_udpate_limit() not only when the {min/max} limits have changed from the cached values, but also when the policy itself has changed. Fixes: a9b9b4c2a4cd ("cpufreq/amd-pstate: Drop min and max cached frequenci= es") Signed-off-by: Gautham R. Shenoy Reviewed-by: Mario Limonciello --- drivers/cpufreq/amd-pstate.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index f3477ab37742..bbb8e18a6e2b 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -1547,13 +1547,15 @@ static void amd_pstate_epp_cpu_exit(struct cpufreq_= policy *policy) pr_debug("CPU %d exiting\n", policy->cpu); } =20 -static int amd_pstate_epp_update_limit(struct cpufreq_policy *policy) +static int amd_pstate_epp_update_limit(struct cpufreq_policy *policy, bool= policy_change) { struct amd_cpudata *cpudata =3D policy->driver_data; union perf_cached perf; u8 epp; =20 - if (policy->min !=3D cpudata->min_limit_freq || policy->max !=3D cpudata-= >max_limit_freq) + if (policy_change || + policy->min !=3D cpudata->min_limit_freq || + policy->max !=3D cpudata->max_limit_freq) amd_pstate_update_min_max_limit(policy); =20 if (cpudata->policy =3D=3D CPUFREQ_POLICY_PERFORMANCE) @@ -1577,7 +1579,7 @@ static int amd_pstate_epp_set_policy(struct cpufreq_p= olicy *policy) =20 cpudata->policy =3D policy->policy; =20 - ret =3D amd_pstate_epp_update_limit(policy); + ret =3D amd_pstate_epp_update_limit(policy, true); if (ret) return ret; =20 @@ -1651,7 +1653,7 @@ static int amd_pstate_epp_resume(struct cpufreq_polic= y *policy) int ret; =20 /* enable amd pstate from suspend state*/ - ret =3D amd_pstate_epp_update_limit(policy); + ret =3D amd_pstate_epp_update_limit(policy, false); if (ret) return ret; =20 --=20 2.34.1