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([49.37.161.210]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-245ed4c73f2sm40160695ad.94.2025.08.20.20.01.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Aug 2025 20:01:34 -0700 (PDT) From: Rakuram Eswaran To: linux-doc@vger.kernel.org, alexander.deucher@amd.com, christian.koenig@amd.com, airlied@gmail.com, corbet@lwn.net Cc: tzimmermann@suse.de, mripard@kernel.org, maarten.lankhorst@linux.intel.com, simona@ffwll.ch, siqueira@igalia.com, harry.wentland@amd.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-kernel-mentees@lists.linuxfoundation.org, skhan@linuxfoundation.org, rakuram.e96@gmail.com, Randy Dunlap , Alexander Deucher Subject: [PATCH v2 1/2] docs: gpu: amdgpu: Fix spelling in amdgpu documentation Date: Thu, 21 Aug 2025 08:29:55 +0530 Message-ID: <20250821025957.22546-2-rakuram.e96@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250821025957.22546-1-rakuram.e96@gmail.com> References: <20250821025957.22546-1-rakuram.e96@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Fixed following typos reported by Codespell 1. propogated =3D=3D> propagated aperatures =3D=3D> apertures In Documentation/gpu/amdgpu/debugfs.rst 2. parition =3D=3D> partition In Documentation/gpu/amdgpu/process-isolation.rst 3. conections =3D=3D> connections In Documentation/gpu/amdgpu/display/programming-model-dcn.rst In addition to above, Fixed wrong bit-partition naming in gpu/amdgpu/process-isolation.rst from "fourth" partition to "third" partition. Suggested-by: Randy Dunlap Suggested-by: Alexander Deucher Signed-off-by: Rakuram Eswaran Reviewed-by: Randy Dunlap --- Documentation/gpu/amdgpu/debugfs.rst | 4 ++-- Documentation/gpu/amdgpu/display/programming-model-dcn.rst | 2 +- Documentation/gpu/amdgpu/process-isolation.rst | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/gpu/amdgpu/debugfs.rst b/Documentation/gpu/amdgp= u/debugfs.rst index 5150d0a95658..151d8bfc79e2 100644 --- a/Documentation/gpu/amdgpu/debugfs.rst +++ b/Documentation/gpu/amdgpu/debugfs.rst @@ -94,7 +94,7 @@ amdgpu_error_ ------------------- =20 Provides an interface to set an error code on the dma fences associated wi= th -ring . The error code specified is propogated to all fences associa= ted +ring . The error code specified is propagated to all fences associa= ted with the ring. Use this to inject a fence error into a ring. =20 amdgpu_pm_info @@ -165,7 +165,7 @@ GTT memory. amdgpu_regs_* ------------- =20 -Provides direct access to various register aperatures on the GPU. Used +Provides direct access to various register apertures on the GPU. Used by tools like UMR to access GPU registers. =20 amdgpu_regs2 diff --git a/Documentation/gpu/amdgpu/display/programming-model-dcn.rst b/D= ocumentation/gpu/amdgpu/display/programming-model-dcn.rst index c1b48d49fb0b..bc7de97a746f 100644 --- a/Documentation/gpu/amdgpu/display/programming-model-dcn.rst +++ b/Documentation/gpu/amdgpu/display/programming-model-dcn.rst @@ -100,7 +100,7 @@ represents the connected display. For historical reasons, we used the name `dc_link`, which gives the wrong impression that this abstraction only deals with physical connect= ions that the developer can easily manipulate. However, this also covers - conections like eDP or cases where the output is connected to other dev= ices. + connections like eDP or cases where the output is connected to other de= vices. =20 There are two structs that are not represented in the diagram since they w= ere elaborated in the DCN overview page (check the DCN block diagram :ref:`Di= splay diff --git a/Documentation/gpu/amdgpu/process-isolation.rst b/Documentation= /gpu/amdgpu/process-isolation.rst index 6b6d70e357a7..25b06ffefc33 100644 --- a/Documentation/gpu/amdgpu/process-isolation.rst +++ b/Documentation/gpu/amdgpu/process-isolation.rst @@ -26,7 +26,7 @@ Example of enabling enforce isolation on a GPU with multi= ple partitions: $ cat /sys/class/drm/card0/device/enforce_isolation 1 0 1 0 =20 -The output indicates that enforce isolation is enabled on zeroth and secon= d parition and disabled on first and fourth parition. +The output indicates that enforce isolation is enabled on zeroth and secon= d partition and disabled on first and third partition. =20 For devices with a single partition or those that do not support partition= s, there will be only one element: =20 --=20 2.43.0