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This enhancement allows for more flexible and efficient management of resources. The PF takes on a supervisory role and will have bootup information such as SAHARA, DIAG, and NDB (for file system sync data, etc.). VFs can handle resources associated with the main data movement of the Function are available to the SI (system image) as per PCIe SRIOV spec (rev 0.9 1.Architectural overview) Signed-off-by: Vivek Pernamitta Reviewed-by: Krishna Chaitanya Chundru --- drivers/bus/mhi/host/pci_generic.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_= generic.c index 4edb5bb476baf02af02aed00be0d6bacf9e92634..2967ed4cec29d1c1eeb581ed44c= f9afcea90f533 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -34,6 +34,7 @@ /** * struct mhi_pci_dev_info - MHI PCI device specific information * @config: MHI controller configuration + * @vf_config: MHI controller configuration for Virtual function (optional) * @name: name of the PCI module * @fw: firmware path (if any) * @edl: emergency download mode firmware path (if any) @@ -47,6 +48,7 @@ */ struct mhi_pci_dev_info { const struct mhi_controller_config *config; + const struct mhi_controller_config *vf_config; const char *name; const char *fw; const char *edl; @@ -1311,9 +1313,14 @@ static int mhi_pci_probe(struct pci_dev *pdev, const= struct pci_device_id *id) return -ENOMEM; =20 INIT_WORK(&mhi_pdev->recovery_work, mhi_pci_recovery_work); + + if (pdev->is_virtfn && info->vf_config) + mhi_cntrl_config =3D info->vf_config; + else + mhi_cntrl_config =3D info->config; + timer_setup(&mhi_pdev->health_check_timer, health_check, 0); =20 - mhi_cntrl_config =3D info->config; mhi_cntrl =3D &mhi_pdev->mhi_cntrl; =20 mhi_cntrl->cntrl_dev =3D &pdev->dev; --=20 2.34.1 From nobody Sat Oct 4 01:48:23 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2601E31E0F8; Thu, 21 Aug 2025 12:55:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; 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Signed-off-by: Vivek Pernamitta Reviewed-by: Krishna Chaitanya Chundru --- drivers/bus/mhi/host/pci_generic.c | 35 ++++++++++++++++++++++++----------- 1 file changed, 24 insertions(+), 11 deletions(-) diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_= generic.c index 2967ed4cec29d1c1eeb581ed44cf9afcea90f533..df18627a9feb4f2d53ba1ca6a4e= 8087dc23c7873 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -1094,8 +1094,7 @@ static bool mhi_pci_is_alive(struct mhi_controller *m= hi_cntrl) struct pci_dev *pdev =3D to_pci_dev(mhi_cntrl->cntrl_dev); u16 vendor =3D 0; =20 - if (pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor)) - return false; + pci_read_config_word(pci_physfn(pdev), PCI_VENDOR_ID, &vendor); =20 if (vendor =3D=3D (u16) ~0 || vendor =3D=3D 0) return false; @@ -1205,7 +1204,9 @@ static void mhi_pci_recovery_work(struct work_struct = *work) =20 dev_warn(&pdev->dev, "device recovery started\n"); =20 - timer_delete(&mhi_pdev->health_check_timer); + if (pdev->is_physfn) + timer_delete(&mhi_pdev->health_check_timer); + pm_runtime_forbid(&pdev->dev); =20 /* Clean up MHI state */ @@ -1232,7 +1233,10 @@ static void mhi_pci_recovery_work(struct work_struct= *work) dev_dbg(&pdev->dev, "Recovery completed\n"); =20 set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); - mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); + + if (pdev->is_physfn) + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); + return; =20 err_unprepare: @@ -1319,7 +1323,9 @@ static int mhi_pci_probe(struct pci_dev *pdev, const = struct pci_device_id *id) else mhi_cntrl_config =3D info->config; =20 - timer_setup(&mhi_pdev->health_check_timer, health_check, 0); + /* Initialize health check monitor only for Physical functions */ + if (pdev->is_physfn) + timer_setup(&mhi_pdev->health_check_timer, health_check, 0); =20 mhi_cntrl =3D &mhi_pdev->mhi_cntrl; =20 @@ -1383,7 +1389,8 @@ static int mhi_pci_probe(struct pci_dev *pdev, const = struct pci_device_id *id) set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); =20 /* start health check */ - mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); + if (pdev->is_physfn) + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); =20 /* Allow runtime suspend only if both PME from D3Hot and M3 are supported= */ if (pci_pme_capable(pdev, PCI_D3hot) && !(info->no_m3)) { @@ -1408,7 +1415,8 @@ static void mhi_pci_remove(struct pci_dev *pdev) struct mhi_pci_device *mhi_pdev =3D pci_get_drvdata(pdev); struct mhi_controller *mhi_cntrl =3D &mhi_pdev->mhi_cntrl; =20 - timer_delete_sync(&mhi_pdev->health_check_timer); + if (pdev->is_physfn) + timer_delete_sync(&mhi_pdev->health_check_timer); cancel_work_sync(&mhi_pdev->recovery_work); =20 if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { @@ -1436,7 +1444,8 @@ static void mhi_pci_reset_prepare(struct pci_dev *pde= v) =20 dev_info(&pdev->dev, "reset\n"); =20 - timer_delete(&mhi_pdev->health_check_timer); + if (pdev->is_physfn) + timer_delete(&mhi_pdev->health_check_timer); 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Signed-off-by: Vivek Pernamitta Reviewed-by: Krishna Chaitanya Chundru --- drivers/bus/mhi/host/pci_generic.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_= generic.c index df18627a9feb4f2d53ba1ca6a4e8087dc23c7873..351b177cdf84057fb5a4e2f5b52= 279d7f1da41c2 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -1696,7 +1696,8 @@ static struct pci_driver mhi_pci_driver =3D { .remove =3D mhi_pci_remove, .shutdown =3D mhi_pci_shutdown, .err_handler =3D &mhi_pci_err_handler, - .driver.pm =3D &mhi_pci_pm_ops + .driver.pm =3D &mhi_pci_pm_ops, + .sriov_configure =3D pci_sriov_configure_simple, }; module_pci_driver(mhi_pci_driver); =20 --=20 2.34.1 From nobody Sat Oct 4 01:48:23 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7BEB8322539; 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This commit introduces the following steps to achieve that: 1. Disable SR-IOV for any SR-IOV-enabled devices on the Physical Function. 2. Perform a SOC_RESET on the PF to fully reset the device. Disabling SR-IOV ensures all Virtual Functions (VFs) are properly shutdown, preventing issues during the reset process. The SOC_RESET guarantees that the PF is restored to a known good state. Note: - The QDU100 platform supports 1 PF and 16 VFs. - QDU100 does not support Function Level Reset (FLR) due to a hardware limitation. As a result, SOC_RESET is used to reset the device. - On QDU100, any VF failure can cause the entire endpoint (EP) to go down, making this recovery mechanism critical. Signed-off-by: Vivek Pernamitta --- drivers/bus/mhi/host/pci_generic.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_= generic.c index 351b177cdf84057fb5a4e2f5b52279d7f1da41c2..f922cca0ab633aeae942587f0c4= 0038342ce9c33 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -45,6 +45,8 @@ * @sideband_wake: Devices using dedicated sideband GPIO for wakeup instead * of inband wake support (such as sdx24) * @no_m3: M3 not supported + * @reset_on_remove: Set true for devices support SOC reset and perform it + * while drivee remove */ struct mhi_pci_dev_info { const struct mhi_controller_config *config; @@ -58,6 +60,7 @@ struct mhi_pci_dev_info { unsigned int mru_default; bool sideband_wake; bool no_m3; + bool reset_on_remove; }; =20 #define MHI_CHANNEL_CONFIG_UL(ch_num, ch_name, el_count, ev_ring) \ @@ -300,6 +303,7 @@ static const struct mhi_pci_dev_info mhi_qcom_qdu100_in= fo =3D { .dma_data_width =3D 32, .sideband_wake =3D false, .no_m3 =3D true, + .reset_on_remove =3D true, }; =20 static const struct mhi_channel_config mhi_qcom_sa8775p_channels[] =3D { @@ -1039,6 +1043,7 @@ struct mhi_pci_device { struct work_struct recovery_work; struct timer_list health_check_timer; unsigned long status; + bool reset_on_remove; }; =20 static int mhi_pci_read_reg(struct mhi_controller *mhi_cntrl, @@ -1323,7 +1328,6 @@ static int mhi_pci_probe(struct pci_dev *pdev, const = struct pci_device_id *id) else mhi_cntrl_config =3D info->config; =20 - /* Initialize health check monitor only for Physical functions */ if (pdev->is_physfn) timer_setup(&mhi_pdev->health_check_timer, health_check, 0); =20 @@ -1343,6 +1347,9 @@ static int mhi_pci_probe(struct pci_dev *pdev, const = struct pci_device_id *id) mhi_cntrl->mru =3D info->mru_default; mhi_cntrl->name =3D info->name; =20 + if (pdev->is_physfn) + mhi_pdev->reset_on_remove =3D info->reset_on_remove; + if (info->edl_trigger) mhi_cntrl->edl_trigger =3D mhi_pci_generic_edl_trigger; =20 @@ -1415,6 +1422,8 @@ static void mhi_pci_remove(struct pci_dev *pdev) struct mhi_pci_device *mhi_pdev =3D pci_get_drvdata(pdev); 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Thu, 21 Aug 2025 12:55:50 GMT Received: from hu-vpernami-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Thu, 21 Aug 2025 05:55:48 -0700 From: Vivek.Pernamitta@quicinc.com Date: Thu, 21 Aug 2025 18:25:37 +0530 Subject: [PATCH v3 5/6] bus: mhi: core: Improve mhi_sync_power_up handling for SYS_ERR state Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250821-vdev_next-20250821_sriov-v3-5-e1b017c48d4a@quicinc.com> References: <20250821-vdev_next-20250821_sriov-v3-0-e1b017c48d4a@quicinc.com> In-Reply-To: <20250821-vdev_next-20250821_sriov-v3-0-e1b017c48d4a@quicinc.com> To: Manivannan Sadhasivam CC: , , , Vivek Pernamitta X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; 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However, in some cases, the device may be in SYS_ERR state due to a previous device reset. SYS_ERR is a valid state, but currently, the host exits at wait_event_timeout() prematurely when MHI_PM_IN_ERROR_STATE is detected, causing mhi_sync_power_up() to fail. If MHI is torn down before SYS_ERR is serviced, recovery is not possible. Instead of aborting, the SYS_ERR handler should process the error and queue the next state transition to bring the device into Mission Mode. This change ensures mhi_sync_power_up() waits for Mission Mode even after SYS_ERR, enabling proper recovery and improving robustness. Signed-off-by: Vivek Pernamitta --- drivers/bus/mhi/host/internal.h | 2 ++ drivers/bus/mhi/host/pm.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/bus/mhi/host/internal.h b/drivers/bus/mhi/host/interna= l.h index 034be33565b78eff9bdefd93faa4f3ce93825bad..9e37e5c9a6c7e07d54300adce51= c9db9052e477a 100644 --- a/drivers/bus/mhi/host/internal.h +++ b/drivers/bus/mhi/host/internal.h @@ -170,6 +170,8 @@ enum mhi_pm_state { MHI_PM_IN_ERROR_STATE(pm_state)) #define MHI_PM_IN_SUSPEND_STATE(pm_state) (pm_state & \ (MHI_PM_M3_ENTER | MHI_PM_M3)) +#define MHI_PM_IN_UNRECOVERABLE_ERROR(pm_state) ((pm_state =3D=3D MHI_PM_= FW_DL_ERR) || \ + (pm_state >=3D MHI_PM_SYS_ERR_FAIL)) =20 #define NR_OF_CMD_RINGS 1 #define CMD_EL_PER_RING 128 diff --git a/drivers/bus/mhi/host/pm.c b/drivers/bus/mhi/host/pm.c index 33d92bf2fc3ed48db5f7fe80e4f0ef9fe2d2f2ab..e908bbce79e9a8a76881b5d040c= 7e9d4985124dc 100644 --- a/drivers/bus/mhi/host/pm.c +++ b/drivers/bus/mhi/host/pm.c @@ -1279,7 +1279,7 @@ int mhi_sync_power_up(struct mhi_controller *mhi_cntr= l) mhi_cntrl->ready_timeout_ms : mhi_cntrl->timeout_ms; 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However, Virtual Functions (VFs) are enabled only after the device enters Mission Mode and can support higher DMA address ranges (up to 40 bits). A 32-bit DMA mask limits addressable space to 4GiB, which is insufficient for data transfer requirements over VFs on platforms like QDU100. These devices require larger memory regions to be mapped for efficient VF operation. To address this, configure `dma_mask` independently for Physical Functions (PFs) and Virtual Functions (VFs), allowing VFs to use higher DMA mask values where supported. As per PCIe SR-IOV specification (rev 0.9, Section 1), VFs are capable of handling resources associated with the main data movement of the Function. This change ensures compatibility with bootloaders that have limited DMA capabilities while enabling full VF functionality once the device reaches Mission Mode. Signed-off-by: Vivek Pernamitta --- drivers/bus/mhi/host/pci_generic.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_= generic.c index f922cca0ab633aeae942587f0c40038342ce9c33..fad08bdd59919a1cab05e9864fb= 38151ef79e457 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -41,6 +41,7 @@ * @edl_trigger: capable of triggering EDL mode in the device (if supporte= d) * @bar_num: PCI base address register to use for MHI MMIO register space * @dma_data_width: DMA transfer word size (32 or 64 bits) + * @vf_dma_data_width: DMA transfer word size for VF's (optional) * @mru_default: default MRU size for MBIM network packets * @sideband_wake: Devices using dedicated sideband GPIO for wakeup instead * of inband wake support (such as sdx24) @@ -57,6 +58,7 @@ struct mhi_pci_dev_info { bool edl_trigger; unsigned int bar_num; unsigned int dma_data_width; + unsigned int vf_dma_data_width; unsigned int mru_default; bool sideband_wake; bool no_m3; @@ -301,6 +303,7 @@ static const struct mhi_pci_dev_info mhi_qcom_qdu100_in= fo =3D { .config =3D &mhi_qcom_qdu100_config, .bar_num =3D MHI_PCI_DEFAULT_BAR_NUM, .dma_data_width =3D 32, + .vf_dma_data_width =3D 40, .sideband_wake =3D false, .no_m3 =3D true, .reset_on_remove =3D true, @@ -1312,6 +1315,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const = struct pci_device_id *id) const struct mhi_controller_config *mhi_cntrl_config; struct mhi_pci_device *mhi_pdev; struct mhi_controller *mhi_cntrl; + unsigned int dma_data_width; int err; =20 dev_info(&pdev->dev, "MHI PCI device found: %s\n", info->name); @@ -1333,9 +1337,12 @@ static int mhi_pci_probe(struct pci_dev *pdev, const= struct pci_device_id *id) =20 mhi_cntrl =3D &mhi_pdev->mhi_cntrl; =20 + dma_data_width =3D (pdev->is_virtfn && info->vf_dma_data_width) ? + info->vf_dma_data_width : info->dma_data_width; + mhi_cntrl->cntrl_dev =3D &pdev->dev; mhi_cntrl->iova_start =3D 0; - mhi_cntrl->iova_stop =3D (dma_addr_t)DMA_BIT_MASK(info->dma_data_width); + mhi_cntrl->iova_stop =3D (dma_addr_t)DMA_BIT_MASK(dma_data_width); mhi_cntrl->fw_image =3D info->fw; mhi_cntrl->edl_image =3D info->edl; =20 @@ -1359,7 +1366,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const = struct pci_device_id *id) mhi_cntrl->wake_toggle =3D mhi_pci_wake_toggle_nop; } =20 - err =3D mhi_pci_claim(mhi_cntrl, info->bar_num, DMA_BIT_MASK(info->dma_da= ta_width)); + err =3D mhi_pci_claim(mhi_cntrl, info->bar_num, DMA_BIT_MASK(dma_data_wid= th)); if (err) return err; =20 --=20 2.34.1