From nobody Sat Oct 4 02:56:41 2025 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8984430C362; Thu, 21 Aug 2025 11:12:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755774760; cv=none; b=YxB/5Px0m3GtaOaHX/39FNa/lhJdXaMdMO3Lelhuleq/wmrMSz1KpKJLbIDl2ieVu548B1snEYgX2M9fTXNOvo8u3vVlOJTtRA5xbuVbRNffTWxI7F/8bgpwsg2xVYVrxe20QoYcdgTDCN3IDUtmUJivjad4KycUvwYjSlzPvb8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755774760; c=relaxed/simple; bh=H3lhBpFDRR7eKkSA7w0InFw1YFa49292PRTvVeqI01Y=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=UGlYaf6vsJ7cRp5a0BYt2Tmy4GfxehsvsyKJx/Y54dt9y64gDVO4KAx8++Q4bSxIIVbanKiptlt8r1DHlaWyb/dXh9fwdrxwMFXQ9Z0fk/mdFBaBBUFHFg63yItPZHlH2wY2ylOmFq7QdPuskGc33RFsjGsxSnyx9AT39yPYAwI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=l6aS4tbO; arc=none smtp.client-ip=185.132.182.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="l6aS4tbO" Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 57LBBDHn018680; Thu, 21 Aug 2025 13:12:20 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= RUmj8Nt5UtGZPKvlR+QnuojqoxKp1z0jwnSFCxypOrQ=; b=l6aS4tbOQjqnuEBm ccNRG7ibCIyp398fXuPe3xuSRQG6AyGMUlUDxgC7gQKjyeC4mAIP12PafXYXnGjB 9RoGzOXjvwcSQ/bf9VwIEaywOJF93XTxpI7E2QkAoD1/lgQAlWxFVLIsPTL/tYo2 zNm01wYm7mMmdqY+41BEXdRNe1K3n84DSlLZNic0rXB6ID6LLFB/cIo2rj0gQupQ kreUTFL/DkjMKFDKuFDTHZlrQt30BMToSS2tAFHz3/hsh4HYGs40KP/3SYBNToMR sCYIWXk2+HQwKRfCcY910feOgKFJyLtDrfiRrEV96pn2fITpTAmiQHruZA6optm+ sQjTDg== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 48n70dej4a-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 21 Aug 2025 13:12:20 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id AD18A40054; Thu, 21 Aug 2025 13:10:55 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 5E4A574E7CD; Thu, 21 Aug 2025 13:09:59 +0200 (CEST) Received: from localhost (10.252.7.99) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 21 Aug 2025 13:09:59 +0200 From: Raphael Gallais-Pou Date: Thu, 21 Aug 2025 13:08:59 +0200 Subject: [PATCH v4 09/13] arm64: dts: st: add ltdc support on stm32mp251 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250821-drm-misc-next-v4-9-7060500f8fd3@foss.st.com> References: <20250821-drm-misc-next-v4-0-7060500f8fd3@foss.st.com> In-Reply-To: <20250821-drm-misc-next-v4-0-7060500f8fd3@foss.st.com> To: Yannick Fertre , Philippe Cornu , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , "Maxime Coquelin" , Alexandre Torgue , Catalin Marinas , Will Deacon , Christophe Roullier CC: , , , , X-Mailer: b4 0.14.2 X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-21_03,2025-08-20_03,2025-03-28_01 The LCD-TFT Display Controller (LTDC) handles display composition, scaling and rotation. It provides a parallel digital RGB flow to be used by display interfaces. Add the LTDC node. Signed-off-by: Raphael Gallais-Pou Acked-by: Yannick Fertre --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/s= t/stm32mp251.dtsi index 303abf915b8e489671b51a8c832041c14a42ecb8..372a99d9cc5c3730e8fbeddeb61= 34a3b18d938b6 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -1576,6 +1576,18 @@ dcmipp: dcmipp@48030000 { status =3D "disabled"; }; =20 + ltdc: display-controller@48010000 { + compatible =3D "st,stm32mp251-ltdc"; + reg =3D <0x48010000 0x400>; + interrupts =3D , + ; + clocks =3D <&rcc CK_KER_LTDC>, <&rcc CK_BUS_LTDC>; + clock-names =3D "lcd", "bus"; + resets =3D <&rcc LTDC_R>; + access-controllers =3D <&rifsc 80>; + status =3D "disabled"; + }; + combophy: phy@480c0000 { compatible =3D "st,stm32mp25-combophy"; reg =3D <0x480c0000 0x1000>; --=20 2.25.1