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Wed, 20 Aug 2025 13:07:13 -0700 (PDT) Received: from iku.Home ([2a06:5906:61b:2d00:9b1:f84b:89f6:b00e]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3c077789c92sm8810302f8f.52.2025.08.20.13.07.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Aug 2025 13:07:12 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2 9/9] arm64: dts: renesas: rzt2h/rzn2h: Enable SD card slot Date: Wed, 20 Aug 2025 21:06:59 +0100 Message-ID: <20250820200659.2048755-10-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250820200659.2048755-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20250820200659.2048755-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar Enable SD card slot which is connected to SDHI0 on the RZ/T2H and RZ/N2H EVKs. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- v1->v2: - Dropped sd0-sd-prefixes - Dropped DATA4-7 from data-pins --- .../dts/renesas/r9a09g077m44-rzt2h-evk.dts | 5 ++ .../dts/renesas/r9a09g087m44-rzn2h-evk.dts | 9 ++++ .../dts/renesas/rzt2h-n2h-evk-common.dtsi | 51 +++++++++++++++++++ 3 files changed, 65 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts b/arch/= arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts index 37330c837f64..264f7ddb8cc5 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts @@ -14,8 +14,13 @@ * Lets by default enable the eMMC, note we need the below SW settings * for eMMC. * SW2[1] =3D ON; SW2[2] =3D ON + * + * To enable SD card and disable eMMC on SDHI0 disable the below macro + * and set the below switch setting: + * SW2[1] =3D OFF; SW2[2] =3D ON */ #define SD0_EMMC 1 +#define SD0_SD (!SD0_EMMC) =20 /* * P17_4 =3D SD1_CD; SW2[3] =3D ON diff --git a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts b/arch/= arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts index 87178933bee8..80f358fb2d74 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts @@ -15,8 +15,17 @@ * for eMMC. * DSW5[1] =3D ON; DSW5[2] =3D ON * DSW17[5] =3D OFF; DSW17[6] =3D ON + * + * To enable SD card and disable eMMC on SDHI0 disable the below macro + * and set the below switch setting: + * DSW5[1] =3D OFF; DSW5[2] =3D ON + * P22_6 =3D SD0_WP; DSW15[1] =3D OFF; DSW15[2] =3D ON + * P22_5 =3D SD0_CD; DSW15[3] =3D OFF; DSW15[4] =3D ON + * P02_6 =3D SD0_IOVS; DSW17[5] =3D OFF; DSW17[6] =3D ON + * P02_5 =3D SD0_PWEN; DSW17[7] =3D OFF; DSW17[8] =3D ON */ #define SD0_EMMC 1 +#define SD0_SD (!SD0_EMMC) =20 /* * P17_4 =3D SD1_CD; DSW5[3] =3D ON; DSW19[1] =3D OFF; DSW19[2] =3D ON diff --git a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi b/arch/a= rm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi index 34572630ecbe..8b9d04dce8ae 100644 --- a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi +++ b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi @@ -40,6 +40,18 @@ reg_3p3v: regulator-3p3v { regulator-always-on; }; =20 +#if SD0_SD + vqmmc_sdhi0: regulator-vqmmc-sdhi0 { + compatible =3D "regulator-gpio"; + regulator-name =3D "SDHI0 VqmmC"; + gpios =3D <&pinctrl RZT2H_GPIO(2, 6) GPIO_ACTIVE_HIGH>; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + gpios-states =3D <0>; + states =3D <3300000 0>, <1800000 1>; + }; +#endif + #if SD1_MICRO_SD vccq_sdhi1: regulator-vccq-sdhi1 { compatible =3D "regulator-gpio"; @@ -107,6 +119,31 @@ ctrl-pins { }; }; =20 +#if SD0_SD + sdhi0-pwen-hog { + gpio-hog; + gpios =3D ; + output-high; + line-name =3D "SD0_PWEN"; + }; +#endif + + sdhi0_sd_pins: sd0-sd-group { + data-pins { + pinmux =3D , /* SD0_DATA0 */ + , /* SD0_DATA1 */ + , /* SD0_DATA2 */ + ; /* SD0_DATA3 */ + }; + + ctrl-pins { + pinmux =3D , /* SD0_CLK */ + , /* SD0_CMD */ + , /* SD0_CD */ + ; /* SD0_WP */ + }; + }; + #if SD1_MICRO_SD sdhi1-pwen-hog { gpio-hog; @@ -153,6 +190,20 @@ &sdhi0 { }; #endif =20 +#if SD0_SD +&sdhi0 { + pinctrl-0 =3D <&sdhi0_sd_pins>; + pinctrl-1 =3D <&sdhi0_sd_pins>; + pinctrl-names =3D "default", "state_uhs"; + vmmc-supply =3D <®_3p3v>; + vqmmc-supply =3D <&vqmmc_sdhi0>; + bus-width =3D <4>; + sd-uhs-sdr50; + sd-uhs-sdr104; + status =3D "okay"; +}; +#endif + #if SD1_MICRO_SD &sdhi1 { pinctrl-0 =3D <&sdhi1_pins>; --=20 2.51.0